forked from Imagelibrary/rtems
2010-12-29 Sebastian Huber <sebastian.huber@embedded-brains.de>
* mpc55xx/include/mpc55xx.h, mpc55xx/misc/copy.S: Removed zero functions.
This commit is contained in:
@@ -13,6 +13,8 @@
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e200 exception vector defines. Added e500 exception vector defines.
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Unified IVOR calculation for e200 and e500 (e200z1 has hard wired
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IVOR values).
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* mpc55xx/include/mpc55xx.h, mpc55xx/misc/copy.S: Removed zero
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functions.
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2010-12-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
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@@ -46,12 +46,6 @@
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/* Defined in copy.S */
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int mpc55xx_copy_8( const void *src, void *dest, size_t n);
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/* Defined in copy.S */
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int mpc55xx_zero_8( void *dest, size_t n);
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/* Defined in copy.S */
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int mpc55xx_zero_32( void *dest, size_t n);
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/* Defined in fmpll.S */
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void mpc55xx_fmpll_reset_config();
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@@ -3,7 +3,7 @@
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*
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* @ingroup mpc55xx_asm
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*
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* @brief Memory copy and zero functions.
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* @brief Memory copy functions.
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*/
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/*
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@@ -78,146 +78,3 @@ copy_data:
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/* Return */
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blr
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#endif /*!((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))*/
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/**
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* @fn int mpc55xx_zero_4( void *dest, size_t n)
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*
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* @brief Zero all @a n bytes starting at @a dest with 4 byte writes.
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*
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* The address @a dest has to be aligned on 4 byte boundaries. The size @a n
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* must be evenly divisible by 4. No SPE operations are used.
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*/
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#if ((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))
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GLOBAL_FUNCTION mpc55xx_zero_32
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GLOBAL_FUNCTION mpc55xx_zero_8
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#endif /* ((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517)) */
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GLOBAL_FUNCTION mpc55xx_zero_4
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/* Create zero */
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xor r0, r0, r0
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/* Loop counter for the first bytes up to 16 bytes */
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rlwinm. r9, r4, 29, 30, 31
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beq zero_more4
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mtctr r9
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xor r5,r5,r5
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zero_data4:
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stwx r0, r5, r3
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addi r5, r5, 4
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bdnz zero_data4
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zero_more4:
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/* More than 16 bytes? */
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srwi. r9, r4, 4
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beqlr
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mtctr r9
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zero_big_data4:
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stw r0, 0(r3)
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stw r0, 4(r3)
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stw r0, 8(r3)
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stw r0, 12(r3)
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addi r3, r3, 16
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bdnz zero_big_data4
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/* Return */
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blr
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#if !((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))
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/**
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* @fn int mpc55xx_zero_8( void *dest, size_t n)
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*
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* @brief Zero all @a n bytes starting at @a dest with 8 byte writes.
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*
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* The address @a dest has to be aligned on 8 byte boundaries. The size @a n
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* must be evenly divisible by 8. The SPE operations @b evxor and @b evstddx will be used.
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*/
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GLOBAL_FUNCTION mpc55xx_zero_8
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/* Create zero */
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evxor r0, r0, r0
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/* Set offset */
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evxor r5, r5, r5
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/* Loop counter for the first bytes up to 32 bytes */
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rlwinm. r9, r4, 29, 30, 31
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beq zero_more
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mtctr r9
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zero_data:
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evstddx r0, r3, r5
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addi r5, r5, 8
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bdnz zero_data
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zero_more:
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/* More than 32 bytes? */
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srwi. r9, r4, 5
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beqlr
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mtctr r9
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/* Set offsets */
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addi r6, r5, 8
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addi r7, r5, 16
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addi r8, r5, 24
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zero_big_data:
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evstddx r0, r3, r5
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addi r5, r5, 32
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evstddx r0, r3, r6
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addi r6, r6, 32
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evstddx r0, r3, r7
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addi r7, r7, 32
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evstddx r0, r3, r8
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addi r8, r8, 32
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bdnz zero_big_data
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/* Return */
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blr
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/**
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* @fn int mpc55xx_zero_32( void *dest, size_t n)
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*
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* @brief Zero all @a n bytes starting at @a dest with 32 byte writes.
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*
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* The address @a dest has to be aligned on 32 byte boundaries. The size @a n
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* must be evenly divisible by 32. The function operates with the cache block zero
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* operation @b dcbz.
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*
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* @note The cache has to be enabled for the desired memory area.
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*/
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GLOBAL_FUNCTION mpc55xx_zero_32
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/* Set offset */
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xor r5, r5, r5
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/* Loop counter for the first bytes up to 128 bytes */
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rlwinm. r9, r4, 27, 28, 31
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beq zero_more_lines
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mtctr r9
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zero_line:
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dcbz r3, r5
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addi r5, r5, 32
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bdnz zero_line
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zero_more_lines:
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/* More than 128 bytes? */
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srwi. r9, r4, 7
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beqlr
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mtctr r9
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/* Set offsets */
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addi r6, r5, 32
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addi r7, r5, 64
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addi r8, r5, 96
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zero_big_line:
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dcbz r3, r5
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addi r5, r5, 128
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dcbz r3, r6
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addi r6, r6, 128
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dcbz r3, r7
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addi r7, r7, 128
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dcbz r3, r8
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addi r8, r8, 128
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bdnz zero_big_line
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/* Return */
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blr
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#endif /* !((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517)) */
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