RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

2004-03-23 Ralf Corsepius <ralf_corsepius@rtems.org>

Browse Source 
* libchip/ide/ata.c, libchip/ide/ata_internal.h,
	libchip/ide/ide_controller.c, libchip/ide/ide_ctrl_cfg.h,
	libchip/ide/ide_ctrl_io.h, libchip/network/cs8900.c,
	libchip/network/dec21140.c, libchip/network/elnk.c,
	libchip/network/if_fxp.c, libchip/network/open_eth.c,
	libchip/network/open_eth.h, libchip/network/sonic.c,
	libchip/network/sonic.h, libchip/rtc/icm7170.c, libchip/rtc/icm7170.h,
	libchip/rtc/icm7170_reg.c, libchip/rtc/icm7170_reg2.c,
	libchip/rtc/icm7170_reg4.c, libchip/rtc/icm7170_reg8.c,
	libchip/rtc/m48t08.c, libchip/rtc/m48t08.h, libchip/rtc/m48t08_reg.c,
	libchip/rtc/m48t08_reg2.c, libchip/rtc/m48t08_reg4.c,
	libchip/rtc/m48t08_reg8.c, libchip/rtc/rtc.h, libchip/serial/mc68681.c,
	libchip/serial/mc68681.h, libchip/serial/mc68681_reg.c,
	libchip/serial/mc68681_reg2.c, libchip/serial/mc68681_reg4.c,
	libchip/serial/mc68681_reg8.c, libchip/serial/ns16550.c,
	libchip/serial/ns16550_p.h, libchip/serial/serial.h,
	libchip/serial/z85c30.c, libchip/serial/z85c30.h,
	libchip/serial/z85c30_p.h, libchip/serial/z85c30_reg.c,
	libchip/shmdr/addlq.c, libchip/shmdr/cnvpkt.c, libchip/shmdr/dump.c,
	libchip/shmdr/fatal.c, libchip/shmdr/getlq.c, libchip/shmdr/init.c,
	libchip/shmdr/initlq.c, libchip/shmdr/intr.c, libchip/shmdr/poll.c,
	libchip/shmdr/send.c, libchip/shmdr/shm_driver.h: Convert to using c99
	fixed-size types.
This commit is contained in:
Ralf Corsepius
2004-03-23 09:59:52 +00:00
parent 83c5fc1bb9
commit ee4f57d9a6
51 changed files with 520 additions and 497 deletions
Download Patch File Download Diff File Expand all files Collapse all files

43
c/src/ChangeLog
View File

@@ -1,15 +1,38 @@
2004-03-23 Ralf Corsepius <ralf_corsepius@rtems.org>
* libchip/ide/ata.c, libchip/ide/ata_internal.h,
libchip/ide/ide_controller.c, libchip/ide/ide_ctrl_cfg.h,
libchip/ide/ide_ctrl_io.h, libchip/network/cs8900.c,
libchip/network/dec21140.c, libchip/network/elnk.c,
libchip/network/if_fxp.c, libchip/network/open_eth.c,
libchip/network/open_eth.h, libchip/network/sonic.c,
libchip/network/sonic.h, libchip/rtc/icm7170.c, libchip/rtc/icm7170.h,
libchip/rtc/icm7170_reg.c, libchip/rtc/icm7170_reg2.c,
libchip/rtc/icm7170_reg4.c, libchip/rtc/icm7170_reg8.c,
libchip/rtc/m48t08.c, libchip/rtc/m48t08.h, libchip/rtc/m48t08_reg.c,
libchip/rtc/m48t08_reg2.c, libchip/rtc/m48t08_reg4.c,
libchip/rtc/m48t08_reg8.c, libchip/rtc/rtc.h, libchip/serial/mc68681.c,
libchip/serial/mc68681.h, libchip/serial/mc68681_reg.c,
libchip/serial/mc68681_reg2.c, libchip/serial/mc68681_reg4.c,
libchip/serial/mc68681_reg8.c, libchip/serial/ns16550.c,
libchip/serial/ns16550_p.h, libchip/serial/serial.h,
libchip/serial/z85c30.c, libchip/serial/z85c30.h,
libchip/serial/z85c30_p.h, libchip/serial/z85c30_reg.c,
libchip/shmdr/addlq.c, libchip/shmdr/cnvpkt.c, libchip/shmdr/dump.c,
libchip/shmdr/fatal.c, libchip/shmdr/getlq.c, libchip/shmdr/init.c,
libchip/shmdr/initlq.c, libchip/shmdr/intr.c, libchip/shmdr/poll.c,
libchip/shmdr/send.c, libchip/shmdr/shm_driver.h: Convert to using c99
fixed-size types.
2004-03-14 Chris Johns <chrisj@rtems.org> 2004-03-14 Chris Johns <chrisj@rtems.org>
* cs8900.c.bsp, cs8900.h.bsp: Updated the BSP example code. * libchip/network/cs8900.c.bsp, libchip/network/cs8900.h.bsp: Updated
the BSP example code.
* cs8900.c, cs8900.h: * libchip/network/cs8900.c, libchip/network/cs8900.h: Changes made to
Changes made to support the DIMMPC. This is a pc396 target with IO port support the DIMMPC. This is a pc386 target with IO port support. Minor
support. formating clean up. Add documentation to the header file.
Minor formating clean up. * libchip/network/README.cs8900: The CS8900 driver is documented in the
Add documentation to the header file. cs8900.h header file.
* README.cs8900:
The CS8900 driver is documented in the cs8900.h header file.
2004-03-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> 2004-03-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>

78
c/src/libchip/ide/ata.c
View File

@@ -134,7 +134,7 @@ ata_io_data_request(dev_t device, blkdev_request *req)
* ata_devs array * ata_devs array
*/ */
rtems_device_minor_number ctrl_minor; rtems_device_minor_number ctrl_minor;
unsigned8 dev; uint8_t dev;
rel_minor = (rtems_filesystem_dev_minor_t(device)) / rel_minor = (rtems_filesystem_dev_minor_t(device)) /
ATA_MINOR_NUM_RESERVED_PER_ATA_DEVICE; ATA_MINOR_NUM_RESERVED_PER_ATA_DEVICE;
@@ -217,15 +217,15 @@ ata_io_data_request(dev_t device, blkdev_request *req)
*/ */
if (ATA_DEV_INFO(ctrl_minor, dev).lba_avaible) if (ATA_DEV_INFO(ctrl_minor, dev).lba_avaible)
{ {
areq->regs.regs[IDE_REGISTER_LBA0] = (unsigned8)req->start; areq->regs.regs[IDE_REGISTER_LBA0] = (uint8_t )req->start;
areq->regs.regs[IDE_REGISTER_LBA1] = (unsigned8)(req->start >> 8); areq->regs.regs[IDE_REGISTER_LBA1] = (uint8_t )(req->start >> 8);
areq->regs.regs[IDE_REGISTER_LBA2] = (unsigned8)(req->start >> 16); areq->regs.regs[IDE_REGISTER_LBA2] = (uint8_t )(req->start >> 16);
areq->regs.regs[IDE_REGISTER_LBA3] |= (unsigned8) (req->start >> 24); areq->regs.regs[IDE_REGISTER_LBA3] |= (uint8_t ) (req->start >> 24);
areq->regs.regs[IDE_REGISTER_LBA3] |= IDE_REGISTER_LBA3_L; areq->regs.regs[IDE_REGISTER_LBA3] |= IDE_REGISTER_LBA3_L;
} }
else else
{ {
unsigned32 count = req->start; uint32_t count = req->start;
areq->regs.regs[IDE_REGISTER_SECTOR_NUMBER] = areq->regs.regs[IDE_REGISTER_SECTOR_NUMBER] =
(count % ATA_DEV_INFO(ctrl_minor, dev).sectors) + 1; (count % ATA_DEV_INFO(ctrl_minor, dev).sectors) + 1;
@@ -237,8 +237,8 @@ ata_io_data_request(dev_t device, blkdev_request *req)
/* now count = number of cylinders */ /* now count = number of cylinders */
count %= ATA_DEV_INFO(ctrl_minor, dev).cylinders; count %= ATA_DEV_INFO(ctrl_minor, dev).cylinders;
areq->regs.regs[IDE_REGISTER_CYLINDER_LOW] = (unsigned8)count; areq->regs.regs[IDE_REGISTER_CYLINDER_LOW] = (uint8_t )count;
areq->regs.regs[IDE_REGISTER_CYLINDER_HIGH] = (unsigned8)(count >> 8); areq->regs.regs[IDE_REGISTER_CYLINDER_HIGH] = (uint8_t )(count >> 8);
areq->regs.regs[IDE_REGISTER_DEVICE_HEAD] &= areq->regs.regs[IDE_REGISTER_DEVICE_HEAD] &=
~IDE_REGISTER_DEVICE_HEAD_L; ~IDE_REGISTER_DEVICE_HEAD_L;
} }
@@ -274,7 +274,7 @@ ata_non_data_request(dev_t device, int cmd, void *argp)
* ata_devs array * ata_devs array
*/ */
rtems_device_minor_number ctrl_minor; rtems_device_minor_number ctrl_minor;
unsigned8 dev; uint8_t dev;
ata_queue_msg_t msg; ata_queue_msg_t msg;
rel_minor = (rtems_filesystem_dev_minor_t(device)) / rel_minor = (rtems_filesystem_dev_minor_t(device)) /
@@ -312,7 +312,7 @@ ata_non_data_request(dev_t device, int cmd, void *argp)
ATA_COMMAND_SET_MULTIPLE_MODE; ATA_COMMAND_SET_MULTIPLE_MODE;
areq->regs.to_write |= areq->regs.to_write |=
ATA_REGISTERS_VALUE(IDE_REGISTER_SECTOR_COUNT); ATA_REGISTERS_VALUE(IDE_REGISTER_SECTOR_COUNT);
areq->regs.regs[IDE_REGISTER_SECTOR_COUNT] = *(unsigned8 *)argp; areq->regs.regs[IDE_REGISTER_SECTOR_COUNT] = *(uint8_t *)argp;
break; break;
default: default:
@@ -356,7 +356,7 @@ ata_non_data_request(dev_t device, int cmd, void *argp)
{ {
case ATAIO_SET_MULTIPLE_MODE: case ATAIO_SET_MULTIPLE_MODE:
ATA_DEV_INFO(ctrl_minor, dev).current_multiple = ATA_DEV_INFO(ctrl_minor, dev).current_multiple =
*(unsigned8 *)argp; *(uint8_t *)argp;
break; break;
default: default:
@@ -391,11 +391,11 @@ static void
ata_process_request(rtems_device_minor_number ctrl_minor) ata_process_request(rtems_device_minor_number ctrl_minor)
{ {
ata_req_t *areq; ata_req_t *areq;
unsigned16 byte; /* emphasize that only 8 low bits is meaningful */ uint16_t byte; /* emphasize that only 8 low bits is meaningful */
ata_queue_msg_t msg; ata_queue_msg_t msg;
unsigned8 i, dev; uint8_t i, dev;
unsigned16 val; uint16_t val;
unsigned16 data_bs; /* the number of 512-bytes sectors in one uint16_t data_bs; /* the number of 512-bytes sectors in one
* data block * data block
*/ */
ISR_Level level; ISR_Level level;
@@ -429,7 +429,7 @@ ata_process_request(rtems_device_minor_number ctrl_minor)
/* fill in all necessary registers on the controller */ /* fill in all necessary registers on the controller */
for (i=0; i< ATA_MAX_CMD_REG_OFFSET; i++) for (i=0; i< ATA_MAX_CMD_REG_OFFSET; i++)
{ {
unsigned32 reg = (1 << i); uint32_t reg = (1 << i);
if (areq->regs.to_write & reg) if (areq->regs.to_write & reg)
ide_controller_write_register(ctrl_minor, i, areq->regs.regs[i]); ide_controller_write_register(ctrl_minor, i, areq->regs.regs[i]);
} }
@@ -554,7 +554,7 @@ ata_add_to_controller_queue(rtems_device_minor_number ctrl_minor,
Chain_Append(&ata_ide_ctrls[ctrl_minor].reqs, &areq->link); Chain_Append(&ata_ide_ctrls[ctrl_minor].reqs, &areq->link);
if (Chain_Has_only_one_node(&ata_ide_ctrls[ctrl_minor].reqs)) if (Chain_Has_only_one_node(&ata_ide_ctrls[ctrl_minor].reqs))
{ {
unsigned16 val; uint16_t val;
ata_queue_msg_t msg; ata_queue_msg_t msg;
#ifdef DEBUG #ifdef DEBUG
@@ -589,7 +589,7 @@ ata_interrupt_handler(rtems_vector_number vec)
{ {
Chain_Node *the_node = ((Chain_Control *)(&ata_int_vec[vec]))->first; Chain_Node *the_node = ((Chain_Control *)(&ata_int_vec[vec]))->first;
ata_queue_msg_t msg; ata_queue_msg_t msg;
unsigned16 byte; /* emphasize that only 8 low bits is meaningful */ uint16_t byte; /* emphasize that only 8 low bits is meaningful */
for ( ; !Chain_Is_tail(&ata_int_vec[vec], the_node) ; ) for ( ; !Chain_Is_tail(&ata_int_vec[vec], the_node) ; )
{ {
@@ -621,9 +621,9 @@ ata_interrupt_handler(rtems_vector_number vec)
static inline void static inline void
ata_pio_in_protocol(rtems_device_minor_number ctrl_minor, ata_req_t *areq) ata_pio_in_protocol(rtems_device_minor_number ctrl_minor, ata_req_t *areq)
{ {
unsigned16 bs, val; uint16_t bs, val;
unsigned8 dev; uint8_t dev;
unsigned32 min_val; uint32_t min_val;
ata_queue_msg_t msg; ata_queue_msg_t msg;
dev = areq->regs.regs[IDE_REGISTER_DEVICE_HEAD] & dev = areq->regs.regs[IDE_REGISTER_DEVICE_HEAD] &
@@ -664,9 +664,9 @@ ata_pio_in_protocol(rtems_device_minor_number ctrl_minor, ata_req_t *areq)
static inline void static inline void
ata_pio_out_protocol(rtems_device_minor_number ctrl_minor, ata_req_t *areq) ata_pio_out_protocol(rtems_device_minor_number ctrl_minor, ata_req_t *areq)
{ {
unsigned16 bs, val; uint16_t bs, val;
unsigned8 dev; uint8_t dev;
unsigned32 min_val; uint32_t min_val;
ata_queue_msg_t msg; ata_queue_msg_t msg;
dev = areq->regs.regs[IDE_REGISTER_DEVICE_HEAD] & dev = areq->regs.regs[IDE_REGISTER_DEVICE_HEAD] &
@@ -715,11 +715,11 @@ static rtems_task
ata_queue_task(rtems_task_argument arg) ata_queue_task(rtems_task_argument arg)
{ {
ata_queue_msg_t msg; ata_queue_msg_t msg;
rtems_unsigned32 size; uint32_t size;
ata_req_t *areq; ata_req_t *areq;
rtems_device_minor_number ctrl_minor; rtems_device_minor_number ctrl_minor;
unsigned16 val; uint16_t val;
unsigned16 val1; uint16_t val1;
rtems_status_code rc; rtems_status_code rc;
ISR_Level level; ISR_Level level;
@@ -897,13 +897,13 @@ ata_initialize(rtems_device_major_number major,
rtems_device_minor_number minor_arg, rtems_device_minor_number minor_arg,
void *args) void *args)
{ {
unsigned32 ctrl_minor; uint32_t ctrl_minor;
rtems_status_code status; rtems_status_code status;
ata_req_t areq; ata_req_t areq;
blkdev_request1 breq; blkdev_request1 breq;
unsigned8 i, dev = 0; uint8_t i, dev = 0;
unsigned16 *buffer; uint16_t *buffer;
unsigned16 ec; uint16_t ec;
char name[ATA_MAX_NAME_LENGTH]; char name[ATA_MAX_NAME_LENGTH];
dev_t device; dev_t device;
ata_int_st_t *int_st; ata_int_st_t *int_st;
@@ -962,7 +962,7 @@ ata_initialize(rtems_device_major_number major,
return status; return status;
} }
buffer = (unsigned16 *)malloc(ATA_SECTOR_SIZE); buffer = (uint16_t *)malloc(ATA_SECTOR_SIZE);
if (buffer == NULL) if (buffer == NULL)
{ {
rtems_task_delete(ata_task_id); rtems_task_delete(ata_task_id);
@@ -1147,10 +1147,10 @@ ata_initialize(rtems_device_major_number major,
ATA_DEV_INFO(ctrl_minor, dev).lba_avaible = ATA_DEV_INFO(ctrl_minor, dev).lba_avaible =
(CF_LE_W(buffer[ATA_IDENT_WORD_CAPABILITIES]) >> 9) & 0x1; (CF_LE_W(buffer[ATA_IDENT_WORD_CAPABILITIES]) >> 9) & 0x1;
ATA_DEV_INFO(ctrl_minor, dev).max_multiple = ATA_DEV_INFO(ctrl_minor, dev).max_multiple =
(unsigned8) (CF_LE_W(buffer[ATA_IDENT_WORD_RW_MULT])); (uint8_t ) (CF_LE_W(buffer[ATA_IDENT_WORD_RW_MULT]));
ATA_DEV_INFO(ctrl_minor, dev).current_multiple = ATA_DEV_INFO(ctrl_minor, dev).current_multiple =
(CF_LE_W(buffer[ATA_IDENT_WORD_MULT_SECS]) & 0x100) ? (CF_LE_W(buffer[ATA_IDENT_WORD_MULT_SECS]) & 0x100) ?
(unsigned8)(CF_LE_W(buffer[ATA_IDENT_WORD_MULT_SECS])) : (uint8_t )(CF_LE_W(buffer[ATA_IDENT_WORD_MULT_SECS])) :
0; 0;
if ((CF_LE_W(buffer[ATA_IDENT_WORD_FIELD_VALIDITY]) & if ((CF_LE_W(buffer[ATA_IDENT_WORD_FIELD_VALIDITY]) &
@@ -1236,10 +1236,10 @@ static void
ata_process_request_on_init_phase(rtems_device_minor_number ctrl_minor, ata_process_request_on_init_phase(rtems_device_minor_number ctrl_minor,
ata_req_t *areq) ata_req_t *areq)
{ {
unsigned16 byte;/* emphasize that only 8 low bits is meaningful */ uint16_t byte;/* emphasize that only 8 low bits is meaningful */
unsigned8 i, dev; uint8_t i, dev;
unsigned16 val, val1; uint16_t val, val1;
unsigned16 data_bs; /* the number of 512 bytes sectors into one uint16_t data_bs; /* the number of 512 bytes sectors into one
* data block * data block
*/ */
assert(areq); assert(areq);
@@ -1260,7 +1260,7 @@ ata_process_request_on_init_phase(rtems_device_minor_number ctrl_minor,
for (i=0; i< ATA_MAX_CMD_REG_OFFSET; i++) for (i=0; i< ATA_MAX_CMD_REG_OFFSET; i++)
{ {
unsigned32 reg = (1 << i); uint32_t reg = (1 << i);
if (areq->regs.to_write & reg) if (areq->regs.to_write & reg)
ide_controller_write_register(ctrl_minor, i, ide_controller_write_register(ctrl_minor, i,
areq->regs.regs[i]); areq->regs.regs[i]);

32
c/src/libchip/ide/ata_internal.h
View File

@@ -210,9 +210,9 @@
/* Command block registers */ /* Command block registers */
typedef struct ata_registers_s { typedef struct ata_registers_s {
unsigned16 regs[8]; /* command block registers */ uint16_t regs[8]; /* command block registers */
unsigned16 to_read; /* mask: which ata registers should be read */ uint16_t to_read; /* mask: which ata registers should be read */
unsigned16 to_write; /* mask: which ata registers should be written */ uint16_t to_write; /* mask: which ata registers should be written */
} ata_registers_t; } ata_registers_t;
/* ATA request */ /* ATA request */
@@ -220,9 +220,9 @@ typedef struct ata_req_s {
Chain_Node link; /* link in requests chain */ Chain_Node link; /* link in requests chain */
char type; /* request type */ char type; /* request type */
ata_registers_t regs; /* ATA command */ ata_registers_t regs; /* ATA command */
rtems_unsigned32 cnt; /* Number of sectors to be exchanged */ uint32_t cnt; /* Number of sectors to be exchanged */
rtems_unsigned32 cbuf; /* number of current buffer from breq in use */ uint32_t cbuf; /* number of current buffer from breq in use */
rtems_unsigned32 pos; /* current position in 'cbuf' */ uint32_t pos; /* current position in 'cbuf' */
blkdev_request *breq; /* blkdev_request which corresponds to the blkdev_request *breq; /* blkdev_request which corresponds to the
* ata request * ata request
*/ */
@@ -295,21 +295,21 @@ typedef struct ata_ide_dev_s {
* ATA device description * ATA device description
*/ */
typedef struct ata_dev_s { typedef struct ata_dev_s {
signed8 present; /* 1 -- present, 0 -- not present, */ int8_t present; /* 1 -- present, 0 -- not present, */
/* -1 -- non-initialized */ /* -1 -- non-initialized */
unsigned16 cylinders; uint16_t cylinders;
unsigned16 heads; uint16_t heads;
unsigned16 sectors; uint16_t sectors;
unsigned32 lba_sectors; /* for small disk */ uint32_t lba_sectors; /* for small disk */
/* == cylinders * heads * sectors */ /* == cylinders * heads * sectors */
unsigned8 lba_avaible; /* 0 - CHS mode, 1 - LBA mode */ uint8_t lba_avaible; /* 0 - CHS mode, 1 - LBA mode */
unsigned8 max_multiple; /* 0 if READ/WRITE MULTIPLE is unsupported */ uint8_t max_multiple; /* 0 if READ/WRITE MULTIPLE is unsupported */
unsigned8 current_multiple; uint8_t current_multiple;
unsigned8 modes_avaible; /* OR of values for this modes */ uint8_t modes_avaible; /* OR of values for this modes */
unsigned8 mode_active; uint8_t mode_active;
} ata_dev_t; } ata_dev_t;
/* /*

18
c/src/libchip/ide/ide_controller.c
View File

@@ -84,10 +84,10 @@ ide_controller_initialize(rtems_device_major_number major,
*/ */
void void
ide_controller_read_data_block(rtems_device_minor_number minor, ide_controller_read_data_block(rtems_device_minor_number minor,
unsigned16 block_size, uint16_t block_size,
blkdev_sg_buffer *bufs, blkdev_sg_buffer *bufs,
rtems_unsigned32 *cbuf, uint32_t *cbuf,
rtems_unsigned32 *pos) uint32_t *pos)
{ {
IDE_Controller_Table[minor].fns->ctrl_read_block(minor, block_size, bufs, IDE_Controller_Table[minor].fns->ctrl_read_block(minor, block_size, bufs,
cbuf, pos); cbuf, pos);
@@ -109,10 +109,10 @@ ide_controller_read_data_block(rtems_device_minor_number minor,
*/ */
void void
ide_controller_write_data_block(rtems_device_minor_number minor, ide_controller_write_data_block(rtems_device_minor_number minor,
unsigned16 block_size, uint16_t block_size,
blkdev_sg_buffer *bufs, blkdev_sg_buffer *bufs,
rtems_unsigned32 *cbuf, uint32_t *cbuf,
rtems_unsigned32 *pos) uint32_t *pos)
{ {
IDE_Controller_Table[minor].fns->ctrl_write_block(minor, block_size, bufs, IDE_Controller_Table[minor].fns->ctrl_write_block(minor, block_size, bufs,
@@ -134,7 +134,7 @@ ide_controller_write_data_block(rtems_device_minor_number minor,
void void
ide_controller_read_register(rtems_device_minor_number minor, ide_controller_read_register(rtems_device_minor_number minor,
int reg, int reg,
unsigned16 *value) uint16_t *value)
{ {
IDE_Controller_Table[minor].fns->ctrl_reg_read(minor, reg, value); IDE_Controller_Table[minor].fns->ctrl_reg_read(minor, reg, value);
} }
@@ -153,7 +153,7 @@ ide_controller_read_register(rtems_device_minor_number minor,
*/ */
void void
ide_controller_write_register(rtems_device_minor_number minor, int reg, ide_controller_write_register(rtems_device_minor_number minor, int reg,
unsigned16 value) uint16_t value)
{ {
IDE_Controller_Table[minor].fns->ctrl_reg_write(minor, reg, value); IDE_Controller_Table[minor].fns->ctrl_reg_write(minor, reg, value);
} }
@@ -171,7 +171,7 @@ ide_controller_write_register(rtems_device_minor_number minor, int reg,
* error occured * error occured
*/ */
rtems_status_code rtems_status_code
ide_controller_config_io_speed(int minor, unsigned8 modes_avaible) ide_controller_config_io_speed(int minor, uint8_t modes_avaible)
{ {
return IDE_Controller_Table[minor].fns->ctrl_config_io_speed( return IDE_Controller_Table[minor].fns->ctrl_config_io_speed(
minor, minor,

24
c/src/libchip/ide/ide_ctrl_cfg.h
View File

@@ -38,29 +38,29 @@ typedef enum {
typedef struct ide_ctrl_fns_s { typedef struct ide_ctrl_fns_s {
boolean (*ctrl_probe)(int minor); /* probe routine */ boolean (*ctrl_probe)(int minor); /* probe routine */
void (*ctrl_initialize)(int minor); void (*ctrl_initialize)(int minor);
int (*ctrl_control)(int minor, unsigned32 command, int (*ctrl_control)(int minor, uint32_t command,
void *arg); void *arg);
/* /*
* Functions which allow read/write registers of a particular controller. * Functions which allow read/write registers of a particular controller.
* (these functions may be used from ide_controller_read_register, * (these functions may be used from ide_controller_read_register,
* ide_controller_write_register) * ide_controller_write_register)
*/ */
void (*ctrl_reg_read)(int minor, int regist, unsigned16 *value); void (*ctrl_reg_read)(int minor, int regist, uint16_t *value);
void (*ctrl_reg_write)(int minor, int regist, unsigned16 value); void (*ctrl_reg_write)(int minor, int regist, uint16_t value);
/* /*
* The function allows to escape overhead for read/write register * The function allows to escape overhead for read/write register
* functions calls * functions calls
*/ */
void (*ctrl_read_block)(int minor, unsigned16 block_size, void (*ctrl_read_block)(int minor, uint16_t block_size,
blkdev_sg_buffer *bufs, rtems_unsigned32 *cbuf, blkdev_sg_buffer *bufs, uint32_t *cbuf,
rtems_unsigned32 *pos); uint32_t *pos);
void (*ctrl_write_block)(int minor, unsigned16 block_size, void (*ctrl_write_block)(int minor, uint16_t block_size,
blkdev_sg_buffer *bufs, rtems_unsigned32 *cbuf, blkdev_sg_buffer *bufs, uint32_t *cbuf,
rtems_unsigned32 *pos); uint32_t *pos);
rtems_status_code (*ctrl_config_io_speed)(int minor, rtems_status_code (*ctrl_config_io_speed)(int minor,
unsigned8 modes_available); uint8_t modes_available);
} ide_ctrl_fns_t; } ide_ctrl_fns_t;
/* /*
@@ -72,10 +72,10 @@ typedef struct ide_controller_bsp_table_s {
ide_ctrl_devs_t type; /* chip type */ ide_ctrl_devs_t type; /* chip type */
ide_ctrl_fns_t *fns; /* pointer to the set of driver routines */ ide_ctrl_fns_t *fns; /* pointer to the set of driver routines */
boolean (*probe)(int minor); /* general probe routine */ boolean (*probe)(int minor); /* general probe routine */
unsigned8 status; /* initialized/non initialized. Should be set uint8_t status; /* initialized/non initialized. Should be set
* to zero by static initialization * to zero by static initialization
*/ */
unsigned32 port1; /* port number for the port of the device */ uint32_t port1; /* port number for the port of the device */
rtems_boolean int_driven; /* interrupt/poll driven */ rtems_boolean int_driven; /* interrupt/poll driven */
rtems_vector_number int_vec; /* the interrupt vector of the device */ rtems_vector_number int_vec; /* the interrupt vector of the device */
void *params; /* contains either device specific data or a void *params; /* contains either device specific data or a

18
c/src/libchip/ide/ide_ctrl_io.h
View File

@@ -103,10 +103,10 @@ extern "C" {
*/ */
void void
ide_controller_read_data_block(rtems_device_minor_number minor, ide_controller_read_data_block(rtems_device_minor_number minor,
unsigned16 block_size, uint16_t block_size,
blkdev_sg_buffer *bufs, blkdev_sg_buffer *bufs,
rtems_unsigned32 *cbuf, uint32_t *cbuf,
rtems_unsigned32 *pos); uint32_t *pos);
/* /*
* ide_controller_write_data_block -- * ide_controller_write_data_block --
@@ -124,10 +124,10 @@ ide_controller_read_data_block(rtems_device_minor_number minor,
*/ */
void void
ide_controller_write_data_block(rtems_device_minor_number minor, ide_controller_write_data_block(rtems_device_minor_number minor,
unsigned16 block_size, uint16_t block_size,
blkdev_sg_buffer *bufs, blkdev_sg_buffer *bufs,
rtems_unsigned32 *cbuf, uint32_t *cbuf,
rtems_unsigned32 *pos); uint32_t *pos);
/* /*
* ide_controller_read_register -- * ide_controller_read_register --
@@ -144,7 +144,7 @@ ide_controller_write_data_block(rtems_device_minor_number minor,
void void
ide_controller_read_register(rtems_device_minor_number minor, ide_controller_read_register(rtems_device_minor_number minor,
int reg, int reg,
unsigned16 *value); uint16_t *value);
/* /*
* ide_controller_write_register -- * ide_controller_write_register --
@@ -160,7 +160,7 @@ ide_controller_read_register(rtems_device_minor_number minor,
*/ */
void void
ide_controller_write_register(rtems_device_minor_number minor, ide_controller_write_register(rtems_device_minor_number minor,
int reg, unsigned16 value); int reg, uint16_t value);
/* /*
* ide_controller_config_io_speed -- * ide_controller_config_io_speed --
@@ -175,7 +175,7 @@ ide_controller_write_register(rtems_device_minor_number minor,
* error occured * error occured
*/ */
rtems_status_code rtems_status_code
ide_controller_config_io_speed(int minor, unsigned8 modes_avaible); ide_controller_config_io_speed(int minor, uint8_t modes_avaible);
#ifdef __cplusplus #ifdef __cplusplus
} }

2
c/src/libchip/network/cs8900.c
View File

@@ -198,7 +198,7 @@ static const char *cs8900_trace_labels[] =
* Assumes a micro-second timer such as the Coldfire. * Assumes a micro-second timer such as the Coldfire.
*/ */
rtems_unsigned32 rtems_read_timer (); uint32_t rtems_read_timer ();
static inline void static inline void
cs8900_trace (cs8900_device *cs, unsigned short key, unsigned long var) cs8900_trace (cs8900_device *cs, unsigned short key, unsigned long var)

18
c/src/libchip/network/dec21140.c
View File

@@ -170,9 +170,9 @@
/* message descriptor entry */ /* message descriptor entry */
struct MD { struct MD {
/* used by hardware */ /* used by hardware */
volatile unsigned32 status; volatile uint32_t status;
volatile unsigned32 counts; volatile uint32_t counts;
volatile unsigned32 buf1, buf2; volatile uint32_t buf1, buf2;
/* used by software */ /* used by software */
volatile struct mbuf *m; volatile struct mbuf *m;
volatile struct MD *next; volatile struct MD *next;
@@ -243,12 +243,12 @@ extern void Wait_X_ms( unsigned int timeToWait );
#define rtems_bsp_delay_in_bus_cycles(cycle) Wait_X_ms( cycle/100 ) #define rtems_bsp_delay_in_bus_cycles(cycle) Wait_X_ms( cycle/100 )
#define CPU_CACHE_ALIGNMENT_FOR_BUFFER PG_SIZE #define CPU_CACHE_ALIGNMENT_FOR_BUFFER PG_SIZE
inline void st_le32(volatile unsigned32 *addr, unsigned32 value) inline void st_le32(volatile uint32_t *addr, uint32_t value)
{ {
*(addr)=value ; *(addr)=value ;
} }
inline unsigned32 ld_le32(volatile unsigned32 *addr) inline uint32_t ld_le32(volatile uint32_t *addr)
{ {
return(*addr); return(*addr);
} }
@@ -425,10 +425,10 @@ static int dec21140IsOn(const rtems_irq_connect_data* irq)
static rtems_isr static rtems_isr
dec21140Enet_interrupt_handler ( struct dec21140_softc *sc ) dec21140Enet_interrupt_handler ( struct dec21140_softc *sc )
{ {
volatile unsigned32 *tbase; volatile uint32_t *tbase;
unsigned32 status; uint32_t status;
tbase = (unsigned32 *)(sc->base); tbase = (uint32_t *)(sc->base);
/* /*
* Read status * Read status
@@ -1190,7 +1190,7 @@ rtems_dec21140_driver_attach (struct rtems_bsdnet_ifconfig *config, int attach)
#if defined(__PPC__) #if defined(__PPC__)
pci_write_config_word(pbus, pdev, pfun, pci_write_config_word(pbus, pdev, pfun,
PCI_COMMAND, PCI_COMMAND,
(unsigned16) ( PCI_COMMAND_MEMORY | (uint16_t ) ( PCI_COMMAND_MEMORY |
PCI_COMMAND_MASTER | PCI_COMMAND_MASTER |
PCI_COMMAND_INVALIDATE | PCI_COMMAND_INVALIDATE |
PCI_COMMAND_WAIT | PCI_COMMAND_WAIT |

56
c/src/libchip/network/elnk.c
View File

@@ -204,12 +204,12 @@ extern void Wait_X_ms( unsigned int timeToWait );
#define rtems_bsp_delay_in_bus_cycles(cycle) Wait_X_ms( cycle/100 ) #define rtems_bsp_delay_in_bus_cycles(cycle) Wait_X_ms( cycle/100 )
#define CPU_CACHE_ALIGNMENT_FOR_BUFFER PG_SIZE #define CPU_CACHE_ALIGNMENT_FOR_BUFFER PG_SIZE
inline void st_le32(volatile unsigned32 *addr, unsigned32 value) inline void st_le32(volatile uint32_t *addr, uint32_t value)
{ {
*(addr)=value ; *(addr)=value ;
} }
inline unsigned32 ld_le32(volatile unsigned32 *addr) inline uint32_t ld_le32(volatile uint32_t *addr)
{ {
return(*addr); return(*addr);
} }
@@ -879,10 +879,10 @@ static struct xl_type xl_devs[] = {
struct RXMD struct RXMD
{ {
/* used by hardware */ /* used by hardware */
volatile unsigned32 next; volatile uint32_t next;
volatile unsigned32 status; volatile uint32_t status;
volatile unsigned32 addr; volatile uint32_t addr;
volatile unsigned32 length; volatile uint32_t length;
/* used by software */ /* used by software */
struct mbuf *mbuf; /* scratch variable used in the tx ring */ struct mbuf *mbuf; /* scratch variable used in the tx ring */
struct RXMD *next_md; struct RXMD *next_md;
@@ -900,15 +900,15 @@ struct RXMD
struct tfrag struct tfrag
{ {
volatile unsigned32 addr; volatile uint32_t addr;
volatile unsigned32 length; volatile uint32_t length;
} __attribute__ ((packed)); } __attribute__ ((packed));
struct TXMD struct TXMD
{ {
/* used by hardware */ /* used by hardware */
volatile unsigned32 next; volatile uint32_t next;
volatile unsigned32 status; volatile uint32_t status;
struct tfrag txfrags[NUM_FRAGS]; struct tfrag txfrags[NUM_FRAGS];
/* used by software */ /* used by software */
struct mbuf *mbuf; /* scratch variable used in the tx ring */ struct mbuf *mbuf; /* scratch variable used in the tx ring */
@@ -940,7 +940,7 @@ struct elnk_softc
struct TXMD *tx_ring, *last_tx_md, *last_txchain_head; struct TXMD *tx_ring, *last_tx_md, *last_txchain_head;
rtems_id stat_timer_id; rtems_id stat_timer_id;
unsigned32 stats_update_ticks; uint32_t stats_update_ticks;
struct xl_stats xl_stats; struct xl_stats xl_stats;
@@ -2047,7 +2047,7 @@ elnk_interrupt_handler ( struct elnk_softc *sc )
#if 0 #if 0
{ {
unsigned16 intstatus, intenable, indenable; uint16_t intstatus, intenable, indenable;
intstatus = CSR_READ_2(sc, XL_STATUS ); intstatus = CSR_READ_2(sc, XL_STATUS );
@@ -2132,7 +2132,7 @@ elnk_initialize_hardware (struct elnk_softc *sc)
*/ */
for(i=0 ; i<sc->numRxbuffers; i++) for(i=0 ; i<sc->numRxbuffers; i++)
{ {
if( ((unsigned32)&sc->rx_ring[i] & 0x7) ) if( ((uint32_t )&sc->rx_ring[i] & 0x7) )
{ {
rtems_panic ("etherlink : unit elnk%d rx ring entry %d not aligned to 8 bytes\n", sc->xl_unit, i ); rtems_panic ("etherlink : unit elnk%d rx ring entry %d not aligned to 8 bytes\n", sc->xl_unit, i );
} }
@@ -2151,8 +2151,8 @@ elnk_initialize_hardware (struct elnk_softc *sc)
sc->rx_ring[i].mbuf = m; sc->rx_ring[i].mbuf = m;
st_le32( &sc->rx_ring[i].status, 0); st_le32( &sc->rx_ring[i].status, 0);
st_le32( &sc->rx_ring[i].next, (unsigned32)phys_to_bus( nxtmd )); st_le32( &sc->rx_ring[i].next, (uint32_t )phys_to_bus( nxtmd ));
st_le32( &sc->rx_ring[i].addr, (unsigned32)phys_to_bus( mtod(m, void *) )); st_le32( &sc->rx_ring[i].addr, (uint32_t )phys_to_bus( mtod(m, void *) ));
st_le32( &sc->rx_ring[i].length, XL_LAST_FRAG | XL_PACKET_SIZE ); st_le32( &sc->rx_ring[i].length, XL_LAST_FRAG | XL_PACKET_SIZE );
} }
sc->curr_rx_md = &sc->rx_ring[0]; sc->curr_rx_md = &sc->rx_ring[0];
@@ -2181,7 +2181,7 @@ elnk_initialize_hardware (struct elnk_softc *sc)
for(i=0 ; i<sc->numTxbuffers; i++) for(i=0 ; i<sc->numTxbuffers; i++)
{ {
if( ((unsigned32)&sc->tx_ring[i] & 0x7) ) if( ((uint32_t )&sc->tx_ring[i] & 0x7) )
{ {
rtems_panic ("etherlink : unit elnk%d tx ring entry %d not aligned to 8 bytes\n", sc->xl_unit, i ); rtems_panic ("etherlink : unit elnk%d tx ring entry %d not aligned to 8 bytes\n", sc->xl_unit, i );
} }
@@ -2327,7 +2327,7 @@ elnk_rxDaemon (void *arg)
m->m_pkthdr.rcvif = ifp; m->m_pkthdr.rcvif = ifp;
rmd->mbuf = m; rmd->mbuf = m;
st_le32( &rmd->status, 0 ); st_le32( &rmd->status, 0 );
st_le32( &rmd->addr, (unsigned32)phys_to_bus(mtod(m, void *)) ); st_le32( &rmd->addr, (uint32_t )phys_to_bus(mtod(m, void *)) );
} }
else else
{ {
@@ -2415,7 +2415,7 @@ elnk_txDaemon (void *arg)
*/ */
{ {
struct TXMD *chainhead, *chaintail; struct TXMD *chainhead, *chaintail;
unsigned32 esize; uint32_t esize;
if( rtems_message_queue_receive( chainRecoveryQueue, &chainhead, &esize, if( rtems_message_queue_receive( chainRecoveryQueue, &chainhead, &esize,
RTEMS_NO_WAIT, 0) == RTEMS_SUCCESSFUL ) RTEMS_NO_WAIT, 0) == RTEMS_SUCCESSFUL )
@@ -2475,7 +2475,7 @@ elnk_txDaemon (void *arg)
for(i=0; i< NUM_FRAGS; i++) for(i=0; i< NUM_FRAGS; i++)
{ {
st_le32( &nextmd->txfrags[i].length, ((m->m_next)?0:XL_LAST_FRAG) | ( m->m_len & XL_TXSTAT_LENMASK) ); st_le32( &nextmd->txfrags[i].length, ((m->m_next)?0:XL_LAST_FRAG) | ( m->m_len & XL_TXSTAT_LENMASK) );
st_le32( &nextmd->txfrags[i].addr, (unsigned32)phys_to_bus( m->m_data ) ); st_le32( &nextmd->txfrags[i].addr, (uint32_t )phys_to_bus( m->m_data ) );
if ((m = m->m_next) == NULL) if ((m = m->m_next) == NULL)
break; break;
} }
@@ -2491,7 +2491,7 @@ elnk_txDaemon (void *arg)
{ {
char *pkt = bus_to_phys( ld_le32( &nextmd->txfrags[i].addr )), *delim; char *pkt = bus_to_phys( ld_le32( &nextmd->txfrags[i].addr )), *delim;
int i; int i;
printk("unit %d queued pkt (%08x) ", sc->xl_unit, (unsigned32)pkt ); printk("unit %d queued pkt (%08x) ", sc->xl_unit, (uint32_t )pkt );
for(delim="", i=0; i < sizeof(struct ether_header); i++, delim=":") for(delim="", i=0; i < sizeof(struct ether_header); i++, delim=":")
printk("%s%02x", delim, (char) pkt[i] ); printk("%s%02x", delim, (char) pkt[i] );
printk("\n"); printk("\n");
@@ -2522,7 +2522,7 @@ elnk_txDaemon (void *arg)
else else
{ {
/* hook this packet to the previous one */ /* hook this packet to the previous one */
st_le32( &lastmd->next, (unsigned32)phys_to_bus( nextmd )); st_le32( &lastmd->next, (uint32_t )phys_to_bus( nextmd ));
} }
++chainCount; ++chainCount;
@@ -2574,7 +2574,7 @@ elnk_txDaemon (void *arg)
printk("unit %d queued %d pkts, lastpkt status %08X\n", printk("unit %d queued %d pkts, lastpkt status %08X\n",
sc->xl_unit, sc->xl_unit,
chainCount, chainCount,
(unsigned32)ld_le32( &lastmd->status) ); (uint32_t )ld_le32( &lastmd->status) );
#endif #endif
if( sc->tx_idle == 0 && CSR_READ_4(sc, XL_DOWNLIST_PTR) == 0 ) if( sc->tx_idle == 0 && CSR_READ_4(sc, XL_DOWNLIST_PTR) == 0 )
@@ -2657,7 +2657,7 @@ elnk_init (void *arg)
sc->tx_idle = -1; sc->tx_idle = -1;
{ {
unsigned32 cr,sr; uint32_t cr,sr;
xl_miibus_writereg(sc, 0x18, MII_BMCR, BMCR_RESET ); xl_miibus_writereg(sc, 0x18, MII_BMCR, BMCR_RESET );
@@ -2927,7 +2927,7 @@ elnk_stop (struct elnk_softc *sc)
*/ */
{ {
struct TXMD *chainhead; struct TXMD *chainhead;
unsigned32 esize; uint32_t esize;
while( rtems_message_queue_receive( chainRecoveryQueue, &chainhead, &esize, while( rtems_message_queue_receive( chainRecoveryQueue, &chainhead, &esize,
RTEMS_NO_WAIT, 0) == RTEMS_SUCCESSFUL ); RTEMS_NO_WAIT, 0) == RTEMS_SUCCESSFUL );
@@ -3329,7 +3329,7 @@ rtems_elnk_driver_attach (struct rtems_bsdnet_ifconfig *config, int attach)
*/ */
pci_write_config_word(pbus, pdev, pfun, pci_write_config_word(pbus, pdev, pfun,
PCI_COMMAND, PCI_COMMAND,
(unsigned16)( PCI_COMMAND_IO | (uint16_t )( PCI_COMMAND_IO |
PCI_COMMAND_MASTER | PCI_COMMAND_MASTER |
PCI_COMMAND_INVALIDATE | PCI_COMMAND_INVALIDATE |
PCI_COMMAND_WAIT ) ); PCI_COMMAND_WAIT ) );
@@ -3340,7 +3340,7 @@ rtems_elnk_driver_attach (struct rtems_bsdnet_ifconfig *config, int attach)
PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_0,
&lvalue); &lvalue);
sc->ioaddr = (unsigned32)lvalue & PCI_BASE_ADDRESS_IO_MASK; sc->ioaddr = (uint32_t )lvalue & PCI_BASE_ADDRESS_IO_MASK;
/* /*
** Store the interrupt name, we'll use it later when we initialize ** Store the interrupt name, we'll use it later when we initialize
** the board. ** the board.
@@ -3360,8 +3360,8 @@ rtems_elnk_driver_attach (struct rtems_bsdnet_ifconfig *config, int attach)
*/ */
{ {
unsigned8 pci_latency; uint8_t pci_latency;
unsigned8 new_latency = 248; uint8_t new_latency = 248;
/* Check the PCI latency value. On the 3c590 series the latency timer /* Check the PCI latency value. On the 3c590 series the latency timer
must be set to the maximum value to avoid data corruption that occurs must be set to the maximum value to avoid data corruption that occurs

2
c/src/libchip/network/if_fxp.c
View File

@@ -76,7 +76,7 @@
#include <bsp.h> #include <bsp.h>
#include <pcibios.h> #include <pcibios.h>
#include <irq.h> #include <irq.h>
#include "pci.h" #include <rtems/pci.h>
#ifdef NS #ifdef NS
#include <netns/ns.h> #include <netns/ns.h>

12
c/src/libchip/network/open_eth.c
View File

@@ -162,7 +162,7 @@ static struct open_eth_softc oc;
static rtems_isr static rtems_isr
open_eth_interrupt_handler (rtems_vector_number v) open_eth_interrupt_handler (rtems_vector_number v)
{ {
unsigned32 status; uint32_t status;
/* read and clear interrupt cause */ /* read and clear interrupt cause */
@@ -190,7 +190,7 @@ open_eth_interrupt_handler (rtems_vector_number v)
*/ */
} }
static unsigned32 read_mii(unsigned32 addr) static uint32_t read_mii(uint32_t addr)
{ {
while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {} while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
oc.regs->miiaddress = addr << 8; oc.regs->miiaddress = addr << 8;
@@ -204,7 +204,7 @@ static unsigned32 read_mii(unsigned32 addr)
} }
} }
static void write_mii(unsigned32 addr, unsigned32 data) static void write_mii(uint32_t addr, uint32_t data)
{ {
while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {} while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
oc.regs->miiaddress = addr << 8; oc.regs->miiaddress = addr << 8;
@@ -300,7 +300,7 @@ open_eth_initialize_hardware (struct open_eth_softc *sc)
MCLGET (m, M_WAIT); MCLGET (m, M_WAIT);
m->m_pkthdr.rcvif = &sc->arpcom.ac_if; m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
sc->rxdesc[i].m = m; sc->rxdesc[i].m = m;
sc->regs->xd[i + sc->txbufs].addr = mtod (m, unsigned32 *); sc->regs->xd[i + sc->txbufs].addr = mtod (m, uint32_t *);
sc->regs->xd[i + sc->txbufs].len_status = sc->regs->xd[i + sc->txbufs].len_status =
OETH_RX_BD_EMPTY | OETH_RX_BD_IRQ; OETH_RX_BD_EMPTY | OETH_RX_BD_IRQ;
#ifdef OPEN_ETH_DEBUG #ifdef OPEN_ETH_DEBUG
@@ -418,7 +418,7 @@ open_eth_rxDaemon (void *arg)
m->m_pkthdr.rcvif = ifp; m->m_pkthdr.rcvif = ifp;
dp->rxdesc[dp->rx_ptr].m = m; dp->rxdesc[dp->rx_ptr].m = m;
dp->regs->xd[dp->rx_ptr + dp->txbufs].addr = dp->regs->xd[dp->rx_ptr + dp->txbufs].addr =
(unsigned32 *) mtod (m, void *); (uint32_t *) mtod (m, void *);
dp->rxPackets++; dp->rxPackets++;
} }
@@ -458,7 +458,7 @@ sendpacket (struct ifnet *ifp, struct mbuf *m)
len = 0; len = 0;
temp = (unsigned char *) dp->txdesc[dp->tx_ptr].buf; temp = (unsigned char *) dp->txdesc[dp->tx_ptr].buf;
dp->regs->xd[dp->tx_ptr].addr = (unsigned32 *) temp; dp->regs->xd[dp->tx_ptr].addr = (uint32_t *) temp;
#ifdef OPEN_ETH_DEBUG #ifdef OPEN_ETH_DEBUG
printf("TXD: 0x%08x\n", (int) m->m_data); printf("TXD: 0x%08x\n", (int) m->m_data);

56
c/src/libchip/network/open_eth.h
View File

@@ -8,45 +8,45 @@
/* Configuration Information */ /* Configuration Information */
typedef struct { typedef struct {
unsigned32 base_address; uint32_t base_address;
unsigned32 vector; uint32_t vector;
unsigned32 txd_count; uint32_t txd_count;
unsigned32 rxd_count; uint32_t rxd_count;
} open_eth_configuration_t; } open_eth_configuration_t;
/* Ethernet buffer descriptor */ /* Ethernet buffer descriptor */
typedef struct _oeth_rxtxdesc { typedef struct _oeth_rxtxdesc {
volatile unsigned32 len_status; /* Length and status */ volatile uint32_t len_status; /* Length and status */
volatile unsigned32 *addr; /* Buffer pointer */ volatile uint32_t *addr; /* Buffer pointer */
} oeth_rxtxdesc; } oeth_rxtxdesc;
/* Ethernet configuration registers */ /* Ethernet configuration registers */
typedef struct _oeth_regs { typedef struct _oeth_regs {
volatile unsigned32 moder; /* Mode Register */ volatile uint32_t moder; /* Mode Register */
volatile unsigned32 int_src; /* Interrupt Source Register */ volatile uint32_t int_src; /* Interrupt Source Register */
volatile unsigned32 int_mask; /* Interrupt Mask Register */ volatile uint32_t int_mask; /* Interrupt Mask Register */
volatile unsigned32 ipgt; /* Back to Bak Inter Packet Gap Register */ volatile uint32_t ipgt; /* Back to Bak Inter Packet Gap Register */
volatile unsigned32 ipgr1; /* Non Back to Back Inter Packet Gap Register 1 */ volatile uint32_t ipgr1; /* Non Back to Back Inter Packet Gap Register 1 */
volatile unsigned32 ipgr2; /* Non Back to Back Inter Packet Gap Register 2 */ volatile uint32_t ipgr2; /* Non Back to Back Inter Packet Gap Register 2 */
volatile unsigned32 packet_len; /* Packet Length Register (min. and max.) */ volatile uint32_t packet_len; /* Packet Length Register (min. and max.) */
volatile unsigned32 collconf; /* Collision and Retry Configuration Register */ volatile uint32_t collconf; /* Collision and Retry Configuration Register */
volatile unsigned32 tx_bd_num; /* Transmit Buffer Descriptor Number Register */ volatile uint32_t tx_bd_num; /* Transmit Buffer Descriptor Number Register */
volatile unsigned32 ctrlmoder; /* Control Module Mode Register */ volatile uint32_t ctrlmoder; /* Control Module Mode Register */
volatile unsigned32 miimoder; /* MII Mode Register */ volatile uint32_t miimoder; /* MII Mode Register */
volatile unsigned32 miicommand; /* MII Command Register */ volatile uint32_t miicommand; /* MII Command Register */
volatile unsigned32 miiaddress; /* MII Address Register */ volatile uint32_t miiaddress; /* MII Address Register */
volatile unsigned32 miitx_data; /* MII Transmit Data Register */ volatile uint32_t miitx_data; /* MII Transmit Data Register */
volatile unsigned32 miirx_data; /* MII Receive Data Register */ volatile uint32_t miirx_data; /* MII Receive Data Register */
volatile unsigned32 miistatus; /* MII Status Register */ volatile uint32_t miistatus; /* MII Status Register */
volatile unsigned32 mac_addr0; /* MAC Individual Address Register 0 */ volatile uint32_t mac_addr0; /* MAC Individual Address Register 0 */
volatile unsigned32 mac_addr1; /* MAC Individual Address Register 1 */ volatile uint32_t mac_addr1; /* MAC Individual Address Register 1 */
volatile unsigned32 hash_addr0; /* Hash Register 0 */ volatile uint32_t hash_addr0; /* Hash Register 0 */
volatile unsigned32 hash_addr1; /* Hash Register 1 */ volatile uint32_t hash_addr1; /* Hash Register 1 */
volatile unsigned32 txctrl; /* Transmitter control register */ volatile uint32_t txctrl; /* Transmitter control register */
unsigned32 empty[235]; /* Unused space */ uint32_t empty[235]; /* Unused space */
oeth_rxtxdesc xd[128]; /* TX & RX descriptors */ oeth_rxtxdesc xd[128]; /* TX & RX descriptors */
} oeth_regs; } oeth_regs;

32
c/src/libchip/network/sonic.c
View File

@@ -58,7 +58,7 @@
* XXX fix this * XXX fix this
*/ */
void *set_vector(void *, unsigned32, unsigned32); void *set_vector(void *, uint32_t , uint32_t );
#if (SONIC_DEBUG & SONIC_DEBUG_DUMP_MBUFS) #if (SONIC_DEBUG & SONIC_DEBUG_DUMP_MBUFS)
#include <rtems/dumpbuf.h> #include <rtems/dumpbuf.h>
@@ -116,9 +116,9 @@ void *set_vector(void *, unsigned32, unsigned32);
/* /*
* Macros for manipulating 32-bit pointers as 16-bit fragments * Macros for manipulating 32-bit pointers as 16-bit fragments
*/ */
#define LSW(p) ((rtems_unsigned16)((rtems_unsigned32)(p))) #define LSW(p) ((uint16_t )((uint32_t )(p)))
#define MSW(p) ((rtems_unsigned16)((rtems_unsigned32)(p) >> 16)) #define MSW(p) ((uint16_t )((uint32_t )(p) >> 16))
#define PTR(m,l) ((void*)(((rtems_unsigned16)(m)<<16)|(rtems_unsigned16)(l))) #define PTR(m,l) ((void*)(((uint16_t )(m)<<16)|(uint16_t )(l)))
/* /*
* Hardware-specific storage * Hardware-specific storage
@@ -151,8 +151,8 @@ struct sonic_softc {
/* /*
* Data Configuration Register values * Data Configuration Register values
*/ */
rtems_unsigned32 dcr_value; uint32_t dcr_value;
rtems_unsigned32 dc2_value; uint32_t dc2_value;
/* /*
* Indicates configuration * Indicates configuration
@@ -263,7 +263,7 @@ void sonic_print_rx_descriptor(
void sonic_enable_interrupts( void sonic_enable_interrupts(
struct sonic_softc *sc, struct sonic_softc *sc,
unsigned32 mask uint32_t mask
) )
{ {
void *rp = sc->sonic; void *rp = sc->sonic;
@@ -280,7 +280,7 @@ void sonic_enable_interrupts(
void sonic_disable_interrupts( void sonic_disable_interrupts(
struct sonic_softc *sc, struct sonic_softc *sc,
unsigned32 mask uint32_t mask
) )
{ {
void *rp = sc->sonic; void *rp = sc->sonic;
@@ -297,7 +297,7 @@ void sonic_disable_interrupts(
void sonic_clear_interrupts( void sonic_clear_interrupts(
struct sonic_softc *sc, struct sonic_softc *sc,
unsigned32 mask uint32_t mask
) )
{ {
void *rp = sc->sonic; void *rp = sc->sonic;
@@ -310,7 +310,7 @@ void sonic_clear_interrupts(
void sonic_command( void sonic_command(
struct sonic_softc *sc, struct sonic_softc *sc,
unsigned32 mask uint32_t mask
) )
{ {
void *rp = sc->sonic; void *rp = sc->sonic;
@@ -402,7 +402,7 @@ SONIC_STATIC void sonic_stats (struct sonic_softc *sc)
SONIC_STATIC rtems_isr sonic_interrupt_handler (rtems_vector_number v) SONIC_STATIC rtems_isr sonic_interrupt_handler (rtems_vector_number v)
{ {
struct sonic_softc *sc = sonic_softc; struct sonic_softc *sc = sonic_softc;
unsigned32 isr, imr; uint32_t isr, imr;
void *rp; void *rp;
#if (NSONIC > 1) #if (NSONIC > 1)
@@ -465,7 +465,7 @@ SONIC_STATIC rtems_isr sonic_interrupt_handler (rtems_vector_number v)
SONIC_STATIC void sonic_retire_tda (struct sonic_softc *sc) SONIC_STATIC void sonic_retire_tda (struct sonic_softc *sc)
{ {
rtems_unsigned16 status; uint16_t status;
unsigned int collisions; unsigned int collisions;
struct mbuf *m, *n; struct mbuf *m, *n;
@@ -500,7 +500,7 @@ SONIC_STATIC void sonic_retire_tda (struct sonic_softc *sc)
* Restart the transmitter if there are * Restart the transmitter if there are
* packets waiting to go. * packets waiting to go.
*/ */
rtems_unsigned16 link; uint16_t link;
#if (SONIC_DEBUG & SONIC_DEBUG_ERRORS) #if (SONIC_DEBUG & SONIC_DEBUG_ERRORS)
printf("restarting sonic after error\n"); printf("restarting sonic after error\n");
#endif #endif
@@ -930,10 +930,10 @@ SONIC_STATIC void sonic_rxDaemon (void *arg)
struct ifnet *ifp = &sc->arpcom.ac_if; struct ifnet *ifp = &sc->arpcom.ac_if;
void *rp = sc->sonic; void *rp = sc->sonic;
struct mbuf *m; struct mbuf *m;
rtems_unsigned16 status; uint16_t status;
ReceiveDescriptorPointer_t rdp; ReceiveDescriptorPointer_t rdp;
ReceiveResourcePointer_t rwp, rea; ReceiveResourcePointer_t rwp, rea;
rtems_unsigned16 newMissedTally, oldMissedTally; uint16_t newMissedTally, oldMissedTally;
rwp = sc->rsa; rwp = sc->rsa;
rea = sc->rea; rea = sc->rea;
@@ -985,7 +985,7 @@ SONIC_STATIC void sonic_rxDaemon (void *arg)
rdp->byte_count &= 0x0ffff; /* ERC32 pollutes msb of byte_count */ rdp->byte_count &= 0x0ffff; /* ERC32 pollutes msb of byte_count */
m = rdp->mbufp; m = rdp->mbufp;
m->m_len = m->m_pkthdr.len = rdp->byte_count - m->m_len = m->m_pkthdr.len = rdp->byte_count -
sizeof(rtems_unsigned32) - sizeof(uint32_t ) -
sizeof(struct ether_header); sizeof(struct ether_header);
eh = mtod (m, struct ether_header *); eh = mtod (m, struct ether_header *);
m->m_data += sizeof(struct ether_header); m->m_data += sizeof(struct ether_header);

70
c/src/libchip/network/sonic.h
View File

@@ -71,22 +71,22 @@ extern char SONIC_Reg_name[64][6];
typedef void (*sonic_write_register_t)( typedef void (*sonic_write_register_t)(
void *base, void *base,
unsigned32 regno, uint32_t regno,
unsigned32 value uint32_t value
); );
typedef unsigned32 (*sonic_read_register_t)( typedef uint32_t (*sonic_read_register_t)(
void *base, void *base,
unsigned32 regno uint32_t regno
); );
typedef struct { typedef struct {
unsigned32 base_address; uint32_t base_address;
unsigned32 vector; uint32_t vector;
unsigned32 dcr_value; uint32_t dcr_value;
unsigned32 dc2_value; uint32_t dc2_value;
unsigned32 tda_count; uint32_t tda_count;
unsigned32 rda_count; uint32_t rda_count;
sonic_write_register_t write_register; sonic_write_register_t write_register;
sonic_read_register_t read_register; sonic_read_register_t read_register;
} sonic_configuration_t; } sonic_configuration_t;
@@ -302,32 +302,32 @@ typedef struct {
*/ */
#define MAXIMUM_FRAGS_PER_DESCRIPTOR 6 #define MAXIMUM_FRAGS_PER_DESCRIPTOR 6
struct TransmitDescriptor { struct TransmitDescriptor {
rtems_unsigned32 status; uint32_t status;
rtems_unsigned32 pkt_config; uint32_t pkt_config;
rtems_unsigned32 pkt_size; uint32_t pkt_size;
rtems_unsigned32 frag_count; uint32_t frag_count;
/* /*
* Packet fragment pointers * Packet fragment pointers
*/ */
struct TransmitDescriptorFragLink { struct TransmitDescriptorFragLink {
rtems_unsigned32 frag_lsw; /* LSW of fragment address */ uint32_t frag_lsw; /* LSW of fragment address */
#define frag_link frag_lsw #define frag_link frag_lsw
rtems_unsigned32 frag_msw; /* MSW of fragment address */ uint32_t frag_msw; /* MSW of fragment address */
rtems_unsigned32 frag_size; uint32_t frag_size;
} frag[MAXIMUM_FRAGS_PER_DESCRIPTOR]; } frag[MAXIMUM_FRAGS_PER_DESCRIPTOR];
/* /*
* Space for link if all fragment pointers are used. * Space for link if all fragment pointers are used.
*/ */
rtems_unsigned32 link_pad; uint32_t link_pad;
/* /*
* Extra RTEMS stuff * Extra RTEMS stuff
*/ */
struct TransmitDescriptor *next; /* Circularly-linked list */ struct TransmitDescriptor *next; /* Circularly-linked list */
struct mbuf *mbufp; /* First mbuf in packet */ struct mbuf *mbufp; /* First mbuf in packet */
volatile rtems_unsigned32 *linkp; /* Pointer to un[xxx].link */ volatile uint32_t *linkp; /* Pointer to un[xxx].link */
}; };
typedef struct TransmitDescriptor TransmitDescriptor_t; typedef struct TransmitDescriptor TransmitDescriptor_t;
typedef volatile TransmitDescriptor_t *TransmitDescriptorPointer_t; typedef volatile TransmitDescriptor_t *TransmitDescriptorPointer_t;
@@ -378,10 +378,10 @@ typedef volatile TransmitDescriptor_t *TransmitDescriptorPointer_t;
* receive resource entry corresponds to one correctly-received packet. * receive resource entry corresponds to one correctly-received packet.
*/ */
struct ReceiveResource { struct ReceiveResource {
rtems_unsigned32 buff_ptr_lsw; /* LSW of RBA address */ uint32_t buff_ptr_lsw; /* LSW of RBA address */
rtems_unsigned32 buff_ptr_msw; /* MSW of RBA address */ uint32_t buff_ptr_msw; /* MSW of RBA address */
rtems_unsigned32 buff_wc_lsw; /* LSW of RBA size (16-bit words) */ uint32_t buff_wc_lsw; /* LSW of RBA size (16-bit words) */
rtems_unsigned32 buff_wc_msw; /* MSW of RBA size (16-bit words) */ uint32_t buff_wc_msw; /* MSW of RBA size (16-bit words) */
}; };
typedef struct ReceiveResource ReceiveResource_t; typedef struct ReceiveResource ReceiveResource_t;
typedef volatile ReceiveResource_t *ReceiveResourcePointer_t; typedef volatile ReceiveResource_t *ReceiveResourcePointer_t;
@@ -391,13 +391,13 @@ typedef volatile ReceiveResource_t *ReceiveResourcePointer_t;
* There is one receive descriptor for each packet received. * There is one receive descriptor for each packet received.
*/ */
struct ReceiveDescriptor { struct ReceiveDescriptor {
rtems_unsigned32 status; uint32_t status;
rtems_unsigned32 byte_count; uint32_t byte_count;
rtems_unsigned32 pkt_lsw; /* LSW of packet address */ uint32_t pkt_lsw; /* LSW of packet address */
rtems_unsigned32 pkt_msw; /* MSW of packet address */ uint32_t pkt_msw; /* MSW of packet address */
rtems_unsigned32 seq_no; uint32_t seq_no;
rtems_unsigned32 link; uint32_t link;
rtems_unsigned32 in_use; uint32_t in_use;
/* /*
* Extra RTEMS stuff * Extra RTEMS stuff
@@ -409,11 +409,11 @@ typedef struct ReceiveDescriptor ReceiveDescriptor_t;
typedef volatile ReceiveDescriptor_t *ReceiveDescriptorPointer_t; typedef volatile ReceiveDescriptor_t *ReceiveDescriptorPointer_t;
typedef struct { typedef struct {
rtems_unsigned32 cep; /* CAM Entry Pointer */ uint32_t cep; /* CAM Entry Pointer */
rtems_unsigned32 cap0; /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */ uint32_t cap0; /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
rtems_unsigned32 cap1; /* CAM Address Port 1 xx-xx-YY-YY-xxxx */ uint32_t cap1; /* CAM Address Port 1 xx-xx-YY-YY-xxxx */
rtems_unsigned32 cap2; /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */ uint32_t cap2; /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
rtems_unsigned32 ce; uint32_t ce;
} CamDescriptor_t; } CamDescriptor_t;
typedef volatile CamDescriptor_t *CamDescriptorPointer_t; typedef volatile CamDescriptor_t *CamDescriptorPointer_t;

18
c/src/libchip/rtc/icm7170.c
View File

@@ -41,9 +41,9 @@ void icm7170_initialize(
int minor int minor
) )
{ {
unsigned32 icm7170; uint32_t icm7170;
setRegister_f setReg; setRegister_f setReg;
unsigned32 clock; uint32_t clock;
icm7170 = RTC_Table[ minor ].ulCtrlPort1; icm7170 = RTC_Table[ minor ].ulCtrlPort1;
setReg = RTC_Table[ minor ].setRegister; setReg = RTC_Table[ minor ].setRegister;
@@ -52,7 +52,7 @@ void icm7170_initialize(
* Initialize the RTC with the proper clock frequency * Initialize the RTC with the proper clock frequency
*/ */
clock = (unsigned32) RTC_Table[ minor ].pDeviceParams; clock = (uint32_t ) RTC_Table[ minor ].pDeviceParams;
(*setReg)( icm7170, ICM7170_CONTROL, 0x0c | clock ); (*setReg)( icm7170, ICM7170_CONTROL, 0x0c | clock );
} }
@@ -65,10 +65,10 @@ int icm7170_get_time(
rtems_time_of_day *time rtems_time_of_day *time
) )
{ {
unsigned32 icm7170; uint32_t icm7170;
getRegister_f getReg; getRegister_f getReg;
setRegister_f setReg; setRegister_f setReg;
unsigned32 year; uint32_t year;
icm7170 = RTC_Table[ minor ].ulCtrlPort1; icm7170 = RTC_Table[ minor ].ulCtrlPort1;
getReg = RTC_Table[ minor ].getRegister; getReg = RTC_Table[ minor ].getRegister;
@@ -118,16 +118,16 @@ int icm7170_set_time(
rtems_time_of_day *time rtems_time_of_day *time
) )
{ {
unsigned32 icm7170; uint32_t icm7170;
getRegister_f getReg; getRegister_f getReg;
setRegister_f setReg; setRegister_f setReg;
unsigned32 year; uint32_t year;
unsigned32 clock; uint32_t clock;
icm7170 = RTC_Table[ minor ].ulCtrlPort1; icm7170 = RTC_Table[ minor ].ulCtrlPort1;
getReg = RTC_Table[ minor ].getRegister; getReg = RTC_Table[ minor ].getRegister;
setReg = RTC_Table[ minor ].setRegister; setReg = RTC_Table[ minor ].setRegister;
clock = (unsigned32) RTC_Table[ minor ].pDeviceParams; clock = (uint32_t ) RTC_Table[ minor ].pDeviceParams;
year = time->year; year = time->year;

48
c/src/libchip/rtc/icm7170.h
View File

@@ -51,48 +51,48 @@ extern rtc_fns icm7170_fns;
* Default register access routines * Default register access routines
*/ */
unsigned32 icm7170_get_register( /* registers are at 1 byte boundaries */ uint32_t icm7170_get_register( /* registers are at 1 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void icm7170_set_register( void icm7170_set_register(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
); );
unsigned32 icm7170_get_register_2( /* registers are at 2 byte boundaries */ uint32_t icm7170_get_register_2( /* registers are at 2 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void icm7170_set_register_2( void icm7170_set_register_2(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
); );
unsigned32 icm7170_get_register_4( /* registers are at 4 byte boundaries */ uint32_t icm7170_get_register_4( /* registers are at 4 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void icm7170_set_register_4( void icm7170_set_register_4(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
); );
unsigned32 icm7170_get_register_8( /* registers are at 8 byte boundaries */ uint32_t icm7170_get_register_8( /* registers are at 8 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void icm7170_set_register_8( void icm7170_set_register_8(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
); );
#endif #endif

14
c/src/libchip/rtc/icm7170_reg.c
View File

@@ -20,7 +20,7 @@
#ifndef _ICM7170_MULTIPLIER #ifndef _ICM7170_MULTIPLIER
#define _ICM7170_MULTIPLIER 1 #define _ICM7170_MULTIPLIER 1
#define _ICM7170_NAME(_X) _X #define _ICM7170_NAME(_X) _X
#define _ICM7170_TYPE unsigned8 #define _ICM7170_TYPE uint8_t
#endif #endif
#define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \ #define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \
@@ -30,9 +30,9 @@
* ICM7170 Get Register Routine * ICM7170 Get Register Routine
*/ */
unsigned32 _ICM7170_NAME(icm7170_get_register)( uint32_t _ICM7170_NAME(icm7170_get_register)(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum uint8_t ucRegNum
) )
{ {
_ICM7170_TYPE *port; _ICM7170_TYPE *port;
@@ -47,9 +47,9 @@ unsigned32 _ICM7170_NAME(icm7170_get_register)(
*/ */
void _ICM7170_NAME(icm7170_set_register)( void _ICM7170_NAME(icm7170_set_register)(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
) )
{ {
_ICM7170_TYPE *port; _ICM7170_TYPE *port;

2
c/src/libchip/rtc/icm7170_reg2.c
View File

@@ -17,7 +17,7 @@
#define _ICM7170_MULTIPLIER 2 #define _ICM7170_MULTIPLIER 2
#define _ICM7170_NAME(_X) _X##_2 #define _ICM7170_NAME(_X) _X##_2
#define _ICM7170_TYPE unsigned8 #define _ICM7170_TYPE uint8_t
#include "icm7170_reg.c" #include "icm7170_reg.c"

2
c/src/libchip/rtc/icm7170_reg4.c
View File

@@ -17,7 +17,7 @@
#define _ICM7170_MULTIPLIER 4 #define _ICM7170_MULTIPLIER 4
#define _ICM7170_NAME(_X) _X##_4 #define _ICM7170_NAME(_X) _X##_4
#define _ICM7170_TYPE unsigned8 #define _ICM7170_TYPE uint8_t
#include "icm7170_reg.c" #include "icm7170_reg.c"

2
c/src/libchip/rtc/icm7170_reg8.c
View File

@@ -17,7 +17,7 @@
#define _ICM7170_MULTIPLIER 8 #define _ICM7170_MULTIPLIER 8
#define _ICM7170_NAME(_X) _X##_8 #define _ICM7170_NAME(_X) _X##_8
#define _ICM7170_TYPE unsigned8 #define _ICM7170_TYPE uint8_t
#include "icm7170_reg.c" #include "icm7170_reg.c"

12
c/src/libchip/rtc/m48t08.c
View File

@@ -57,12 +57,12 @@ int m48t08_get_time(
rtems_time_of_day *time rtems_time_of_day *time
) )
{ {
unsigned32 m48t08; uint32_t m48t08;
getRegister_f getReg; getRegister_f getReg;
setRegister_f setReg; setRegister_f setReg;
unsigned8 controlReg; uint8_t controlReg;
unsigned32 value1; uint32_t value1;
unsigned32 value2; uint32_t value2;
m48t08 = RTC_Table[ minor ].ulCtrlPort1; m48t08 = RTC_Table[ minor ].ulCtrlPort1;
getReg = RTC_Table[ minor ].getRegister; getReg = RTC_Table[ minor ].getRegister;
@@ -117,10 +117,10 @@ int m48t08_set_time(
rtems_time_of_day *time rtems_time_of_day *time
) )
{ {
unsigned32 m48t08; uint32_t m48t08;
getRegister_f getReg; getRegister_f getReg;
setRegister_f setReg; setRegister_f setReg;
unsigned8 controlReg; uint8_t controlReg;
m48t08 = RTC_Table[ minor ].ulCtrlPort1; m48t08 = RTC_Table[ minor ].ulCtrlPort1;
getReg = RTC_Table[ minor ].getRegister; getReg = RTC_Table[ minor ].getRegister;

48
c/src/libchip/rtc/m48t08.h
View File

@@ -41,48 +41,48 @@ extern rtc_fns m48t08_fns;
* Default register access routines * Default register access routines
*/ */
unsigned32 m48t08_get_register( /* registers are at 1 byte boundaries */ uint32_t m48t08_get_register( /* registers are at 1 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void m48t08_set_register( void m48t08_set_register(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
); );
unsigned32 m48t08_get_register_2( /* registers are at 2 byte boundaries */ uint32_t m48t08_get_register_2( /* registers are at 2 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void m48t08_set_register_2( void m48t08_set_register_2(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
); );
unsigned32 m48t08_get_register_4( /* registers are at 4 byte boundaries */ uint32_t m48t08_get_register_4( /* registers are at 4 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void m48t08_set_register_4( void m48t08_set_register_4(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
); );
unsigned32 m48t08_get_register_8( /* registers are at 8 byte boundaries */ uint32_t m48t08_get_register_8( /* registers are at 8 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void m48t08_set_register_8( void m48t08_set_register_8(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
); );
#endif #endif

14
c/src/libchip/rtc/m48t08_reg.c
View File

@@ -20,7 +20,7 @@
#ifndef _M48T08_MULTIPLIER #ifndef _M48T08_MULTIPLIER
#define _M48T08_MULTIPLIER 1 #define _M48T08_MULTIPLIER 1
#define _M48T08_NAME(_X) _X #define _M48T08_NAME(_X) _X
#define _M48T08_TYPE unsigned8 #define _M48T08_TYPE uint8_t
#endif #endif
#define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \ #define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \
@@ -30,9 +30,9 @@
* M48T08 Get Register Routine * M48T08 Get Register Routine
*/ */
unsigned32 _M48T08_NAME(m48t08_get_register)( uint32_t _M48T08_NAME(m48t08_get_register)(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum uint8_t ucRegNum
) )
{ {
_M48T08_TYPE *port; _M48T08_TYPE *port;
@@ -47,9 +47,9 @@ unsigned32 _M48T08_NAME(m48t08_get_register)(
*/ */
void _M48T08_NAME(m48t08_set_register)( void _M48T08_NAME(m48t08_set_register)(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned32 ucData uint32_t ucData
) )
{ {
_M48T08_TYPE *port; _M48T08_TYPE *port;

2
c/src/libchip/rtc/m48t08_reg2.c
View File

@@ -17,7 +17,7 @@
#define _M48T08_MULTIPLIER 2 #define _M48T08_MULTIPLIER 2
#define _M48T08_NAME(_X) _X##_2 #define _M48T08_NAME(_X) _X##_2
#define _M48T08_TYPE unsigned8 #define _M48T08_TYPE uint8_t
#include "m48t08_reg.c" #include "m48t08_reg.c"

2
c/src/libchip/rtc/m48t08_reg4.c
View File

@@ -17,7 +17,7 @@
#define _M48T08_MULTIPLIER 4 #define _M48T08_MULTIPLIER 4
#define _M48T08_NAME(_X) _X##_4 #define _M48T08_NAME(_X) _X##_4
#define _M48T08_TYPE unsigned8 #define _M48T08_TYPE uint8_t
#include "m48t08_reg.c" #include "m48t08_reg.c"

2
c/src/libchip/rtc/m48t08_reg8.c
View File

@@ -17,7 +17,7 @@
#define _M48T08_MULTIPLIER 8 #define _M48T08_MULTIPLIER 8
#define _M48T08_NAME(_X) _X##_8 #define _M48T08_NAME(_X) _X##_8
#define _M48T08_TYPE unsigned8 #define _M48T08_TYPE uint8_t
#include "m48t08_reg.c" #include "m48t08_reg.c"

8
c/src/libchip/rtc/rtc.h
View File

@@ -19,9 +19,9 @@
* Types for get and set register routines * Types for get and set register routines
*/ */
typedef unsigned32 (*getRegister_f)(unsigned32 port, unsigned8 register); typedef uint32_t (*getRegister_f)(uint32_t port, uint8_t register);
typedef void (*setRegister_f)( typedef void (*setRegister_f)(
unsigned32 port, unsigned8 reg, unsigned32 value); uint32_t port, uint8_t reg, uint32_t value);
typedef struct _rtc_fns { typedef struct _rtc_fns {
void (*deviceInitialize)(int minor); void (*deviceInitialize)(int minor);
@@ -64,8 +64,8 @@ typedef struct _rtc_tbl {
rtc_fns *pDeviceFns; rtc_fns *pDeviceFns;
boolean (*deviceProbe)(int minor); boolean (*deviceProbe)(int minor);
void *pDeviceParams; void *pDeviceParams;
unsigned32 ulCtrlPort1; uint32_t ulCtrlPort1;
unsigned32 ulDataPort; uint32_t ulDataPort;
getRegister_f getRegister; getRegister_f getRegister;
setRegister_f setRegister; setRegister_f setRegister;
} rtc_tbl; } rtc_tbl;

34
c/src/libchip/serial/mc68681.c
View File

@@ -89,8 +89,8 @@ MC68681_STATIC int mc68681_set_attributes(
const struct termios *t const struct termios *t
) )
{ {
unsigned32 pMC68681_port; uint32_t pMC68681_port;
unsigned32 pMC68681; uint32_t pMC68681;
unsigned int mode1; unsigned int mode1;
unsigned int mode2; unsigned int mode2;
unsigned int baud_mask; unsigned int baud_mask;
@@ -219,8 +219,8 @@ MC68681_STATIC void mc68681_initialize_context(
MC68681_STATIC void mc68681_init(int minor) MC68681_STATIC void mc68681_init(int minor)
{ {
unsigned32 pMC68681_port; uint32_t pMC68681_port;
unsigned32 pMC68681; uint32_t pMC68681;
mc68681_context *pmc68681Context; mc68681_context *pmc68681Context;
setRegister_f setReg; setRegister_f setReg;
getRegister_f getReg; getRegister_f getReg;
@@ -273,8 +273,8 @@ MC68681_STATIC int mc68681_open(
void *arg void *arg
) )
{ {
unsigned32 pMC68681; uint32_t pMC68681;
unsigned32 pMC68681_port; uint32_t pMC68681_port;
unsigned int baud; unsigned int baud;
unsigned int acr_bit; unsigned int acr_bit;
unsigned int vector; unsigned int vector;
@@ -330,8 +330,8 @@ MC68681_STATIC int mc68681_close(
void *arg void *arg
) )
{ {
unsigned32 pMC68681; uint32_t pMC68681;
unsigned32 pMC68681_port; uint32_t pMC68681_port;
setRegister_f setReg; setRegister_f setReg;
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -361,7 +361,7 @@ MC68681_STATIC void mc68681_write_polled(
char cChar char cChar
) )
{ {
unsigned32 pMC68681_port; uint32_t pMC68681_port;
unsigned char ucLineStatus; unsigned char ucLineStatus;
int iTimeout; int iTimeout;
getRegister_f getReg; getRegister_f getReg;
@@ -454,8 +454,8 @@ MC68681_STATIC int mc68681_write_support_int(
int len int len
) )
{ {
unsigned32 Irql; uint32_t Irql;
unsigned32 pMC68681_port; uint32_t pMC68681_port;
setRegister_f setReg; setRegister_f setReg;
pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
@@ -526,7 +526,7 @@ MC68681_STATIC int mc68681_inbyte_nonblocking_polled(
int minor int minor
) )
{ {
unsigned32 pMC68681_port; uint32_t pMC68681_port;
unsigned char ucLineStatus; unsigned char ucLineStatus;
unsigned char cChar; unsigned char cChar;
getRegister_f getReg; getRegister_f getReg;
@@ -623,10 +623,10 @@ MC68681_STATIC void mc68681_process(
int minor int minor
) )
{ {
unsigned32 pMC68681; uint32_t pMC68681;
unsigned32 pMC68681_port; uint32_t pMC68681_port;
volatile unsigned8 ucLineStatus; volatile uint8_t ucLineStatus;
volatile unsigned8 ucISRStatus; volatile uint8_t ucISRStatus;
unsigned char cChar; unsigned char cChar;
getRegister_f getReg; getRegister_f getReg;
setRegister_f setReg; setRegister_f setReg;
@@ -762,7 +762,7 @@ MC68681_STATIC void mc68681_enable_interrupts(
int imr_mask int imr_mask
) )
{ {
unsigned32 pMC68681; uint32_t pMC68681;
setRegister_f setReg; setRegister_f setReg;
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;

48
c/src/libchip/serial/mc68681.h
View File

@@ -70,48 +70,48 @@ extern console_fns mc68681_fns_polled;
* Default register access routines * Default register access routines
*/ */
unsigned8 mc68681_get_register( /* registers are at 1 byte boundaries */ uint8_t mc68681_get_register( /* registers are at 1 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void mc68681_set_register( void mc68681_set_register(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned8 ucData uint8_t ucData
); );
unsigned8 mc68681_get_register_2( /* registers are at 2 byte boundaries */ uint8_t mc68681_get_register_2( /* registers are at 2 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void mc68681_set_register_2( void mc68681_set_register_2(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned8 ucData uint8_t ucData
); );
unsigned8 mc68681_get_register_4( /* registers are at 4 byte boundaries */ uint8_t mc68681_get_register_4( /* registers are at 4 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void mc68681_set_register_4( void mc68681_set_register_4(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned8 ucData uint8_t ucData
); );
unsigned8 mc68681_get_register_8( /* registers are at 8 byte boundaries */ uint8_t mc68681_get_register_8( /* registers are at 8 byte boundaries */
unsigned32 ulCtrlPort, /* and accessed as bytes */ uint32_t ulCtrlPort, /* and accessed as bytes */
unsigned8 ucRegNum uint8_t ucRegNum
); );
void mc68681_set_register_8( void mc68681_set_register_8(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned8 ucData uint8_t ucData
); );

14
c/src/libchip/serial/mc68681_reg.c
View File

@@ -20,7 +20,7 @@
#ifndef _MC68681_MULTIPLIER #ifndef _MC68681_MULTIPLIER
#define _MC68681_MULTIPLIER 1 #define _MC68681_MULTIPLIER 1
#define _MC68681_NAME(_X) _X #define _MC68681_NAME(_X) _X
#define _MC68681_TYPE unsigned8 #define _MC68681_TYPE uint8_t
#endif #endif
#define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \ #define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \
@@ -30,9 +30,9 @@
* MC68681 Get Register Routine * MC68681 Get Register Routine
*/ */
unsigned8 _MC68681_NAME(mc68681_get_register)( uint8_t _MC68681_NAME(mc68681_get_register)(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum uint8_t ucRegNum
) )
{ {
_MC68681_TYPE *port; _MC68681_TYPE *port;
@@ -47,9 +47,9 @@ unsigned8 _MC68681_NAME(mc68681_get_register)(
*/ */
void _MC68681_NAME(mc68681_set_register)( void _MC68681_NAME(mc68681_set_register)(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned8 ucData uint8_t ucData
) )
{ {
_MC68681_TYPE *port; _MC68681_TYPE *port;

2
c/src/libchip/serial/mc68681_reg2.c
View File

@@ -17,7 +17,7 @@
#define _MC68681_MULTIPLIER 2 #define _MC68681_MULTIPLIER 2
#define _MC68681_NAME(_X) _X##_2 #define _MC68681_NAME(_X) _X##_2
#define _MC68681_TYPE unsigned8 #define _MC68681_TYPE uint8_t
#include "mc68681_reg.c" #include "mc68681_reg.c"

2
c/src/libchip/serial/mc68681_reg4.c
View File

@@ -17,7 +17,7 @@
#define _MC68681_MULTIPLIER 4 #define _MC68681_MULTIPLIER 4
#define _MC68681_NAME(_X) _X##_4 #define _MC68681_NAME(_X) _X##_4
#define _MC68681_TYPE unsigned8 #define _MC68681_TYPE uint8_t
#include "mc68681_reg.c" #include "mc68681_reg.c"

2
c/src/libchip/serial/mc68681_reg8.c
View File

@@ -17,7 +17,7 @@
#define _MC68681_MULTIPLIER 8 #define _MC68681_MULTIPLIER 8
#define _MC68681_NAME(_X) _X##_8 #define _MC68681_NAME(_X) _X##_8
#define _MC68681_TYPE unsigned8 #define _MC68681_TYPE uint8_t
#include "mc68681_reg.c" #include "mc68681_reg.c"

56
c/src/libchip/serial/ns16550.c
View File

@@ -75,10 +75,10 @@ extern void set_vector( rtems_isr_entry, rtems_vector_number, int );
NS16550_STATIC void ns16550_init(int minor) NS16550_STATIC void ns16550_init(int minor)
{ {
unsigned32 pNS16550; uint32_t pNS16550;
unsigned8 ucTrash; uint8_t ucTrash;
unsigned8 ucDataByte; uint8_t ucDataByte;
unsigned32 ulBaudDivisor; uint32_t ulBaudDivisor;
ns16550_context *pns16550Context; ns16550_context *pns16550Context;
setRegister_f setReg; setRegister_f setReg;
getRegister_f getReg; getRegister_f getReg;
@@ -103,8 +103,8 @@ NS16550_STATIC void ns16550_init(int minor)
/* Set the divisor latch and set the baud rate. */ /* Set the divisor latch and set the baud rate. */
ulBaudDivisor = NS16550_Baud( ulBaudDivisor = NS16550_Baud(
(unsigned32) Console_Port_Tbl[minor].ulClock, (uint32_t ) Console_Port_Tbl[minor].ulClock,
(unsigned32) Console_Port_Tbl[minor].pDeviceParams (uint32_t ) Console_Port_Tbl[minor].pDeviceParams
); );
ucDataByte = SP_LINE_DLAB; ucDataByte = SP_LINE_DLAB;
(*setReg)(pNS16550, NS16550_LINE_CONTROL, ucDataByte); (*setReg)(pNS16550, NS16550_LINE_CONTROL, ucDataByte);
@@ -185,7 +185,7 @@ NS16550_STATIC void ns16550_write_polled(
char cChar char cChar
) )
{ {
unsigned32 pNS16550; uint32_t pNS16550;
unsigned char ucLineStatus; unsigned char ucLineStatus;
int iTimeout; int iTimeout;
getRegister_f getReg; getRegister_f getReg;
@@ -231,8 +231,8 @@ NS16550_STATIC void ns16550_write_polled(
NS16550_STATIC int ns16550_assert_RTS(int minor) NS16550_STATIC int ns16550_assert_RTS(int minor)
{ {
unsigned32 pNS16550; uint32_t pNS16550;
unsigned32 Irql; uint32_t Irql;
ns16550_context *pns16550Context; ns16550_context *pns16550Context;
setRegister_f setReg; setRegister_f setReg;
@@ -257,8 +257,8 @@ NS16550_STATIC int ns16550_assert_RTS(int minor)
NS16550_STATIC int ns16550_negate_RTS(int minor) NS16550_STATIC int ns16550_negate_RTS(int minor)
{ {
unsigned32 pNS16550; uint32_t pNS16550;
unsigned32 Irql; uint32_t Irql;
ns16550_context *pns16550Context; ns16550_context *pns16550Context;
setRegister_f setReg; setRegister_f setReg;
@@ -288,8 +288,8 @@ NS16550_STATIC int ns16550_negate_RTS(int minor)
NS16550_STATIC int ns16550_assert_DTR(int minor) NS16550_STATIC int ns16550_assert_DTR(int minor)
{ {
unsigned32 pNS16550; uint32_t pNS16550;
unsigned32 Irql; uint32_t Irql;
ns16550_context *pns16550Context; ns16550_context *pns16550Context;
setRegister_f setReg; setRegister_f setReg;
@@ -314,8 +314,8 @@ NS16550_STATIC int ns16550_assert_DTR(int minor)
NS16550_STATIC int ns16550_negate_DTR(int minor) NS16550_STATIC int ns16550_negate_DTR(int minor)
{ {
unsigned32 pNS16550; uint32_t pNS16550;
unsigned32 Irql; uint32_t Irql;
ns16550_context *pns16550Context; ns16550_context *pns16550Context;
setRegister_f setReg; setRegister_f setReg;
@@ -346,13 +346,13 @@ NS16550_STATIC int ns16550_set_attributes(
const struct termios *t const struct termios *t
) )
{ {
unsigned32 pNS16550; uint32_t pNS16550;
unsigned32 ulBaudDivisor; uint32_t ulBaudDivisor;
unsigned8 ucLineControl; uint8_t ucLineControl;
unsigned32 baud_requested; uint32_t baud_requested;
setRegister_f setReg; setRegister_f setReg;
getRegister_f getReg; getRegister_f getReg;
unsigned32 Irql; uint32_t Irql;
pNS16550 = Console_Port_Tbl[minor].ulCtrlPort1; pNS16550 = Console_Port_Tbl[minor].ulCtrlPort1;
setReg = Console_Port_Tbl[minor].setRegister; setReg = Console_Port_Tbl[minor].setRegister;
@@ -367,7 +367,7 @@ NS16550_STATIC int ns16550_set_attributes(
baud_requested = B9600; /* default to 9600 baud */ baud_requested = B9600; /* default to 9600 baud */
ulBaudDivisor = NS16550_Baud( ulBaudDivisor = NS16550_Baud(
(unsigned32) Console_Port_Tbl[minor].ulClock, (uint32_t ) Console_Port_Tbl[minor].ulClock,
termios_baud_to_number(baud_requested) termios_baud_to_number(baud_requested)
); );
@@ -443,9 +443,9 @@ NS16550_STATIC void ns16550_process(
int minor int minor
) )
{ {
unsigned32 pNS16550; uint32_t pNS16550;
volatile unsigned8 ucLineStatus; volatile uint8_t ucLineStatus;
volatile unsigned8 ucInterruptId; volatile uint8_t ucInterruptId;
unsigned char cChar; unsigned char cChar;
getRegister_f getReg; getRegister_f getReg;
setRegister_f setReg; setRegister_f setReg;
@@ -539,7 +539,7 @@ NS16550_STATIC void ns16550_enable_interrupts(
int mask int mask
) )
{ {
unsigned32 pNS16550; uint32_t pNS16550;
setRegister_f setReg; setRegister_f setReg;
pNS16550 = Console_Port_Tbl[minor].ulCtrlPort1; pNS16550 = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -577,8 +577,8 @@ NS16550_STATIC int ns16550_write_support_int(
int len int len
) )
{ {
unsigned32 Irql; uint32_t Irql;
unsigned32 pNS16550; uint32_t pNS16550;
setRegister_f setReg; setRegister_f setReg;
setReg = Console_Port_Tbl[minor].setRegister; setReg = Console_Port_Tbl[minor].setRegister;
@@ -649,7 +649,7 @@ NS16550_STATIC int ns16550_inbyte_nonblocking_polled(
int minor int minor
) )
{ {
unsigned32 pNS16550; uint32_t pNS16550;
unsigned char ucLineStatus; unsigned char ucLineStatus;
char cChar; char cChar;
getRegister_f getReg; getRegister_f getReg;

2
c/src/libchip/serial/ns16550_p.h
View File

@@ -160,7 +160,7 @@ typedef struct _SP_INTERRUPT_ID {
typedef struct _ns16550_context typedef struct _ns16550_context
{ {
unsigned8 ucModemCtrl; uint8_t ucModemCtrl;
} ns16550_context; } ns16550_context;
/* /*

20
c/src/libchip/serial/serial.h
View File

@@ -22,11 +22,11 @@
* Types for get and set register routines * Types for get and set register routines
*/ */
typedef unsigned8 (*getRegister_f)(unsigned32 port, unsigned8 register); typedef uint8_t (*getRegister_f)(uint32_t port, uint8_t register);
typedef void (*setRegister_f)( typedef void (*setRegister_f)(
unsigned32 port, unsigned8 reg, unsigned8 value); uint32_t port, uint8_t reg, uint8_t value);
typedef unsigned8 (*getData_f)(unsigned32 port); typedef uint8_t (*getData_f)(uint32_t port);
typedef void (*setData_f)(unsigned32 port, unsigned8 value); typedef void (*setData_f)(uint32_t port, uint8_t value);
typedef struct _console_fns { typedef struct _console_fns {
boolean (*deviceProbe)(int minor); boolean (*deviceProbe)(int minor);
@@ -120,17 +120,17 @@ typedef struct _console_tbl {
console_fns *pDeviceFns; console_fns *pDeviceFns;
boolean (*deviceProbe)(int minor); boolean (*deviceProbe)(int minor);
console_flow *pDeviceFlow; console_flow *pDeviceFlow;
unsigned32 ulMargin; uint32_t ulMargin;
unsigned32 ulHysteresis; uint32_t ulHysteresis;
void *pDeviceParams; void *pDeviceParams;
unsigned32 ulCtrlPort1; uint32_t ulCtrlPort1;
unsigned32 ulCtrlPort2; uint32_t ulCtrlPort2;
unsigned32 ulDataPort; uint32_t ulDataPort;
getRegister_f getRegister; getRegister_f getRegister;
setRegister_f setRegister; setRegister_f setRegister;
getData_f getData; getData_f getData;
setData_f setData; setData_f setData;
unsigned32 ulClock; uint32_t ulClock;
unsigned int ulIntVector; unsigned int ulIntVector;
} console_tbl; } console_tbl;

56
c/src/libchip/serial/z85c30.c
View File

@@ -92,8 +92,8 @@ Z85C30_STATIC void z85c30_initialize_port(
int minor int minor
) )
{ {
unsigned32 ulCtrlPort; uint32_t ulCtrlPort;
unsigned32 ulBaudDivisor; uint32_t ulBaudDivisor;
setRegister_f setReg; setRegister_f setReg;
ulCtrlPort = Console_Port_Tbl[minor].ulCtrlPort1; ulCtrlPort = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -137,8 +137,8 @@ Z85C30_STATIC void z85c30_initialize_port(
); );
ulBaudDivisor = Z85C30_Baud( ulBaudDivisor = Z85C30_Baud(
(unsigned32) Console_Port_Tbl[minor].ulClock, (uint32_t ) Console_Port_Tbl[minor].ulClock,
(unsigned32) Console_Port_Tbl[minor].pDeviceParams (uint32_t ) Console_Port_Tbl[minor].pDeviceParams
); );
/* /*
@@ -253,8 +253,8 @@ Z85C30_STATIC int z85c30_close(
Z85C30_STATIC void z85c30_init(int minor) Z85C30_STATIC void z85c30_init(int minor)
{ {
unsigned32 ulCtrlPort; uint32_t ulCtrlPort;
unsigned8 dummy; uint8_t dummy;
z85c30_context *pz85c30Context; z85c30_context *pz85c30Context;
setRegister_f setReg; setRegister_f setReg;
getRegister_f getReg; getRegister_f getReg;
@@ -430,11 +430,11 @@ Z85C30_STATIC int z85c30_set_attributes(
const struct termios *t const struct termios *t
) )
{ {
unsigned32 ulCtrlPort; uint32_t ulCtrlPort;
unsigned32 ulBaudDivisor; uint32_t ulBaudDivisor;
unsigned32 wr3; uint32_t wr3;
unsigned32 wr4; uint32_t wr4;
unsigned32 wr5; uint32_t wr5;
int baud_requested; int baud_requested;
setRegister_f setReg; setRegister_f setReg;
rtems_interrupt_level Irql; rtems_interrupt_level Irql;
@@ -451,8 +451,8 @@ Z85C30_STATIC int z85c30_set_attributes(
baud_requested = B9600; /* default to 9600 baud */ baud_requested = B9600; /* default to 9600 baud */
ulBaudDivisor = Z85C30_Baud( ulBaudDivisor = Z85C30_Baud(
(unsigned32) Console_Port_Tbl[minor].ulClock, (uint32_t ) Console_Port_Tbl[minor].ulClock,
(unsigned32) termios_baud_to_number( baud_requested ) (uint32_t ) termios_baud_to_number( baud_requested )
); );
wr3 = SCC_WR3_RX_EN; wr3 = SCC_WR3_RX_EN;
@@ -532,11 +532,11 @@ Z85C30_STATIC int z85c30_set_attributes(
Z85C30_STATIC void z85c30_process( Z85C30_STATIC void z85c30_process(
int minor, int minor,
unsigned8 ucIntPend uint8_t ucIntPend
) )
{ {
unsigned32 ulCtrlPort; uint32_t ulCtrlPort;
volatile unsigned8 z85c30_status; volatile uint8_t z85c30_status;
unsigned char cChar; unsigned char cChar;
setRegister_f setReg; setRegister_f setReg;
getRegister_f getReg; getRegister_f getReg;
@@ -641,9 +641,9 @@ Z85C30_STATIC rtems_isr z85c30_isr(
) )
{ {
int minor; int minor;
unsigned32 ulCtrlPort; uint32_t ulCtrlPort;
volatile unsigned8 ucIntPend; volatile uint8_t ucIntPend;
volatile unsigned8 ucIntPendPort; volatile uint8_t ucIntPendPort;
getRegister_f getReg; getRegister_f getReg;
for (minor=0;minor<Console_Port_Count;minor++) { for (minor=0;minor<Console_Port_Count;minor++) {
@@ -684,7 +684,7 @@ Z85C30_STATIC void z85c30_enable_interrupts(
int interrupt_mask int interrupt_mask
) )
{ {
unsigned32 ulCtrlPort; uint32_t ulCtrlPort;
setRegister_f setReg; setRegister_f setReg;
ulCtrlPort = Console_Port_Tbl[minor].ulCtrlPort1; ulCtrlPort = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -703,8 +703,8 @@ Z85C30_STATIC void z85c30_initialize_interrupts(
int minor int minor
) )
{ {
unsigned32 ulCtrlPort1; uint32_t ulCtrlPort1;
unsigned32 ulCtrlPort2; uint32_t ulCtrlPort2;
setRegister_f setReg; setRegister_f setReg;
ulCtrlPort1 = Console_Port_Tbl[minor].ulCtrlPort1; ulCtrlPort1 = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -748,8 +748,8 @@ Z85C30_STATIC int z85c30_write_support_int(
const char *buf, const char *buf,
int len) int len)
{ {
unsigned32 Irql; uint32_t Irql;
unsigned32 ulCtrlPort; uint32_t ulCtrlPort;
setRegister_f setReg; setRegister_f setReg;
ulCtrlPort = Console_Port_Tbl[minor].ulCtrlPort1; ulCtrlPort = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -791,8 +791,8 @@ Z85C30_STATIC int z85c30_inbyte_nonblocking_polled(
int minor int minor
) )
{ {
volatile unsigned8 z85c30_status; volatile uint8_t z85c30_status;
unsigned32 ulCtrlPort; uint32_t ulCtrlPort;
getRegister_f getReg; getRegister_f getReg;
ulCtrlPort = Console_Port_Tbl[minor].ulCtrlPort1; ulCtrlPort = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -852,8 +852,8 @@ Z85C30_STATIC void z85c30_write_polled(
char cChar char cChar
) )
{ {
volatile unsigned8 z85c30_status; volatile uint8_t z85c30_status;
unsigned32 ulCtrlPort; uint32_t ulCtrlPort;
getRegister_f getReg; getRegister_f getReg;
setRegister_f setReg; setRegister_f setReg;

20
c/src/libchip/serial/z85c30.h
View File

@@ -50,24 +50,24 @@ extern console_flow z85c30_flow_DTRCTS;
* Default register access routines * Default register access routines
*/ */
unsigned8 z85c30_get_register( /* registers are byte-wide */ uint8_t z85c30_get_register( /* registers are byte-wide */
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum uint8_t ucRegNum
); );
void z85c30_set_register( void z85c30_set_register(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned8 ucData uint8_t ucData
); );
unsigned8 z85c30_get_data( uint8_t z85c30_get_data(
unsigned32 ulDataPort uint32_t ulDataPort
); );
void z85c30_set_data( void z85c30_set_data(
unsigned32 ulDataPort, uint32_t ulDataPort,
unsigned8 ucData uint8_t ucData
); );
#ifdef __cplusplus #ifdef __cplusplus

2
c/src/libchip/serial/z85c30_p.h
View File

@@ -310,7 +310,7 @@ extern "C" {
typedef struct _z85c30_context typedef struct _z85c30_context
{ {
unsigned8 ucModemCtrl; uint8_t ucModemCtrl;
} z85c30_context; } z85c30_context;
/* /*

16
c/src/libchip/serial/z85c30_reg.c
View File

@@ -19,20 +19,20 @@
#ifndef _Z85C30_MULTIPLIER #ifndef _Z85C30_MULTIPLIER
#define _Z85C30_MULTIPLIER 1 #define _Z85C30_MULTIPLIER 1
#define _Z85C30_NAME(_X) _X #define _Z85C30_NAME(_X) _X
#define _Z85C30_TYPE unsigned8 #define _Z85C30_TYPE uint8_t
#endif #endif
/* /*
* Z85C30 Get Register Routine * Z85C30 Get Register Routine
*/ */
unsigned8 _Z85C30_NAME(z85c30_get_register)( uint8_t _Z85C30_NAME(z85c30_get_register)(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum uint8_t ucRegNum
) )
{ {
_Z85C30_TYPE *port; _Z85C30_TYPE *port;
unsigned8 data; uint8_t data;
rtems_interrupt_level level; rtems_interrupt_level level;
port = (_Z85C30_TYPE *)ulCtrlPort; port = (_Z85C30_TYPE *)ulCtrlPort;
@@ -53,9 +53,9 @@ unsigned8 _Z85C30_NAME(z85c30_get_register)(
*/ */
void _Z85C30_NAME(z85c30_set_register)( void _Z85C30_NAME(z85c30_set_register)(
unsigned32 ulCtrlPort, uint32_t ulCtrlPort,
unsigned8 ucRegNum, uint8_t ucRegNum,
unsigned8 ucData uint8_t ucData
) )
{ {
_Z85C30_TYPE *port; _Z85C30_TYPE *port;

2
c/src/libchip/shmdr/addlq.c
View File

@@ -26,7 +26,7 @@ void Shm_Locked_queue_Add(
Shm_Envelope_control *ecb Shm_Envelope_control *ecb
) )
{ {
rtems_unsigned32 index; uint32_t index;
ecb->next = Shm_Locked_queue_End_of_list; ecb->next = Shm_Locked_queue_End_of_list;
ecb->queue = lq_cb->owner; ecb->queue = lq_cb->owner;

4
c/src/libchip/shmdr/cnvpkt.c
View File

@@ -30,9 +30,9 @@ void Shm_Convert_packet(
rtems_packet_prefix *packet rtems_packet_prefix *packet
) )
{ {
rtems_unsigned32 *pkt, i; uint32_t *pkt, i;
pkt = (rtems_unsigned32 *) packet; pkt = (uint32_t *) packet;
for ( i=RTEMS_MINIMUN_HETERO_CONVERSION ; i ; i--, pkt++ ) for ( i=RTEMS_MINIMUN_HETERO_CONVERSION ; i ; i--, pkt++ )
*pkt = CPU_swap_u32( *pkt ); *pkt = CPU_swap_u32( *pkt );

6
c/src/libchip/shmdr/dump.c
View File

@@ -24,9 +24,9 @@
void void
Shm_Print_statistics(void) Shm_Print_statistics(void)
{ {
rtems_unsigned32 ticks; uint32_t ticks;
rtems_unsigned32 ticks_per_second; uint32_t ticks_per_second;
rtems_unsigned32 seconds; uint32_t seconds;
int packets_per_second; int packets_per_second;
(void) rtems_clock_get( RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &ticks ); (void) rtems_clock_get( RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &ticks );

2
c/src/libchip/shmdr/fatal.c
View File

@@ -23,7 +23,7 @@
void MPCI_Fatal( void MPCI_Fatal(
Internal_errors_Source source, Internal_errors_Source source,
boolean is_internal, boolean is_internal,
rtems_unsigned32 error uint32_t error
) )
{ {
/* Eventually need to attempt to broadcast a K_FATAL message /* Eventually need to attempt to broadcast a K_FATAL message

2
c/src/libchip/shmdr/getlq.c
View File

@@ -28,7 +28,7 @@ Shm_Envelope_control *Shm_Locked_queue_Get(
) )
{ {
Shm_Envelope_control *tmp_ecb; Shm_Envelope_control *tmp_ecb;
rtems_unsigned32 tmpfront; uint32_t tmpfront;
tmp_ecb = NULL; tmp_ecb = NULL;
Shm_Lock( lq_cb ); Shm_Lock( lq_cb );

14
c/src/libchip/shmdr/init.c
View File

@@ -36,12 +36,12 @@ rtems_extensions_table MPCI_Shm_extensions;
rtems_mpci_entry Shm_Initialization( void ) rtems_mpci_entry Shm_Initialization( void )
{ {
rtems_unsigned32 i, all_initialized; uint32_t i, all_initialized;
rtems_unsigned32 interrupt_cause, interrupt_value; uint32_t interrupt_cause, interrupt_value;
void *interrupt_address; void *interrupt_address;
Shm_Node_status_control *nscb; Shm_Node_status_control *nscb;
rtems_unsigned32 extension_id; /* for installation of MPCI_Fatal */ uint32_t extension_id; /* for installation of MPCI_Fatal */
rtems_unsigned32 remaining_memory; uint32_t remaining_memory;
/* XXX these should use "public" methods to set their values.... */ /* XXX these should use "public" methods to set their values.... */
rtems_configuration_table *configuration = _Configuration_Table; rtems_configuration_table *configuration = _Configuration_Table;
rtems_multiprocessing_table *mp_configuration = _Configuration_MP_table; rtems_multiprocessing_table *mp_configuration = _Configuration_MP_table;
@@ -122,7 +122,7 @@ rtems_mpci_entry Shm_Initialization( void )
*/ */
interrupt_address = interrupt_address =
(void *) Shm_Convert( (rtems_unsigned32)Shm_Configuration->Intr.address ); (void *) Shm_Convert( (uint32_t )Shm_Configuration->Intr.address );
interrupt_value = Shm_Convert( Shm_Configuration->Intr.value ); interrupt_value = Shm_Convert( Shm_Configuration->Intr.value );
interrupt_cause = Shm_Convert( Shm_Configuration->Intr.length ); interrupt_cause = Shm_Convert( Shm_Configuration->Intr.length );
@@ -172,7 +172,7 @@ rtems_mpci_entry Shm_Initialization( void )
* shared area so other nodes can interrupt us. * shared area so other nodes can interrupt us.
*/ */
Shm_Local_node_status->int_address = (rtems_unsigned32) interrupt_address; Shm_Local_node_status->int_address = (uint32_t ) interrupt_address;
Shm_Local_node_status->int_value = interrupt_value; Shm_Local_node_status->int_value = interrupt_value;
Shm_Local_node_status->int_length = interrupt_cause; Shm_Local_node_status->int_length = interrupt_cause;
@@ -220,7 +220,7 @@ rtems_mpci_entry Shm_Initialization( void )
*/ */
Shm_Local_node_status->int_address = Shm_Local_node_status->int_address =
(rtems_unsigned32) interrupt_address; (uint32_t ) interrupt_address;
Shm_Local_node_status->int_value = interrupt_value; Shm_Local_node_status->int_value = interrupt_value;
Shm_Local_node_status->int_length = interrupt_cause; Shm_Local_node_status->int_length = interrupt_cause;

2
c/src/libchip/shmdr/initlq.c
View File

@@ -24,7 +24,7 @@
void Shm_Locked_queue_Initialize( void Shm_Locked_queue_Initialize(
Shm_Locked_queue_Control *lq_cb, Shm_Locked_queue_Control *lq_cb,
rtems_unsigned32 owner uint32_t owner
) )
{ {
Shm_Initialize_lock( lq_cb ); Shm_Initialize_lock( lq_cb );

22
c/src/libchip/shmdr/intr.c
View File

@@ -26,14 +26,14 @@
#include "shm_driver.h" #include "shm_driver.h"
void Shm_Cause_interrupt( void Shm_Cause_interrupt(
rtems_unsigned32 node uint32_t node
) )
{ {
Shm_Interrupt_information *intr; Shm_Interrupt_information *intr;
rtems_unsigned8 *u8; uint8_t *u8;
rtems_unsigned16 *u16; uint16_t *u16;
rtems_unsigned32 *u32; uint32_t *u32;
rtems_unsigned32 value; uint32_t value;
intr = &Shm_Interrupt_table[node]; intr = &Shm_Interrupt_table[node];
value = intr->value; value = intr->value;
@@ -42,16 +42,16 @@ void Shm_Cause_interrupt(
case NO_INTERRUPT: case NO_INTERRUPT:
break; break;
case BYTE: case BYTE:
u8 = (rtems_unsigned8 *)intr->address; u8 = (uint8_t *)intr->address;
*u8 = (rtems_unsigned8) value; *u8 = (uint8_t ) value;
break; break;
case WORD: case WORD:
u16 = (rtems_unsigned16 *)intr->address; u16 = (uint16_t *)intr->address;
*u16 = (rtems_unsigned16) value; *u16 = (uint16_t ) value;
break; break;
case LONG: case LONG:
u32 = (rtems_unsigned32 *)intr->address; u32 = (uint32_t *)intr->address;
*u32 = (rtems_unsigned32) value; *u32 = (uint32_t ) value;
break; break;
} }
} }

2
c/src/libchip/shmdr/poll.c
View File

@@ -26,7 +26,7 @@
void Shm_Poll() void Shm_Poll()
{ {
rtems_unsigned32 tmpfront; uint32_t tmpfront;
rtems_libio_ioctl_args_t args; rtems_libio_ioctl_args_t args;
/* invoke clock isr */ /* invoke clock isr */

6
c/src/libchip/shmdr/send.c
View File

@@ -25,16 +25,16 @@
#include "shm_driver.h" #include "shm_driver.h"
struct pkt_cpy { struct pkt_cpy {
rtems_unsigned32 packet[MAX_PACKET_SIZE/4]; uint32_t packet[MAX_PACKET_SIZE/4];
}; };
rtems_mpci_entry Shm_Send_packet( rtems_mpci_entry Shm_Send_packet(
rtems_unsigned32 node, uint32_t node,
rtems_packet_prefix *packet rtems_packet_prefix *packet
) )
{ {
Shm_Envelope_control *ecb, *tmp_ecb; Shm_Envelope_control *ecb, *tmp_ecb;
rtems_unsigned32 nnum; uint32_t nnum;
ecb = Shm_Packet_prefix_to_envelope_control_pointer( packet ); ecb = Shm_Packet_prefix_to_envelope_control_pointer( packet );
if ( node ) { if ( node ) {

46
c/src/libchip/shmdr/shm_driver.h
View File

@@ -84,7 +84,7 @@ extern "C" {
* "tas" instruction which is atomic. All ports to other CPUs * "tas" instruction which is atomic. All ports to other CPUs
* comply with the restrictive placement of lock bit by this * comply with the restrictive placement of lock bit by this
* instruction. The lock bit is the most significant bit in a * instruction. The lock bit is the most significant bit in a
* big-endian rtems_unsigned32. On other processors, the lock is * big-endian uint32_t . On other processors, the lock is
* typically implemented via an atomic swap or atomic modify * typically implemented via an atomic swap or atomic modify
* bits type instruction. * bits type instruction.
*/ */
@@ -254,7 +254,7 @@ extern "C" {
((void *)(ecb)->packet) ((void *)(ecb)->packet)
#define Shm_Packet_prefix_to_envelope_control_pointer( pkt ) \ #define Shm_Packet_prefix_to_envelope_control_pointer( pkt ) \
((Shm_Envelope_control *)((rtems_unsigned8 *)(pkt) - \ ((Shm_Envelope_control *)((uint8_t *)(pkt) - \
(sizeof(Shm_Envelope_preamble) + SHM_ENVELOPE_PREFIX_OVERHEAD))) (sizeof(Shm_Envelope_preamble) + SHM_ENVELOPE_PREFIX_OVERHEAD)))
#define Shm_Build_preamble(ecb, node) \ #define Shm_Build_preamble(ecb, node) \
@@ -264,8 +264,8 @@ extern "C" {
/* volatile types */ /* volatile types */
typedef volatile rtems_unsigned8 vol_u8; typedef volatile uint8_t vol_u8;
typedef volatile rtems_unsigned32 vol_u32; typedef volatile uint32_t vol_u32;
/* shm control information */ /* shm control information */
@@ -396,7 +396,7 @@ typedef struct {
* base - The base address of the shared memory. This * base - The base address of the shared memory. This
* address may be specific to this node. * address may be specific to this node.
* length - The length of the shared memory in bytes. * length - The length of the shared memory in bytes.
* format - The natural format for rtems_unsigned32's in the * format - The natural format for uint32_t 's in the
* shared memory. Valid values are currently * shared memory. Valid values are currently
* only SHM_LITTLE and SHM_BIG. * only SHM_LITTLE and SHM_BIG.
* convert - The address of the routine which converts * convert - The address of the routine which converts
@@ -425,7 +425,7 @@ struct shm_config_info {
vol_u32 format; /* SHM is big or little endian */ vol_u32 format; /* SHM is big or little endian */
vol_u32 (*convert)();/* neutral conversion routine */ vol_u32 (*convert)();/* neutral conversion routine */
vol_u32 poll_intr;/* POLLED or INTR driven mode */ vol_u32 poll_intr;/* POLLED or INTR driven mode */
void (*cause_intr)( rtems_unsigned32 ); void (*cause_intr)( uint32_t );
Shm_Interrupt_information Intr; /* cause intr information */ Shm_Interrupt_information Intr; /* cause intr information */
}; };
@@ -446,24 +446,24 @@ SHM_EXTERN Shm_Locked_queue_Control *Shm_Locked_queues;
SHM_EXTERN Shm_Envelope_control *Shm_Envelopes; SHM_EXTERN Shm_Envelope_control *Shm_Envelopes;
SHM_EXTERN rtems_configuration_table *Shm_RTEMS_Configuration; SHM_EXTERN rtems_configuration_table *Shm_RTEMS_Configuration;
SHM_EXTERN rtems_multiprocessing_table *Shm_RTEMS_MP_Configuration; SHM_EXTERN rtems_multiprocessing_table *Shm_RTEMS_MP_Configuration;
SHM_EXTERN rtems_unsigned32 Shm_Receive_message_count; SHM_EXTERN uint32_t Shm_Receive_message_count;
SHM_EXTERN rtems_unsigned32 Shm_Null_message_count; SHM_EXTERN uint32_t Shm_Null_message_count;
SHM_EXTERN rtems_unsigned32 Shm_Interrupt_count; SHM_EXTERN uint32_t Shm_Interrupt_count;
SHM_EXTERN rtems_unsigned32 Shm_Local_node; SHM_EXTERN uint32_t Shm_Local_node;
SHM_EXTERN Shm_Locked_queue_Control *Shm_Local_receive_queue; SHM_EXTERN Shm_Locked_queue_Control *Shm_Local_receive_queue;
SHM_EXTERN Shm_Node_status_control *Shm_Local_node_status; SHM_EXTERN Shm_Node_status_control *Shm_Local_node_status;
SHM_EXTERN rtems_unsigned32 Shm_isrstat; SHM_EXTERN uint32_t Shm_isrstat;
/* reported by shmdr */ /* reported by shmdr */
SHM_EXTERN rtems_unsigned32 Shm_Pending_initialization; SHM_EXTERN uint32_t Shm_Pending_initialization;
SHM_EXTERN rtems_unsigned32 Shm_Initialization_complete; SHM_EXTERN uint32_t Shm_Initialization_complete;
SHM_EXTERN rtems_unsigned32 Shm_Active_node; SHM_EXTERN uint32_t Shm_Active_node;
SHM_EXTERN rtems_unsigned32 Shm_Maximum_nodes; SHM_EXTERN uint32_t Shm_Maximum_nodes;
SHM_EXTERN rtems_unsigned32 Shm_Maximum_envelopes; SHM_EXTERN uint32_t Shm_Maximum_envelopes;
SHM_EXTERN rtems_unsigned32 Shm_Locked_queue_End_of_list; SHM_EXTERN uint32_t Shm_Locked_queue_End_of_list;
SHM_EXTERN rtems_unsigned32 Shm_Locked_queue_Not_on_list; SHM_EXTERN uint32_t Shm_Locked_queue_Not_on_list;
/* functions */ /* functions */
@@ -472,7 +472,7 @@ void Shm_Locked_queue_Add(
Shm_Locked_queue_Control *, Shm_Envelope_control * ); Shm_Locked_queue_Control *, Shm_Envelope_control * );
Shm_Envelope_control *Shm_Locked_queue_Get( Shm_Locked_queue_Control * ); Shm_Envelope_control *Shm_Locked_queue_Get( Shm_Locked_queue_Control * );
void Shm_Locked_queue_Initialize( void Shm_Locked_queue_Initialize(
Shm_Locked_queue_Control *, rtems_unsigned32 ); Shm_Locked_queue_Control *, uint32_t );
/* Shm_Initialize_lock is CPU dependent */ /* Shm_Initialize_lock is CPU dependent */
/* Shm_Lock is CPU dependent */ /* Shm_Lock is CPU dependent */
/* Shm_Unlock is CPU dependent */ /* Shm_Unlock is CPU dependent */
@@ -480,8 +480,8 @@ void Shm_Locked_queue_Initialize(
/* portable routines */ /* portable routines */
void Init_env_pool(); void Init_env_pool();
void Shm_Print_statistics( void ); void Shm_Print_statistics( void );
void MPCI_Fatal( Internal_errors_Source, boolean, rtems_unsigned32 ); void MPCI_Fatal( Internal_errors_Source, boolean, uint32_t );
rtems_task Shm_Cause_interrupt( rtems_unsigned32 ); rtems_task Shm_Cause_interrupt( uint32_t );
void Shm_Poll(); void Shm_Poll();
void Shm_setclockvec(); void Shm_setclockvec();
void Shm_Convert_packet( rtems_packet_prefix * ); void Shm_Convert_packet( rtems_packet_prefix * );
@@ -490,7 +490,7 @@ void Shm_Convert_packet( rtems_packet_prefix * );
/* target specific routines */ /* target specific routines */
void *Shm_Convert_address( void * ); void *Shm_Convert_address( void * );
void Shm_Get_configuration( rtems_unsigned32, shm_config_table ** ); void Shm_Get_configuration( uint32_t , shm_config_table ** );
void Shm_isr(); void Shm_isr();
void Shm_setvec( void ); void Shm_setvec( void );
@@ -514,7 +514,7 @@ rtems_mpci_entry Shm_Return_packet(
); );
rtems_mpci_entry Shm_Send_packet( rtems_mpci_entry Shm_Send_packet(
rtems_unsigned32, uint32_t ,
rtems_packet_prefix * rtems_packet_prefix *
); );