2010-05-20 Sebastian Huber <sebastian.huber@embedded-brains.de>

* include/lpc24xx.h, misc/dma-copy.c, misc/dma.c,
	misc/system-clocks.c, ssp/ssp.c, startup/bspstarthooks.c: Removed
	superfluous macros.

c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h

@@ -1168,6 +1168,12 @@ Reset, and Code Security/Debugging */
 
 /* Register Fields */
 
+#define GET_FIELD( val, mask, shift) \
+  (((val) & (mask)) >> (shift))
+
+#define SET_FIELD( val, field, mask, shift) \
+  (((val) & ~(mask)) | (((field) << (shift)) & (mask)))
+
 /* CLKSRCSEL */
 
 #define CLKSRCSEL_CLKSRC_MASK 0x00000003U

c/src/lib/libbsp/arm/lpc24xx/misc/dma-copy.c

@@ -38,16 +38,16 @@ static void lpc24xx_dma_copy_handler(void *arg)
   GPDMA_INT_ERR_CLR = err;
 
   /* Check channel 0 */
-  if (IS_FLAG_SET(tc, GPDMA_STATUS_CH_0)) {
+  if ((tc & GPDMA_STATUS_CH_0) != 0) {
     rtems_semaphore_release(lpc24xx_dma_sema_table [0]);
   }
-  lpc24xx_dma_status_table [0] = IS_FLAG_CLEARED(err, GPDMA_STATUS_CH_0);
+  lpc24xx_dma_status_table [0] = (err & GPDMA_STATUS_CH_0) == 0;
 
   /* Check channel 1 */
-  if (IS_FLAG_SET(tc, GPDMA_STATUS_CH_1)) {
+  if ((tc & GPDMA_STATUS_CH_1) != 0) {
     rtems_semaphore_release(lpc24xx_dma_sema_table [1]);
   }
-  lpc24xx_dma_status_table [1] = IS_FLAG_CLEARED(err, GPDMA_STATUS_CH_1);
+  lpc24xx_dma_status_table [1] = (err & GPDMA_STATUS_CH_1) == 0;
 }
 
 rtems_status_code lpc24xx_dma_copy_initialize(void)

c/src/lib/libbsp/arm/lpc24xx/misc/dma.c

@@ -85,15 +85,15 @@ void lpc24xx_dma_channel_disable(unsigned channel, bool force)
 
     if (!force) {
       /* Halt */
-      ch->cfg = SET_FLAG(cfg, GPDMA_CH_CFG_HALT);
+      ch->cfg |= GPDMA_CH_CFG_HALT;
 
       /* Wait for inactive */
       do {
         cfg = ch->cfg;
-      } while (IS_FLAG_SET(cfg, GPDMA_CH_CFG_ACTIVE));
+      } while ((cfg & GPDMA_CH_CFG_ACTIVE) != 0);
     }
 
     /* Disable */
-    ch->cfg = CLEAR_FLAG(cfg, GPDMA_CH_CFG_EN);
+    ch->cfg &= ~GPDMA_CH_CFG_EN;
   }
 }

c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c

@@ -93,7 +93,7 @@ unsigned lpc24xx_pllclk(void)
   }
 
   /* Get PLL output frequency */
-  if (IS_FLAG_SET(PLLSTAT, PLLSTAT_PLLC)) {
+  if ((PLLSTAT & PLLSTAT_PLLC) != 0) {
     uint32_t pllcfg = PLLCFG;
     unsigned n = GET_PLLCFG_NSEL(pllcfg) + 1;
     unsigned m = GET_PLLCFG_MSEL(pllcfg) + 1;

c/src/lib/libbsp/arm/lpc24xx/ssp/ssp.c

@@ -87,7 +87,7 @@ static void lpc24xx_ssp_handler(void *arg)
   uint32_t mis = regs->mis;
   uint32_t icr = 0;
 
-  if (IS_FLAG_SET(mis, SSP_MIS_RORRIS)) {
+  if ((mis & SSP_MIS_RORRIS) != 0) {
     /* TODO */
     printk("%s: Receiver overrun!\n", __func__);
     icr |= SSP_ICR_RORRIS;
@@ -105,7 +105,7 @@ static void lpc24xx_ssp_dma_handler(void *arg)
   int rv = 0;
 
   /* Return if we are not in a transfer status */
-  if (IS_FLAG_CLEARED(status, LPC24XX_SSP_DMA_TRANSFER_FLAG)) {
+  if ((status & LPC24XX_SSP_DMA_TRANSFER_FLAG) == 0) {
     return;
   }
 
@@ -121,25 +121,25 @@ static void lpc24xx_ssp_dma_handler(void *arg)
   if (err == 0) {
     switch (status) {
       case LPC24XX_SSP_DMA_WAIT:
-        if (ARE_FLAGS_SET(tc, GPDMA_STATUS_CH_0 | GPDMA_STATUS_CH_1)) {
+        if ((tc & (GPDMA_STATUS_CH_0 | GPDMA_STATUS_CH_1)) != 0) {
           status = LPC24XX_SSP_DMA_DONE;
-        } else if (IS_FLAG_SET(tc, GPDMA_STATUS_CH_0)) {
+        } else if ((tc & GPDMA_STATUS_CH_0) != 0) {
           status = LPC24XX_SSP_DMA_WAIT_FOR_CHANNEL_1;
-        } else if (IS_FLAG_SET(tc, GPDMA_STATUS_CH_1)) {
+        } else if ((tc & GPDMA_STATUS_CH_1) != 0) {
           status = LPC24XX_SSP_DMA_WAIT_FOR_CHANNEL_0;
         }
         break;
       case LPC24XX_SSP_DMA_WAIT_FOR_CHANNEL_0:
-        if (IS_FLAG_SET(tc, GPDMA_STATUS_CH_1)) {
+        if ((tc & GPDMA_STATUS_CH_1) != 0) {
           status = LPC24XX_SSP_DMA_ERROR;
-        } else if (IS_FLAG_SET(tc, GPDMA_STATUS_CH_0)) {
+        } else if ((tc & GPDMA_STATUS_CH_0) != 0) {
           status = LPC24XX_SSP_DMA_DONE;
         }
         break;
       case LPC24XX_SSP_DMA_WAIT_FOR_CHANNEL_1:
-        if (IS_FLAG_SET(tc, GPDMA_STATUS_CH_0)) {
+        if ((tc & GPDMA_STATUS_CH_0) != 0) {
           status = LPC24XX_SSP_DMA_ERROR;
-        } else if (IS_FLAG_SET(tc, GPDMA_STATUS_CH_1)) {
+        } else if ((tc & GPDMA_STATUS_CH_1) != 0) {
           status = LPC24XX_SSP_DMA_DONE;
         }
         break;
@@ -363,7 +363,7 @@ static int lpc24xx_ssp_set_transfer_mode(
 
   e->idle_char = mode->idle_char;
 
-  while (IS_FLAG_CLEARED(regs->sr, SSP_SR_TFE)) {
+  while ((regs->sr & SSP_SR_TFE) == 0) {
     /* Wait */
   }
 
@@ -426,14 +426,14 @@ static int lpc24xx_ssp_read_write(
     m = w - r;
 
     /* Write */
-    if (IS_FLAG_SET(sr, SSP_SR_TNF) && m < LPC24XX_SSP_FIFO_SIZE) {
+    if ((sr & SSP_SR_TNF) != 0 && m < LPC24XX_SSP_FIFO_SIZE) {
       regs->dr = *out;
       ++w;
       out += dw;
     }
 
     /* Read */
-    if (IS_FLAG_SET(sr, SSP_SR_RNE)) {
+    if ((sr & SSP_SR_RNE) != 0) {
       *in = (unsigned char) regs->dr;
       ++r;
       in += dr;
@@ -448,7 +448,7 @@ static int lpc24xx_ssp_read_write(
     /* Wait */
     do {
       sr = regs->sr;
-    } while (IS_FLAG_CLEARED(sr, SSP_SR_RNE));
+    } while ((sr & SSP_SR_RNE) == 0);
 
     /* Read */
     *in = (unsigned char) regs->dr;

c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c

@@ -143,12 +143,12 @@ static void BSP_START_SECTION lpc24xx_init_emc_1(void)
 {
   #ifdef LPC24XX_EMC_INIT
     /* Use normal memory map */
-    EMC_CTRL = CLEAR_FLAG(EMC_CTRL, 0x2);
+    EMC_CTRL &= ~0x2;
   #endif
 
   #ifdef LPC24XX_EMC_MICRON
     /* Check if we need to initialize it */
-    if (IS_FLAG_CLEARED(EMC_DYN_CFG0, 0x00080000)) {
+    if ((EMC_DYN_CFG0 & 0x00080000) == 0) {
       /*
        * The buffer enable bit is not set.  Now we assume that the controller
        * is not properly initialized.
@@ -278,10 +278,10 @@ static void BSP_START_SECTION lpc24xx_set_pll(
   uint32_t pllcfg = SET_PLLCFG_NSEL(0, nsel) | SET_PLLCFG_MSEL(0, msel);
   uint32_t clksrcsel = SET_CLKSRCSEL_CLKSRC(0, clksrc);
   uint32_t cclkcfg = SET_CCLKCFG_CCLKSEL(0, cclksel | 1);
-  bool pll_enabled = IS_FLAG_SET(pllstat, PLLSTAT_PLLE);
+  bool pll_enabled = (pllstat & PLLSTAT_PLLE) != 0;
 
   /* Disconnect PLL if necessary */
-  if (IS_FLAG_SET(pllstat, PLLSTAT_PLLC)) {
+  if ((pllstat & PLLSTAT_PLLC) != 0) {
     if (pll_enabled) {
       /* Check if we run already with the desired settings */
       if (PLLCFG == pllcfg && CLKSRCSEL == clksrcsel && CCLKCFG == cclkcfg) {
@@ -312,7 +312,7 @@ static void BSP_START_SECTION lpc24xx_set_pll(
   lpc24xx_pll_config(PLLCON_PLLE);
 
   /* Wait for lock */
-  while (IS_FLAG_CLEARED(PLLSTAT, PLLSTAT_PLOCK)) {
+  while ((PLLSTAT & PLLSTAT_PLOCK) == 0) {
     /* Wait */
   }
 
@@ -326,9 +326,9 @@ static void BSP_START_SECTION lpc24xx_set_pll(
 static void BSP_START_SECTION lpc24xx_init_pll(void)
 {
   /* Enable main oscillator */
-  if (IS_FLAG_CLEARED(SCS, 0x40)) {
+  if ((SCS & 0x40) == 0) {
-    SCS = SET_FLAG(SCS, 0x20);
+    SCS |= 0x20;
-    while (IS_FLAG_CLEARED(SCS, 0x40)) {
+    while ((SCS & 0x40) == 0) {
       /* Wait */
     }
   }
@@ -383,7 +383,7 @@ void BSP_START_SECTION bsp_start_hook_1(void)
   MAMCR = 0x2;
 
   /* Enable fast IO for ports 0 and 1 */
-  SCS = SET_FLAG(SCS, 0x1);
+  SCS |= 0x1;
 
   /* Set fast IO */
   FIO0DIR = 0;