2003-03-25 Till Straumann <strauman@slac.stanford.edu>

PR 360/bsps
	* irq/irq.c, irq/irq_init.c, openpic/openpic.c, openpic/openpic.h:
	BSP code had set the task priority register multiple times of
	the OpenPIC instead of setting the individual source priorities.
	This patch adds openpic_get_source_priority() and
	openpic_set_source_priority() calls and lets IRQ management code
	use them.

c/src/lib/libbsp/powerpc/shared/ChangeLog

@@ -1,3 +1,13 @@
+2003-03-25  Till Straumann <strauman@slac.stanford.edu>
+
+	PR 360/bsps
+	* irq/irq.c, irq/irq_init.c, openpic/openpic.c, openpic/openpic.h:
+	BSP code had set the task priority register multiple times of
+	the OpenPIC instead of setting the individual source priorities.
+	This patch adds openpic_get_source_priority() and
+	openpic_set_source_priority() calls and lets IRQ management code
+	use them.
+
 2003-03-25  Till Straumann <strauman@slac.stanford.edu>
 
 	PR 349/bsps

c/src/lib/libbsp/powerpc/shared/irq/irq.c

@@ -19,6 +19,7 @@
 #include <rtems/score/thread.h>
 #include <rtems/score/apiext.h>
 #include <libcpu/raw_exception.h>
+#include <libcpu/io.h>
 #include <bsp/vectors.h>
 
 #include <rtems/bspIo.h> /* for printk */
@@ -280,7 +281,11 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
      * continue with PCI IRQ
      */
     for (i=BSP_PCI_IRQ_LOWEST_OFFSET; i < BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER ; i++) {
-      openpic_set_priority(0, internal_config->irqPrioTbl [i]);
+      /*
+       * Note that openpic_set_priority() sets the TASK priority of the PIC
+       */
+      openpic_set_source_priority(i - BSP_PCI_IRQ_LOWEST_OFFSET,
+				  internal_config->irqPrioTbl[i]);
       if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
 	openpic_enable_irq ((int) i - BSP_PCI_IRQ_LOWEST_OFFSET);
 	rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
@@ -317,7 +322,7 @@ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config)
 
 int _BSP_vme_bridge_irq = -1;
  
-static unsigned spuriousIntr = 0;
+unsigned spuriousIntr = 0;
 /*
  * High level IRQ handler called from shared_raw_irq_code_entry
  */
@@ -344,7 +349,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
   }
   irq = openpic_irq(0);
   if (irq == OPENPIC_VEC_SPURIOUS) {
-    ++spuriousIntr;
+    ++BSP_spuriousIntr;
     return;
   }
   isaIntr = (irq == BSP_PCI_ISA_BRIDGE_IRQ);

c/src/lib/libbsp/powerpc/shared/irq/irq_init.c

@@ -85,7 +85,7 @@ static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
   /*
    * PCI Interrupts
    */
-  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* for raven prio 0 means unactive... */
+  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, /* for raven prio 0 means unactive... */
   /*
    * Processor exceptions handled as interrupts
    */

c/src/lib/libbsp/powerpc/shared/openpic/openpic.c

@@ -19,6 +19,7 @@
  *  Note: Interprocessor Interrupt (IPI) and Timer support is incomplete
  */
 
+#include <rtems.h>
 #include <rtems/bspIo.h>
 #include <bsp/openpic.h>
 #include <bsp/pci.h>
@@ -94,7 +95,7 @@ static inline unsigned int openpic_read(volatile unsigned int *addr)
 {
     unsigned int val;
 
-    val = ld_le32(addr);
+    val = in_le32(addr);
 #ifdef REGISTER_DEBUG
     printk("openpic_read(0x%08x) = 0x%08x\n", (unsigned int)addr, val);
 #endif
@@ -251,10 +252,6 @@ void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses
 	    }
 	    
 	    /* Initialize external interrupts */
-	    /* SIOint (8259 cascade) is special */
-	    openpic_initirq(0, 8, OPENPIC_VEC_SOURCE, 1, 1);
-	    /* Processor 0 */
-	    openpic_mapirq(0, 1<<0);
 	    for (i = 0; i < NumSources; i++) {
 		    /* Enabled, Priority 8 */
 		    openpic_initirq(i, 8, OPENPIC_VEC_SOURCE+i,
@@ -454,14 +451,20 @@ void openpic_maptimer(unsigned int timer, unsigned int cpumask)
 
 void openpic_enable_irq(unsigned int irq)
 {
+unsigned long flags;
     check_arg_irq(irq);
+	rtems_interrupt_disable(flags);
     openpic_clearfield(&OpenPIC->Source[irq].Vector_Priority, OPENPIC_MASK);
+	rtems_interrupt_enable(flags);
 }
 
 void openpic_disable_irq(unsigned int irq)
 {
+unsigned long flags;
     check_arg_irq(irq);
+	rtems_interrupt_disable(flags);
     openpic_setfield(&OpenPIC->Source[irq].Vector_Priority, OPENPIC_MASK);
+	rtems_interrupt_enable(flags);
 }
 
 
@@ -499,7 +502,28 @@ void openpic_mapirq(unsigned int irq, unsigned int cpumask)
     openpic_write(&OpenPIC->Source[irq].Destination, cpumask);
 }
 
+	/*
+	 * Get the current priority of an external interrupt
+	 */
+unsigned int openpic_get_source_priority(unsigned int irq)
+{
+    check_arg_irq(irq);
+	return openpic_readfield(&OpenPIC->Source[irq].Vector_Priority,
+							 OPENPIC_PRIORITY_MASK) >> OPENPIC_PRIORITY_SHIFT;
+}
 
+void openpic_set_source_priority(unsigned int irq, unsigned int pri)
+{
+unsigned long flags;
+    check_arg_irq(irq);
+    check_arg_pri(pri);
+	rtems_interrupt_disable(flags);
+	openpic_writefield(
+					&OpenPIC->Source[irq].Vector_Priority,
+					OPENPIC_PRIORITY_MASK,
+					pri << OPENPIC_PRIORITY_SHIFT);
+	rtems_interrupt_enable(flags);
+}
     /*
      *  Set the sense for an interrupt source (and disable it!)
      *

c/src/lib/libbsp/powerpc/shared/openpic/openpic.h

@@ -334,5 +334,7 @@ extern void openpic_initirq(unsigned int irq, unsigned int pri, unsigned int vec
 			    int is_level);
 extern void openpic_mapirq(unsigned int irq, unsigned int cpumask);
 extern void openpic_set_sense(unsigned int irq, int sense);
+extern unsigned int openpic_get_source_priority(unsigned int irq);
+extern void openpic_set_source_priority(unsigned int irq, unsigned int pri);
 
 #endif /* RTEMS_OPENPIC_H */