bsps: Move documentation, etc. files to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

bsps/sparc64/niagara/README

@@ -0,0 +1,65 @@
+BSP NAME:           niagara
+BOARD:              
+BUS:                n/a
+CPU FAMILY:         SPARC V9 with UltraSPARC Architecture 2005 (a.k.a. sun4v)
+CPU:                UltraSPARC T1 (OpenSPARC T1)
+COPROCESSORS:       
+MODE:               n/a
+
+DEBUG MONITOR:      
+
+PERIPHERALS
+===========
+TIMERS:             TICK and STICK registers (ASRs 4 and 24)
+  RESOLUTION:         CPU clock resolution
+SERIAL PORTS:       
+REAL-TIME CLOCK:    
+DMA:                none
+VIDEO:              none
+SCSI:               none
+NETWORKING:         none
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       
+IOSUPP DRIVER:      
+SHMSUPP:            
+TIMER DRIVER:       
+TTY DRIVER:         
+
+STDIO
+=====
+PORT:               
+ELECTRICAL:         
+BAUD:               
+BITS PER CHARACTER: 
+PARITY:             
+STOP BITS:          
+
+NOTES
+=====
+
+Board description
+-----------------
+clock rate:     
+bus width:      
+ROM:            
+RAM:            
+
+This BSP is designed to operate on the UltraSPARC T1 (Niagara) SPARC64 
+and similar processors.
+
+This BSP has been run on the Simics simulator with the niagara target, which 
+simulates the OpenSPARC T1 Niagara implementation.
+
+This BSP has been run on the M5 simulator with the SPARC_FS target, which
+simulates the OpenSPARC T1 Niagara implementation.
+
+Simics:
+A commercially available simulator licensed by Virtutech.
+https://www.simics.net/
+
+M5:
+An open-source simulator.
+http://www.m5sim.org/wiki/index.php/Main_Page
+

bsps/sparc64/usiii/README

@@ -0,0 +1,57 @@
+BSP NAME:           usiii
+BOARD:              
+BUS:                n/a
+CPU FAMILY:         SPARC V9 (a.k.a. sun4u)
+CPU:                UltraSPARC III
+COPROCESSORS:       
+MODE:               n/a
+
+DEBUG MONITOR:      
+
+PERIPHERALS
+===========
+TIMERS:             TICK register (ASR 4)
+  RESOLUTION:         CPU clock resolution
+SERIAL PORTS:       
+REAL-TIME CLOCK:    
+DMA:                none
+VIDEO:              none
+SCSI:               none
+NETWORKING:         none
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       
+IOSUPP DRIVER:      
+SHMSUPP:            
+TIMER DRIVER:       
+TTY DRIVER:         
+
+STDIO
+=====
+PORT:               
+ELECTRICAL:         
+BAUD:               
+BITS PER CHARACTER: 
+PARITY:             
+STOP BITS:          
+
+NOTES
+=====
+
+Board description
+-----------------
+clock rate:     
+bus width:      
+ROM:            
+RAM:            
+
+This BSP is designed to operate on the UltraSPARC III SPARC64 
+and similar processors.
+
+This BSP has been run on the Simics simulator with the serengeti target.
+
+Simics:
+A commercially available simulator licensed by Virtutech.
+https://www.simics.net/
+