diff --git a/bsps/i386/pc386/start/bsp_fatal_halt.c b/bsps/i386/pc386/start/bsp_fatal_halt.c deleted file mode 100644 index e55de824c2..0000000000 --- a/bsps/i386/pc386/start/bsp_fatal_halt.c +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * COPYRIGHT (c) 2016. - * On-Line Applications Research Corporation (OAR). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - __asm__ volatile ( - "cli\n\t" - "movl %0,%%eax\n\t" - "hlt\n\t" - : "=r" ((error)) - : "0" ((error)) - ); - RTEMS_UNREACHABLE(); -} diff --git a/bsps/riscv/griscv/start/bsp_fatal_halt.c b/bsps/riscv/griscv/start/bsp_fatal_halt.c index a45244499e..c16ab282ae 100644 --- a/bsps/riscv/griscv/start/bsp_fatal_halt.c +++ b/bsps/riscv/griscv/start/bsp_fatal_halt.c @@ -27,7 +27,6 @@ */ #include -#include void bsp_reset( rtems_fatal_source source, rtems_fatal_code code ) { @@ -35,8 +34,3 @@ void bsp_reset( rtems_fatal_source source, rtems_fatal_code code ) asm ("ecall"); RTEMS_UNREACHABLE(); } - -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr code ) -{ - bsp_reset( source, code ); -} diff --git a/bsps/riscv/noel/start/bsp_fatal_halt.c b/bsps/riscv/noel/start/bsp_fatal_halt.c index cc92ec78ee..58ea5e4bbf 100644 --- a/bsps/riscv/noel/start/bsp_fatal_halt.c +++ b/bsps/riscv/noel/start/bsp_fatal_halt.c @@ -43,8 +43,3 @@ void bsp_reset( rtems_fatal_source source, rtems_fatal_code code ) __asm__ volatile ("srai zero, zero, 0x7"); RTEMS_UNREACHABLE(); } - -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr code ) -{ - bsp_reset( source, code ); -} diff --git a/bsps/riscv/riscv/start/bsp_fatal_halt.c b/bsps/riscv/riscv/start/bsp_fatal_halt.c index 8c9103ede1..a9df4bcf4a 100644 --- a/bsps/riscv/riscv/start/bsp_fatal_halt.c +++ b/bsps/riscv/riscv/start/bsp_fatal_halt.c @@ -30,7 +30,6 @@ #include #include -#include #include @@ -65,8 +64,3 @@ void bsp_reset( rtems_fatal_source source, rtems_fatal_code code ) } } } - -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr code ) -{ - bsp_reset( source, code ); -} diff --git a/cpukit/libtest/testgcovcpufatalhalt.c b/cpukit/libtest/testgcovcpufatalhalt.c deleted file mode 100644 index 9ac242885b..0000000000 --- a/cpukit/libtest/testgcovcpufatalhalt.c +++ /dev/null @@ -1,54 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSTestFrameworkImpl - * - * @brief This source file contains the implementation of a wrapper for - * _CPU_Fatal_halt() which dumps the gcov information using - * rtems_test_gcov_dump_info() before the real _CPU_Fatal_halt() is called. - */ - -/* - * Copyright (C) 2021, 2022 embedded brains GmbH & Co. KG - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include - -#include - -void __real__CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - -void __wrap__CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - -void __wrap__CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - rtems_test_gcov_dump_info(); - __real__CPU_Fatal_halt( source, error ); -} diff --git a/cpukit/score/cpu/aarch64/cpu.c b/cpukit/score/cpu/aarch64/cpu.c index 207508302b..b0320ad77b 100644 --- a/cpukit/score/cpu/aarch64/cpu.c +++ b/cpukit/score/cpu/aarch64/cpu.c @@ -178,16 +178,3 @@ void _CPU_Initialize( void ) { /* Do nothing */ } - -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - ISR_Level level; - - _CPU_ISR_Disable( level ); - (void) level; - __asm__ volatile ("mov x0, %0\n" - : "=r" (error) - : "0" (error) - : "x0" ); - while (1); -} diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h index 8a0e476899..f79ab987ea 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h @@ -61,8 +61,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - typedef struct { uint64_t x0; uint64_t register_lr_original; diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c index c27f4de9f9..0b601d0ad0 100644 --- a/cpukit/score/cpu/arm/cpu.c +++ b/cpukit/score/cpu/arm/cpu.c @@ -8,7 +8,7 @@ * @brief This source file contains static assertions to ensure the consistency * of interfaces used in C and assembler and it contains the ARM-specific * implementation of _CPU_Initialize(), _CPU_ISR_Get_level(), - * _CPU_ISR_Set_level(), _CPU_Context_Initialize(), and _CPU_Fatal_halt(). + * _CPU_ISR_Set_level(), and _CPU_Context_Initialize(). */ /* @@ -165,20 +165,3 @@ void _CPU_Initialize( void ) } #endif /* ARM_MULTILIB_ARCH_V4 */ - -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - ISR_Level level; - - _CPU_ISR_Disable( level ); - (void) level; - - __asm__ volatile ("mov r0, %0\n" - : "=r" (error) - : "0" (error) - : "r0" ); - - while ( true ) { - /* Do nothing */ - } -} diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h index 04d23f0ea7..a32e9b4098 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h @@ -149,8 +149,6 @@ static inline struct Per_CPU_Control *_ARM_Get_current_per_CPU_control( void ) #endif /* ARM_MULTILIB_ARCH_V4 */ -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/bfin/cpu.c b/cpukit/score/cpu/bfin/cpu.c index 962e84d1bc..e0f91aae3e 100644 --- a/cpukit/score/cpu/bfin/cpu.c +++ b/cpukit/score/cpu/bfin/cpu.c @@ -74,17 +74,6 @@ void _CPU_Initialize(void) __asm__ __volatile__ ("syscfg = %0" : : "d" (0x00000004)); } -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - __asm__ volatile ( "cli R1; R1 = %0; _halt: idle; jump _halt;" - : : "r" (error) ); -} - -/* end of Fatal Error manager macros */ - - - - /* * _CPU_ISR_Get_level * diff --git a/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h index 5a445d9420..cc56aa3bbd 100644 --- a/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h @@ -37,8 +37,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h index da38ecacf7..5eeaa455ee 100644 --- a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h @@ -58,8 +58,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/cpukit/score/cpu/lm32/cpu.c b/cpukit/score/cpu/lm32/cpu.c index 3301a3099b..5a33a9bb75 100644 --- a/cpukit/score/cpu/lm32/cpu.c +++ b/cpukit/score/cpu/lm32/cpu.c @@ -46,18 +46,6 @@ void _CPU_Initialize(void) /* FP context initialization support goes here */ } -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - ISR_Level level; - - _CPU_ISR_Disable( level ); - (void) level; - - while ( true ) { - /* Do nothing */ - } -} - uint32_t _CPU_ISR_Get_level( void ) { /* diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h index 70a1db1d4d..dcb6f8bfed 100644 --- a/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h @@ -36,8 +36,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/cpukit/score/cpu/m68k/cpu.c b/cpukit/score/cpu/m68k/cpu.c index 44dc06cc91..579454d52a 100644 --- a/cpukit/score/cpu/m68k/cpu.c +++ b/cpukit/score/cpu/m68k/cpu.c @@ -108,29 +108,6 @@ void _CPU_Initialize(void) m68k_install_interrupt_stack(); } -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ -#if ( defined(__mcoldfire__) ) - __asm__ volatile( "move.w %%sr,%%d0\n\t" - "or.l %2,%%d0\n\t" - "move.w %%d0,%%sr\n\t" - "move.l %1,%%d0\n\t" - "move.l #0xDEADBEEF,%%d1\n\t" - "halt" - : "=g" (error) - : "0" (error), "d"(0x0700) - : "d0", "d1" ); - -#else - __asm__ volatile( "movl %0,%%d0; " - "orw #0x0700,%%sr; " - "stop #0x2700" : "=d" ((error)) : "0" ((error)) ); - -#endif - -/* end of Fatal Error manager macros */ -} - uint32_t _CPU_ISR_Get_level( void ) { uint32_t level; diff --git a/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h index 521e9fc4c2..b914072664 100644 --- a/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h @@ -56,8 +56,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/cpukit/score/cpu/microblaze/include/rtems/score/cpu.h b/cpukit/score/cpu/microblaze/include/rtems/score/cpu.h index f95406cfe7..458bdf3442 100644 --- a/cpukit/score/cpu/microblaze/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/microblaze/include/rtems/score/cpu.h @@ -290,17 +290,6 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/* TODO */ -#define _CPU_Fatal_halt(_source, _error ) \ - do { \ - __asm__ volatile ( "sleep" ); \ - for(;;) {} \ - } while (0) - -/* end of Fatal Error manager macros */ - /* Bitfield handler macros */ #define CPU_USE_GENERIC_BITFIELD_CODE TRUE diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c index 526f7db13f..faa042e126 100644 --- a/cpukit/score/cpu/mips/cpu.c +++ b/cpukit/score/cpu/mips/cpu.c @@ -113,18 +113,6 @@ void _CPU_Initialize(void) #endif } -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - ISR_Level level; - - _CPU_ISR_Disable( level ); - (void) level; - - while ( true ) { - /* Do nothing */ - } -} - uint32_t _CPU_ISR_Get_level( void ) { unsigned int sr; diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h index 98ed1c492f..34e5f07737 100644 --- a/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h @@ -56,8 +56,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/cpukit/score/cpu/moxie/cpu.c b/cpukit/score/cpu/moxie/cpu.c index a3d1005ad8..b3286c7ed9 100644 --- a/cpukit/score/cpu/moxie/cpu.c +++ b/cpukit/score/cpu/moxie/cpu.c @@ -58,18 +58,6 @@ void _CPU_Initialize(void) /* FP context initialization support goes here */ } -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - ISR_Level level; - - _CPU_ISR_Disable( level ); - (void) level; - - while ( true ) { - /* Do nothing */ - } -} - /* * _CPU_ISR_Get_level * diff --git a/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h index 44c70cc56d..48932fc4eb 100644 --- a/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h @@ -56,8 +56,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h index 3c9c6734ec..74449af9e8 100644 --- a/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h @@ -56,8 +56,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/nios2/nios2-fatal-halt.c b/cpukit/score/cpu/nios2/nios2-fatal-halt.c deleted file mode 100644 index 3fa43d630d..0000000000 --- a/cpukit/score/cpu/nios2/nios2-fatal-halt.c +++ /dev/null @@ -1,45 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * Copyright (c) 2011 embedded brains GmbH & Co. KG - * - * Copyright (c) 2006 Kolja Waschk (rtemsdev/ixo.de) - * - * COPYRIGHT (c) 1989-2004. - * On-Line Applications Research Corporation (OAR). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -void _CPU_Fatal_halt( uint32_t _source, CPU_Uint32ptr _error ) -{ - /* write 0 to status register (disable interrupts) */ - __builtin_wrctl( NIOS2_CTLREG_INDEX_STATUS, 0 ); - - /* write error code to ET register */ - __asm__ volatile ("mov et, %z0" : : "rM" (_error)); - - while (1); -} diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h index 61f1ab7ba5..339062a84f 100644 --- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h @@ -120,17 +120,6 @@ register struct Per_CPU_Control *_CPU_Per_CPU_current asm( "rX" ); */ #define _CPU_Get_thread_executing() ( _CPU_Per_CPU_current->executing ) -/** - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - /* end of Fatal Error manager macros */ /** diff --git a/cpukit/score/cpu/or1k/cpu.c b/cpukit/score/cpu/or1k/cpu.c index 507e1d7104..b545739838 100644 --- a/cpukit/score/cpu/or1k/cpu.c +++ b/cpukit/score/cpu/or1k/cpu.c @@ -47,20 +47,6 @@ void _CPU_Initialize(void) /* Do nothing */ } -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - ISR_Level level; - - _CPU_ISR_Disable( level ); - (void) level; - - _OR1KSIM_CPU_Halt(); - - while ( true ) { - /* Do nothing */ - } -} - /* end of Fatal Error manager macros */ /** diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h index 9b58b1b77a..33f1e36a02 100644 --- a/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h @@ -56,8 +56,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/powerpc/cpu.c b/cpukit/score/cpu/powerpc/cpu.c index 7c90ac28dc..cef1fb2698 100644 --- a/cpukit/score/cpu/powerpc/cpu.c +++ b/cpukit/score/cpu/powerpc/cpu.c @@ -345,18 +345,3 @@ RTEMS_STATIC_ASSERT( sizeof(CPU_Exception_frame) + FRAME_LINK_SPACE <= PPC_EXC_FRAME_SIZE, CPU_Exception_frame ); - -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - ppc_interrupt_disable(); - __asm__ volatile ( - "mr 3, %0\n" - "mr 4, %1\n" - "1:\n" - "b 1b\n" - : \ - : "r" (source), "r" (error) - : "memory" - ); - RTEMS_UNREACHABLE(); -} diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h index 68b7165546..64833590e5 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h @@ -269,8 +269,6 @@ static inline struct Per_CPU_Control *_PPC_Get_current_per_CPU_control( void ) #endif /* RTEMS_SMP */ -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h index 13fd60ed8c..65bdbd42ba 100644 --- a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h @@ -426,8 +426,6 @@ static inline struct Per_CPU_Control *_RISCV_Get_current_per_CPU_control( void ) #endif /* RTEMS_SMP */ -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/sh/cpu.c b/cpukit/score/cpu/sh/cpu.c index 558f95be4d..0cfb3ae2b1 100644 --- a/cpukit/score/cpu/sh/cpu.c +++ b/cpukit/score/cpu/sh/cpu.c @@ -76,13 +76,6 @@ void _CPU_Initialize(void) _CPU_ISR_Set_level( level ) ; } -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - __asm__ volatile("mov.l %0,r0"::"m" (error)); - __asm__ volatile("mov #1, r4"); - __asm__ volatile("trapa #34"); -} - /* * _CPU_ISR_Get_level */ diff --git a/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h index e5f45eb363..5a712c369d 100644 --- a/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h @@ -37,8 +37,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h index 9697209a97..3f933cb12b 100644 --- a/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h @@ -223,8 +223,6 @@ register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__( "g6" ); #define _CPU_Get_thread_executing() ( _SPARC_Per_CPU_current->executing ) -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/sparc/syscall.S b/cpukit/score/cpu/sparc/syscall.S index aa93d0400d..b13b030a9d 100644 --- a/cpukit/score/cpu/sparc/syscall.S +++ b/cpukit/score/cpu/sparc/syscall.S @@ -45,11 +45,9 @@ SYM(syscall): PUBLIC(bsp_reset) PUBLIC(sparc_syscall_exit) - PUBLIC(_CPU_Fatal_halt) SYM(bsp_reset): SYM(sparc_syscall_exit): -SYM(_CPU_Fatal_halt): mov SYS_exit, %g1 mov %o0, %g2 ! Additional exit code 1 diff --git a/cpukit/score/cpu/sparc64/cpu.c b/cpukit/score/cpu/sparc64/cpu.c index ae3b359876..41abc58de4 100644 --- a/cpukit/score/cpu/sparc64/cpu.c +++ b/cpukit/score/cpu/sparc64/cpu.c @@ -83,15 +83,6 @@ void _CPU_Initialize(void) _CPU_ISR_Dispatch_disable = 0; } -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - uint32_t level; - - level = sparc_disable_interrupts(); - __asm__ volatile ( "mov %0, %%g1 " : "=r" (level) : "0" (level) ); - while (1); /* loop forever */ -} - void _CPU_Context_Initialize( Context_Control *the_context, void *stack_base, diff --git a/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h index 25a362c350..36f4ff040f 100644 --- a/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h @@ -56,8 +56,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/cpukit/score/cpu/v850/cpu.c b/cpukit/score/cpu/v850/cpu.c index e61874f9c1..ac5b492a82 100644 --- a/cpukit/score/cpu/v850/cpu.c +++ b/cpukit/score/cpu/v850/cpu.c @@ -50,13 +50,6 @@ void _CPU_Initialize(void) { } -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - __asm__ __volatile__ ( "di" ); - __asm__ __volatile__ ( "mov %0, r10; " : "=r" ((error)) ); - __asm__ __volatile__ ( "halt" ); -} - /* * v850 Specific Information: * diff --git a/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h index 5bc1c42459..c87b173d09 100644 --- a/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h @@ -56,8 +56,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/cpukit/score/cpu/x86_64/cpu.c b/cpukit/score/cpu/x86_64/cpu.c index 44fe39482a..7527e797bb 100644 --- a/cpukit/score/cpu/x86_64/cpu.c +++ b/cpukit/score/cpu/x86_64/cpu.c @@ -60,15 +60,3 @@ void _CPU_Initialize(void) asm volatile( "stmxcsr %0" : "=m"(_CPU_Null_fp_context.mxcsr) ); asm volatile( "fstcw %0" : "=m"(_CPU_Null_fp_context.fpucw) ); } - -void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) -{ - ISR_Level level; - - _CPU_ISR_Disable( level ); - (void) level; - - while ( true ) { - /* Do nothing */ - } -} diff --git a/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h index 410eff5ea3..35fc56183f 100644 --- a/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h @@ -57,8 +57,6 @@ extern "C" { #endif -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); - static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { (void) pattern; diff --git a/spec/build/bsps/i386/pc386/obj.yml b/spec/build/bsps/i386/pc386/obj.yml index 5393a369b6..c8bea7f333 100644 --- a/spec/build/bsps/i386/pc386/obj.yml +++ b/spec/build/bsps/i386/pc386/obj.yml @@ -51,7 +51,6 @@ source: - bsps/i386/pc386/console/tty_drv.c - bsps/i386/pc386/console/uart.c - bsps/i386/pc386/console/uart_bus_pci.c -- bsps/i386/pc386/start/bsp_fatal_halt.c - bsps/i386/pc386/start/bspcmdline.c - bsps/i386/pc386/start/bspgetworkarea.c - bsps/i386/pc386/start/bspidle.S diff --git a/spec/build/cpukit/cpunios2.yml b/spec/build/cpukit/cpunios2.yml index 3f424f2808..105605d527 100644 --- a/spec/build/cpukit/cpunios2.yml +++ b/spec/build/cpukit/cpunios2.yml @@ -31,7 +31,6 @@ source: - cpukit/score/cpu/nios2/nios2-context-volatile-clobber.S - cpukit/score/cpu/nios2/nios2-eic-il-low-level.S - cpukit/score/cpu/nios2/nios2-exception-frame-print.c -- cpukit/score/cpu/nios2/nios2-fatal-halt.c - cpukit/score/cpu/nios2/nios2-iic-irq.c - cpukit/score/cpu/nios2/nios2-iic-low-level.S - cpukit/score/cpu/nios2/nios2-initialize.c diff --git a/spec/build/cpukit/librtemstest.yml b/spec/build/cpukit/librtemstest.yml index fbce36aace..5e769fd856 100644 --- a/spec/build/cpukit/librtemstest.yml +++ b/spec/build/cpukit/librtemstest.yml @@ -44,7 +44,6 @@ source: - cpukit/libtest/testbusy.c - cpukit/libtest/testexit.c - cpukit/libtest/testextension.c -- cpukit/libtest/testgcovcpufatalhalt.c - cpukit/libtest/testgcovbspreset.c - cpukit/libtest/testgcovdumpinfo.c - cpukit/libtest/testparallel.c