rtems: Use size_t for cache line size

A cache line cannot have a negative size.
This commit is contained in:
Sebastian Huber
2014-02-26 11:00:17 +01:00
parent 5e8301da86
commit e7549ff4a1
5 changed files with 8 additions and 8 deletions

View File

@@ -629,7 +629,7 @@ static void initializeHardware(struct bfin_ethernetSoftc *sc) {
including other status structures, so we can safely manage both the including other status structures, so we can safely manage both the
processor and DMA writing to them. So this rounds up the structure processor and DMA writing to them. So this rounds up the structure
sizes to a multiple of the cache line size. */ sizes to a multiple of the cache line size. */
cacheAlignment = rtems_cache_get_data_line_size(); cacheAlignment = (int) rtems_cache_get_data_line_size();
if (cacheAlignment == 0) if (cacheAlignment == 0)
cacheAlignment = 1; cacheAlignment = 1;
rxStatusSize = cacheAlignment * ((sizeof(rxStatusT) + cacheAlignment - 1) / rxStatusSize = cacheAlignment * ((sizeof(rxStatusT) + cacheAlignment - 1) /

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@@ -21,7 +21,7 @@ int ppc_exc_alignment_handler(BSP_Exception_frame *frame, unsigned excNum)
/* Do we have a dcbz instruction? */ /* Do we have a dcbz instruction? */
if ((opcode & 0xffe007ff) == 0x7c0007ec) { if ((opcode & 0xffe007ff) == 0x7c0007ec) {
unsigned clsz = (unsigned) rtems_cache_get_data_line_size(); unsigned clsz = rtems_cache_get_data_line_size();
unsigned a = (opcode >> 16) & 0x1f; unsigned a = (opcode >> 16) & 0x1f;
unsigned b = (opcode >> 11) & 0x1f; unsigned b = (opcode >> 11) & 0x1f;
unsigned *regs = &frame->GPR0; unsigned *regs = &frame->GPR0;

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@@ -149,7 +149,7 @@ rtems_cache_invalidate_entire_data( void )
/* /*
* This function returns the data cache granularity. * This function returns the data cache granularity.
*/ */
int size_t
rtems_cache_get_data_line_size( void ) rtems_cache_get_data_line_size( void )
{ {
#if defined(CPU_DATA_CACHE_ALIGNMENT) #if defined(CPU_DATA_CACHE_ALIGNMENT)
@@ -264,7 +264,7 @@ rtems_cache_invalidate_entire_instruction( void )
/* /*
* This function returns the instruction cache granularity. * This function returns the instruction cache granularity.
*/ */
int size_t
rtems_cache_get_instruction_line_size( void ) rtems_cache_get_instruction_line_size( void )
{ {
#if defined(CPU_INSTRUCTION_CACHE_ALIGNMENT) #if defined(CPU_INSTRUCTION_CACHE_ALIGNMENT)

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@@ -47,7 +47,7 @@ extern "C" {
* @retval 0 No data cache is present. * @retval 0 No data cache is present.
* @retval positive The data cache line size in bytes. * @retval positive The data cache line size in bytes.
*/ */
int rtems_cache_get_data_line_size( void ); size_t rtems_cache_get_data_line_size( void );
/** /**
* @brief Returns the instruction cache line size in bytes. * @brief Returns the instruction cache line size in bytes.
@@ -58,7 +58,7 @@ int rtems_cache_get_data_line_size( void );
* @retval 0 No instruction cache is present. * @retval 0 No instruction cache is present.
* @retval positive The instruction cache line size in bytes. * @retval positive The instruction cache line size in bytes.
*/ */
int rtems_cache_get_instruction_line_size( void ); size_t rtems_cache_get_instruction_line_size( void );
/** /**
* @brief Flushes multiple data cache lines. * @brief Flushes multiple data cache lines.

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@@ -165,7 +165,7 @@ static void test_timing(void)
uint64_t d[3]; uint64_t d[3];
printf( printf(
"data cache line size %i bytes\n", "data cache line size %zi bytes\n",
rtems_cache_get_data_line_size() rtems_cache_get_data_line_size()
); );
@@ -290,7 +290,7 @@ static void test_timing(void)
); );
printf( printf(
"instruction cache line size %i bytes\n", "instruction cache line size %zi bytes\n",
rtems_cache_get_instruction_line_size() rtems_cache_get_instruction_line_size()
); );