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Try to maintain compatability with everyone else's VBR changes.

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This commit is contained in:
Eric Norum
2005-05-24 01:07:45 +00:00
parent 2a94c85420
commit e2f88ab9d6
4 changed files with 6 additions and 10 deletions
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5
c/src/lib/libbsp/m68k/uC5282/ChangeLog
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@@ -1,3 +1,8 @@
2005-05-23 Eric Norum <norume@aps.anl.gov>
* startup/linkcmds
startup/bspstart.c: Followup fix to Joel's/Chris's VBR changes.
2005-05-11 Eric Norum <norume@aps.anl.gov> 2005-05-11 Eric Norum <norume@aps.anl.gov>
* startup/bspstart.c: Followup fix to Joel's changes of 2005-05-03. * startup/bspstart.c: Followup fix to Joel's changes of 2005-05-03.

5
c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c
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@@ -43,11 +43,6 @@ char *rtems_progname;
#define VME_ONE_BASE 0x30000000 #define VME_ONE_BASE 0x30000000
#define VME_TWO_BASE 0x31000000 #define VME_TWO_BASE 0x31000000
/*
* Read/write copy of vector-base register
*/
void *_VBR;
/* /*
* CPU-space access * CPU-space access
* The NOP after writing the CACR is there to address the following issue as * The NOP after writing the CACR is there to address the following issue as

5
c/src/lib/libbsp/m68k/uC5282/startup/init5282.c
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@@ -18,11 +18,6 @@ void Init5282 (void)
{ {
extern void CopyDataClearBSSAndStart (void); extern void CopyDataClearBSSAndStart (void);
/*
* Set the VBR to point to where the assembly code copied it
*/
m68k_set_vbr(0);
/* /*
* Copy data, clear BSS and call boot_card() * Copy data, clear BSS and call boot_card()
*/ */

1
c/src/lib/libbsp/m68k/uC5282/startup/linkcmds
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@@ -36,6 +36,7 @@ _CPUClockSpeed = DEFINED(_CPUClockSpeed) ? _CPUClockSpeed : 64000000 ;
*/ */
__IPSBAR = DEFINED(__IPSBAR) ? __IPSBAR : 0x40000000 ; __IPSBAR = DEFINED(__IPSBAR) ? __IPSBAR : 0x40000000 ;
__SRAMBASE = DEFINED(__SRAMBASE) ? __SRAMBASE : 0x20000000 ; __SRAMBASE = DEFINED(__SRAMBASE) ? __SRAMBASE : 0x20000000 ;
_VBR = 0x0;
ENTRY(start) ENTRY(start)
MEMORY MEMORY