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@@ -1,5 +1,5 @@
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/**
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* @file rtems/score/powerpc.h
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* @file rtems/powerpc/powerpc.h
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*/
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/*
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@@ -49,13 +49,19 @@
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extern "C" {
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#endif
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#include <rtems/score/powerpc.h>
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/*
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* Define the name of the CPU family.
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/* Till S. 2008/07/10:
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*
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* Using the macros/definitions which depend on a preprocessor
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* symbol defining the CPU flavor is discouraged.
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* I recommend to not use definitions from this file and
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* in particular - not to add more bits and pieces.
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*
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* Instead, try to use run-time detection (see e.g. cpuIdent.c/cpuIdent.h)
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* of features etc.
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*/
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#define CPU_NAME "PowerPC"
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#include <rtems/score/powerpc.h>
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/*
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* This file contains the information required to build
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@@ -71,9 +77,6 @@ extern "C" {
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* + PPC_CACHE_ALIGNMENT - 32
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* + PPC_LOW_POWER_MODE - PPC_LOW_POWER_MODE_NONE
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* + PPC_HAS_EXCEPTION_PREFIX - 1
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* + PPC_HAS_FPU - 1
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* + PPC_HAS_DOUBLE - 1 if PPC_HAS_FPU,
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* - 0 otherwise
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* + PPC_USE_MULTIPLE - 0
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*/
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@@ -102,11 +105,6 @@ extern "C" {
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* Does not have user mode.
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*/
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#if defined(ppc403)
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#define CPU_MODEL_NAME "PowerPC 403"
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#elif defined (ppc405)
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#define CPU_MODEL_NAME "PowerPC 405"
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#endif
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#define PPC_CACHE_ALIGNMENT 16
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#define PPC_HAS_RI 0
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#define PPC_HAS_RFCI 1
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@@ -119,8 +117,6 @@ extern "C" {
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#elif defined(mpc555)
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#define CPU_MODEL_NAME "PowerPC 555"
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/* Copied from mpc505 */
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#define PPC_CACHE_ALIGNMENT 16
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@@ -138,8 +134,6 @@ extern "C" {
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* to get the setting correct.
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*/
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#define CPU_MODEL_NAME "PowerPC 505/509"
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#define PPC_CACHE_ALIGNMENT 16
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#define PPC_I_CACHE 4096
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#define PPC_D_CACHE 0
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@@ -151,36 +145,20 @@ extern "C" {
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* Submitted with original port -- book checked only.
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*/
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#define CPU_MODEL_NAME "PowerPC 601"
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#define PPC_USE_MULTIPLE 1
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#define PPC_I_CACHE 0
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#define PPC_D_CACHE 32768
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#elif defined(ppc602)
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/*
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* Submitted with original port -- book checked only.
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*/
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#define CPU_MODEL_NAME "PowerPC 602"
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#define PPC_HAS_DOUBLE 0
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#define PPC_I_CACHE 4096
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#define PPC_D_CACHE 4096
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#elif defined(ppc603)
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/*
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* Submitted with original port -- book checked only.
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*/
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#define CPU_MODEL_NAME "PowerPC 603"
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#define PPC_I_CACHE 8192
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#define PPC_D_CACHE 8192
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#elif defined(ppc603e)
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#define CPU_MODEL_NAME "PowerPC 603e"
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/*
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* Submitted with original port.
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*
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@@ -197,8 +175,6 @@ extern "C" {
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* Submitted with original port -- book checked only.
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*/
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#define CPU_MODEL_NAME "PowerPC 604"
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#define PPC_I_CACHE 16384
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#define PPC_D_CACHE 16384
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@@ -207,8 +183,6 @@ extern "C" {
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* Added by Jay Monkman (jmonkman@frasca.com) 6/28/98
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* with some changes by Darlene Stewart (Darlene.Stewart@iit.nrc.ca)
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*/
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#define CPU_MODEL_NAME "PowerPC MPC860"
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#define PPC_I_CACHE 4096
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#define PPC_D_CACHE 4096
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#define PPC_CACHE_ALIGNMENT 16
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@@ -224,8 +198,6 @@ extern "C" {
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/*
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* Added by Andrew Bray <andy@chaos.org.uk> 6/April/1999
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*/
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#define CPU_MODEL_NAME "PowerPC MPC821"
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#define PPC_I_CACHE 4096
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#define PPC_D_CACHE 4096
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#define PPC_CACHE_ALIGNMENT 16
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@@ -238,15 +210,11 @@ extern "C" {
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#elif defined(mpc750)
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#define CPU_MODEL_NAME "PowerPC 750"
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#define PPC_I_CACHE 16384
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#define PPC_D_CACHE 16384
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#elif defined(mpc7400)
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#define CPU_MODEL_NAME "PowerPC 7400"
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#define PPC_I_CACHE 32768
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#define PPC_D_CACHE 32768
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@@ -255,8 +223,6 @@ extern "C" {
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* Added by S.K. Feng <feng1@bnl.gov> 10/03
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*/
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#define CPU_MODEL_NAME "PowerPC 7455"
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#define PPC_CACHE_ALIGNMENT 32
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#define PPC_I_CACHE 32768
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#define PPC_D_CACHE 32768
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@@ -265,8 +231,6 @@ extern "C" {
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/*
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* Added by Andy Dachs <a.dachs@sstl.co.uk> 23/11/2000
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*/
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#define CPU_MODEL_NAME "PowerPC MPC8260"
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#define PPC_I_CACHE 16384
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#define PPC_D_CACHE 16384
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#define PPC_CACHE_ALIGNMENT 32
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@@ -274,66 +238,14 @@ extern "C" {
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#define PPC_USE_MULTIPLE 1
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#elif defined(__ppc_generic)
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/* PPC_INTERRUPT_MAX and PPC_CACHE_ALIGNMENT already defined by score/powerc.h */
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#ifndef PPC_ABI
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#define PPC_ABI PPC_ABI_SVR4
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#endif
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#define PPC_CACHE_ALIGNMENT 32
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#else
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#error "Unsupported CPU Model"
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#endif
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/*
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* Application binary interfaces.
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*
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* PPC_ABI MUST be defined as one of these.
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* Only big endian is currently supported.
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*/
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/*
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* SVR4 ABI
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*/
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#define PPC_ABI_SVR4 2
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/*
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* Embedded ABI
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*/
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#define PPC_ABI_EABI 3
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/*
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* Default to the EABI used by current GNU tools
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*/
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#ifndef PPC_ABI
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#define PPC_ABI PPC_ABI_EABI
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#endif
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#if (PPC_ABI == PPC_ABI_SVR4)
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#define PPC_STACK_ALIGNMENT 16
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#elif (PPC_ABI == PPC_ABI_EABI)
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#define PPC_STACK_ALIGNMENT 8
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#else
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#error "PPC_ABI is not properly defined"
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#endif
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/*
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* Assemblers.
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* PPC_ASM MUST be defined as one of these.
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*
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* PPC_ASM_ELF: ELF assembler. Currently used for all ABIs.
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*
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* NOTE: Only PPC_ABI_ELF is currently fully supported.
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*/
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#define PPC_ASM_ELF 0
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/*
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* Default to the assembler format used by the current GNU tools.
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*/
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#ifndef PPC_ASM
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#define PPC_ASM PPC_ASM_ELF
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#endif
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/*
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* If the maximum number of exception sources has not been defined,
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* then default it to 16.
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@@ -395,36 +307,6 @@ extern "C" {
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#define PPC_LOW_POWER_MODE PPC_LOW_POWER_MODE_NONE
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#endif
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/*
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* Unless specified above, assume PPC_HAS_FPU to be a synonym for _SOFT_FLOAT.
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* FIXME: Should we tie PPC_HAS_FPU to _SOFT_FLOAT, directly
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* and disallow explicitly setting PPC_HAS_FPU?
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*/
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#ifndef PPC_HAS_FPU
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#ifdef _SOFT_FLOAT
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#define PPC_HAS_FPU 0
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#else
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#define PPC_HAS_FPU 1
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#endif
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#endif
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/*
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* Unless specified above, If the model has FP support, it is assumed to
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* support doubles (8-byte floating point numbers).
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*
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* If the model does NOT have FP support, then the model does
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* NOT have double length FP registers.
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*/
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#ifndef PPC_HAS_DOUBLE
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#if (PPC_HAS_FPU)
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#define PPC_HAS_DOUBLE 1
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#else
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#define PPC_HAS_DOUBLE 0
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#endif
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#endif
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/*
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* Unless specified above, then assume the model does NOT have critical
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* interrupt support.
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@@ -712,13 +594,6 @@ extern "C" {
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#define PPC_MSR_DISABLE_MASK (PPC_MSR_ME|PPC_MSR_EE|PPC_MSR_CE)
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/*
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* Initial value for the FPSCR register
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*/
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#define PPC_INIT_FPSCR 0x000000f8
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#define PPC_MINIMUM_STACK_FRAME_SIZE PPC_STACK_ALIGNMENT
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#ifdef __cplusplus
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