RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

termios: Update due to API changes

Browse Source 
Termios notifies now the driver about an inactive transmit with the
length argument set to zero.
This commit is contained in:
Sebastian Huber
2013-06-24 17:29:11 +02:00
parent 1df348b960
commit e18db9f0cf
28 changed files with 254 additions and 270 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
c/src/lib/libbsp/arm/csb336/console/uart.c
View File

@@ -294,11 +294,13 @@ static ssize_t imx_uart_poll_write(int minor, const char *buf, size_t len)
#if defined(USE_INTERRUPTS) #if defined(USE_INTERRUPTS)
static ssize_t imx_uart_intr_write(int minor, const char *buf, size_t len) static ssize_t imx_uart_intr_write(int minor, const char *buf, size_t len)
{ {
imx_uart_data[minor].buf = buf; if (len > 0) {
imx_uart_data[minor].len = len; imx_uart_data[minor].buf = buf;
imx_uart_data[minor].idx = 0; imx_uart_data[minor].len = len;
imx_uart_data[minor].idx = 0;
imx_uart_data[minor].regs->cr1 |= MC9328MXL_UART_CR1_TXMPTYEN; imx_uart_data[minor].regs->cr1 |= MC9328MXL_UART_CR1_TXMPTYEN;
}
return 1; return 1;
} }

4
c/src/lib/libbsp/arm/shared/comm/uart.c
View File

@@ -371,8 +371,6 @@ BSP_uart_termios_set(int uart, void *ttyp)
int int
BSP_uart_termios_write_com1(int minor, const char *buf, int len) BSP_uart_termios_write_com1(int minor, const char *buf, int len)
{ {
assert(buf != NULL);
if(len <= 0) if(len <= 0)
{ {
return 0; return 0;
@@ -410,8 +408,6 @@ BSP_uart_termios_write_com1(int minor, const char *buf, int len)
int int
BSP_uart_termios_write_com2(int minor, const char *buf, int len) BSP_uart_termios_write_com2(int minor, const char *buf, int len)
{ {
assert(buf != NULL);
if(len <= 0) if(len <= 0)
{ {
return 0; return 0;

7
c/src/lib/libbsp/lm32/shared/milkymist_console/console.c
View File

@@ -114,11 +114,10 @@ static int mmconsole_set_attributes(int minor, const struct termios *t)
static ssize_t mmconsole_write(int minor, const char *buf, size_t n) static ssize_t mmconsole_write(int minor, const char *buf, size_t n)
{ {
rtems_interrupt_level level; if (n > 0) {
MM_WRITE(MM_UART_RXTX, *buf);
}
rtems_interrupt_disable(level);
MM_WRITE(MM_UART_RXTX, *buf);
rtems_interrupt_enable(level);
return 0; return 0;
} }

17
c/src/lib/libbsp/m68k/av5282/console/console.c
View File

@@ -382,18 +382,15 @@ static ssize_t IntUartInterruptWrite(
size_t len size_t len
) )
{ {
rtems_interrupt_level level; if (len > 0) {
/* write out character */
MCF5282_UART_UTB(minor) = *buf;
rtems_interrupt_disable(level); /* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF5282_UART_UIMR_TXRDY;
MCF5282_UART_UIMR(minor) = IntUartInfo[minor].uimr;
}
/* write out character */
MCF5282_UART_UTB(minor) = *buf;
/* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF5282_UART_UIMR_TXRDY;
MCF5282_UART_UIMR(minor) = IntUartInfo[minor].uimr;
rtems_interrupt_enable(level);
return 0; return 0;
} }

12
c/src/lib/libbsp/m68k/gen68340/console/console.c
View File

@@ -172,12 +172,16 @@ static ssize_t
InterruptWrite (int minor, const char *buf, size_t len) InterruptWrite (int minor, const char *buf, size_t len)
{ {
if (minor==UART_CHANNEL_A) { if (minor==UART_CHANNEL_A) {
if (len>0) DUTBA=*buf; if (len>0) {
Enable_Interrupts_Tx_A; DUTBA=*buf;
Enable_Interrupts_Tx_A;
}
} }
else if (minor==UART_CHANNEL_B) { else if (minor==UART_CHANNEL_B) {
if (len>0) DUTBB=*buf; if (len>0) {
Enable_Interrupts_Tx_B; DUTBB=*buf;
Enable_Interrupts_Tx_B;
}
} }
return 0; return 0;
} }

9
c/src/lib/libbsp/m68k/gen68360/console/console.c
View File

@@ -231,9 +231,12 @@ smc1PollRead (int minor)
static ssize_t static ssize_t
smc1InterruptWrite (int minor, const char *buf, size_t len) smc1InterruptWrite (int minor, const char *buf, size_t len)
{ {
smcTxBd->buffer = (char *)buf; if (len > 0) {
smcTxBd->length = len; smcTxBd->buffer = (char *)buf;
smcTxBd->status = M360_BD_READY | M360_BD_WRAP | M360_BD_INTERRUPT; smcTxBd->length = len;
smcTxBd->status = M360_BD_READY | M360_BD_WRAP | M360_BD_INTERRUPT;
}
return 0; return 0;
} }

17
c/src/lib/libbsp/m68k/genmcf548x/console/console.c
View File

@@ -528,18 +528,15 @@ IntUartInitialize(void)
static ssize_t static ssize_t
IntUartInterruptWrite (int minor, const char *buf, size_t len) IntUartInterruptWrite (int minor, const char *buf, size_t len)
{ {
int level; if (len > 0) {
/* write out character */
*(volatile uint8_t *)(&MCF548X_PSC_TB(minor)) = *buf;
rtems_interrupt_disable(level); /* enable tx interrupt */
IntUartInfo[minor].imr |= MCF548X_PSC_IMR_TXRDY;
MCF548X_PSC_IMR(minor) = IntUartInfo[minor].imr;
}
/* write out character */
*(volatile uint8_t *)(&MCF548X_PSC_TB(minor)) = *buf;
/* enable tx interrupt */
IntUartInfo[minor].imr |= MCF548X_PSC_IMR_TXRDY;
MCF548X_PSC_IMR(minor) = IntUartInfo[minor].imr;
rtems_interrupt_enable(level);
return 0; return 0;
} }

17
c/src/lib/libbsp/m68k/mcf52235/console/console.c
View File

@@ -341,18 +341,15 @@ static void IntUartInitialize(void)
***************************************************************************/ ***************************************************************************/
static ssize_t IntUartInterruptWrite(int minor, const char *buf, size_t len) static ssize_t IntUartInterruptWrite(int minor, const char *buf, size_t len)
{ {
int level; if (len > 0) {
/* write out character */
MCF_UART_UTB(minor) = *buf;
rtems_interrupt_disable(level); /* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF_UART_UIMR_TXRDY;
MCF_UART_UIMR(minor) = IntUartInfo[minor].uimr;
}
/* write out character */
MCF_UART_UTB(minor) = *buf;
/* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF_UART_UIMR_TXRDY;
MCF_UART_UIMR(minor) = IntUartInfo[minor].uimr;
rtems_interrupt_enable(level);
return (0); return (0);
} }

17
c/src/lib/libbsp/m68k/mcf5225x/console/console.c
View File

@@ -366,18 +366,15 @@ static void IntUartInitialize(void)
***************************************************************************/ ***************************************************************************/
static ssize_t IntUartInterruptWrite(int minor, const char *buf, size_t len) static ssize_t IntUartInterruptWrite(int minor, const char *buf, size_t len)
{ {
rtems_interrupt_level level=UART0_IRQ_LEVEL; if (len > 0) {
/* write out character */
MCF_UART_UTB(minor) = *buf;
rtems_interrupt_disable(level); /* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF_UART_UIMR_TXRDY;
MCF_UART_UIMR(minor) = IntUartInfo[minor].uimr;
}
/* write out character */
MCF_UART_UTB(minor) = *buf;
/* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF_UART_UIMR_TXRDY;
MCF_UART_UIMR(minor) = IntUartInfo[minor].uimr;
rtems_interrupt_enable(level);
return (0); return (0);
} }

17
c/src/lib/libbsp/m68k/mcf5235/console/console.c
View File

@@ -394,18 +394,15 @@ IntUartInitialize(void)
static ssize_t static ssize_t
IntUartInterruptWrite (int minor, const char *buf, size_t len) IntUartInterruptWrite (int minor, const char *buf, size_t len)
{ {
int level; if (len > 0) {
/* write out character */
MCF5235_UART_UTB(minor) = *buf;
rtems_interrupt_disable(level); /* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF5235_UART_UIMR_TXRDY;
MCF5235_UART_UIMR(minor) = IntUartInfo[minor].uimr;
}
/* write out character */
MCF5235_UART_UTB(minor) = *buf;
/* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF5235_UART_UIMR_TXRDY;
MCF5235_UART_UIMR(minor) = IntUartInfo[minor].uimr;
rtems_interrupt_enable(level);
return( 0 ); return( 0 );
} }

17
c/src/lib/libbsp/m68k/mcf5329/console/console.c
View File

@@ -356,18 +356,15 @@ static void IntUartInitialize(void)
***************************************************************************/ ***************************************************************************/
static ssize_t IntUartInterruptWrite(int minor, const char *buf, size_t len) static ssize_t IntUartInterruptWrite(int minor, const char *buf, size_t len)
{ {
int level; if (len > 0) {
/* write out character */
MCF_UART_UTB(minor) = *buf;
rtems_interrupt_disable(level); /* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF_UART_UIMR_TXRDY;
MCF_UART_UIMR(minor) = IntUartInfo[minor].uimr;
}
/* write out character */
MCF_UART_UTB(minor) = *buf;
/* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF_UART_UIMR_TXRDY;
MCF_UART_UIMR(minor) = IntUartInfo[minor].uimr;
rtems_interrupt_enable(level);
return (0); return (0);
} }

58
c/src/lib/libbsp/m68k/mvme167/console/console.c
View File

@@ -1141,37 +1141,39 @@ ssize_t cd2401_write(
size_t len size_t len
) )
{ {
cd2401->car = minor; /* Select channel */ if (len > 0) {
cd2401->car = minor; /* Select channel */
if ( (cd2401->dmabsts & 0x08) == 0 ) { if ( (cd2401->dmabsts & 0x08) == 0 ) {
/* Next buffer is A. Wait for it to be ours. */ /* Next buffer is A. Wait for it to be ours. */
while ( cd2401->atbsts & 0x01 ); while ( cd2401->atbsts & 0x01 );
CD2401_Channel_Info[minor].own_buf_A = FALSE; CD2401_Channel_Info[minor].own_buf_A = FALSE;
CD2401_Channel_Info[minor].len = len; CD2401_Channel_Info[minor].len = len;
CD2401_Channel_Info[minor].buf = buf; CD2401_Channel_Info[minor].buf = buf;
cd2401->atbadru = (uint16_t)( ( (uint32_t) buf ) >> 16 ); cd2401->atbadru = (uint16_t)( ( (uint32_t) buf ) >> 16 );
cd2401->atbadrl = (uint16_t)( (uint32_t) buf ); cd2401->atbadrl = (uint16_t)( (uint32_t) buf );
cd2401->atbcnt = len; cd2401->atbcnt = len;
CD2401_RECORD_WRITE_INFO(( len, buf, 'A' )); CD2401_RECORD_WRITE_INFO(( len, buf, 'A' ));
cd2401->atbsts = 0x03; /* CD2401 owns buffer, int when empty */ cd2401->atbsts = 0x03; /* CD2401 owns buffer, int when empty */
}
else {
/* Next buffer is B. Wait for it to be ours. */
while ( cd2401->btbsts & 0x01 );
CD2401_Channel_Info[minor].own_buf_B = FALSE;
CD2401_Channel_Info[minor].len = len;
CD2401_Channel_Info[minor].buf = buf;
cd2401->btbadru = (uint16_t)( ( (uint32_t) buf ) >> 16 );
cd2401->btbadrl = (uint16_t)( (uint32_t) buf );
cd2401->btbcnt = len;
CD2401_RECORD_WRITE_INFO(( len, buf, 'B' ));
cd2401->btbsts = 0x03; /* CD2401 owns buffer, int when empty */
}
/* Nuts -- Need TxD ints */
CD2401_Channel_Info[minor].txEmpty = FALSE;
cd2401->ier |= 0x01;
} }
else {
/* Next buffer is B. Wait for it to be ours. */
while ( cd2401->btbsts & 0x01 );
CD2401_Channel_Info[minor].own_buf_B = FALSE;
CD2401_Channel_Info[minor].len = len;
CD2401_Channel_Info[minor].buf = buf;
cd2401->btbadru = (uint16_t)( ( (uint32_t) buf ) >> 16 );
cd2401->btbadrl = (uint16_t)( (uint32_t) buf );
cd2401->btbcnt = len;
CD2401_RECORD_WRITE_INFO(( len, buf, 'B' ));
cd2401->btbsts = 0x03; /* CD2401 owns buffer, int when empty */
}
/* Nuts -- Need TxD ints */
CD2401_Channel_Info[minor].txEmpty = FALSE;
cd2401->ier |= 0x01;
/* Return something */ /* Return something */
return len; return len;

17
c/src/lib/libbsp/m68k/uC5282/console/console.c
View File

@@ -409,18 +409,15 @@ IntUartInitialize(void)
static ssize_t static ssize_t
IntUartInterruptWrite (int minor, const char *buf, size_t len) IntUartInterruptWrite (int minor, const char *buf, size_t len)
{ {
int level; if (len > 0) {
/* write out character */
MCF5282_UART_UTB(minor) = *buf;
rtems_interrupt_disable(level); /* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF5282_UART_UIMR_TXRDY;
MCF5282_UART_UIMR(minor) = IntUartInfo[minor].uimr;
}
/* write out character */
MCF5282_UART_UTB(minor) = *buf;
/* enable tx interrupt */
IntUartInfo[minor].uimr |= MCF5282_UART_UIMR_TXRDY;
MCF5282_UART_UIMR(minor) = IntUartInfo[minor].uimr;
rtems_interrupt_enable(level);
return 0; return 0;
} }

40
c/src/lib/libbsp/powerpc/gen5200/console/console.c
View File

@@ -581,33 +581,35 @@ ssize_t mpc5200_uart_write(
size_t len size_t len
) )
{ {
int frame_len = len; if (len > 0) {
const char *frame_buf = buf; int frame_len = len;
struct mpc5200_psc *psc = const char *frame_buf = buf;
(struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]); struct mpc5200_psc *psc =
(struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
/* /*
* Check tx fifo space * Check tx fifo space
*/ */
if(len > (TX_FIFO_SIZE - psc->tfnum)) if(len > (TX_FIFO_SIZE - psc->tfnum))
frame_len = TX_FIFO_SIZE - psc->tfnum; frame_len = TX_FIFO_SIZE - psc->tfnum;
#ifndef SINGLE_CHAR_MODE #ifndef SINGLE_CHAR_MODE
channel_info[minor].cur_tx_len = frame_len; channel_info[minor].cur_tx_len = frame_len;
#else #else
frame_len = 1; frame_len = 1;
#endif #endif
/*rtems_cache_flush_multiple_data_lines( (void *)frame_buf, frame_len);*/ /*rtems_cache_flush_multiple_data_lines( (void *)frame_buf, frame_len);*/
while (frame_len--) while (frame_len--)
/* perform byte write to avoid extra NUL characters */ /* perform byte write to avoid extra NUL characters */
(* (volatile char *)&(psc->rb_tb)) = *frame_buf++; (* (volatile char *)&(psc->rb_tb)) = *frame_buf++;
/* /*
* unmask interrupt * unmask interrupt
*/ */
psc->isr_imr = channel_info[minor].shadow_imr |= IMR_TX_RDY; psc->isr_imr = channel_info[minor].shadow_imr |= IMR_TX_RDY;
}
return 0; return 0;
} }

42
c/src/lib/libbsp/powerpc/qoriq/console/uart-bridge-slave.c
View File

@@ -153,28 +153,30 @@ static int last_close(int major, int minor, void *arg)
static ssize_t write_with_interrupts(int minor, const char *buf, size_t len) static ssize_t write_with_interrupts(int minor, const char *buf, size_t len)
{ {
rtems_status_code sc = RTEMS_SUCCESSFUL; if (len > 0) {
console_tbl *ct = Console_Port_Tbl[minor]; rtems_status_code sc = RTEMS_SUCCESSFUL;
uart_bridge_slave_control *control = ct->pDeviceParams; console_tbl *ct = Console_Port_Tbl[minor];
intercom_packet *packet = qoriq_intercom_allocate_packet( uart_bridge_slave_control *control = ct->pDeviceParams;
control->type, intercom_packet *packet = qoriq_intercom_allocate_packet(
INTERCOM_SIZE_64 control->type,
); INTERCOM_SIZE_64
);
packet->size = len; packet->size = len;
memcpy(packet->data, buf, len); memcpy(packet->data, buf, len);
/* /*
* Due to the lovely Termios implementation we have to hand this over to * Due to the lovely Termios implementation we have to hand this over to
* another context. * another context.
*/ */
sc = rtems_chain_append_with_notification( sc = rtems_chain_append_with_notification(
&control->transmit_fifo, &control->transmit_fifo,
&packet->glue.node, &packet->glue.node,
control->transmit_task, control->transmit_task,
TRANSMIT_EVENT TRANSMIT_EVENT
); );
assert(sc == RTEMS_SUCCESSFUL); assert(sc == RTEMS_SUCCESSFUL);
}
return 0; return 0;
} }

3
c/src/lib/libbsp/powerpc/shared/console/uart.c
View File

@@ -559,8 +559,6 @@ BSP_uart_termios_write_polled(int minor, const char *buf, size_t len)
int nwrite; int nwrite;
const char *b = buf; const char *b = buf;
assert(buf != NULL);
for (nwrite=0 ; nwrite < len ; nwrite++) { for (nwrite=0 ; nwrite < len ; nwrite++) {
BSP_uart_polled_write(uart, *b++); BSP_uart_polled_write(uart, *b++);
} }
@@ -571,7 +569,6 @@ ssize_t
BSP_uart_termios_write_com(int minor, const char *buf, size_t len) BSP_uart_termios_write_com(int minor, const char *buf, size_t len)
{ {
int uart=minor; /* could differ, theoretically */ int uart=minor; /* could differ, theoretically */
assert(buf != NULL);
if(len <= 0) if(len <= 0)
{ {

37
c/src/lib/libbsp/powerpc/tqm8xx/console/console.c
View File

@@ -778,26 +778,29 @@ sccPollRead (int minor)
static ssize_t static ssize_t
sccInterruptWrite (int minor, const char *buf, size_t len) sccInterruptWrite (int minor, const char *buf, size_t len)
{ {
int chan = minor; if (len > 0) {
int chan = minor;
if ((sccPrepTxBd[chan]->status & M8xx_BD_READY) == 0) { if ((sccPrepTxBd[chan]->status & M8xx_BD_READY) == 0) {
sccPrepTxBd[chan]->buffer = (char *)buf; sccPrepTxBd[chan]->buffer = (char *)buf;
sccPrepTxBd[chan]->length = len; sccPrepTxBd[chan]->length = len;
rtems_cache_flush_multiple_data_lines((const void *)buf,len); rtems_cache_flush_multiple_data_lines((const void *)buf,len);
/* /*
* clear status, set ready bit * clear status, set ready bit
*/ */
sccPrepTxBd[chan]->status = sccPrepTxBd[chan]->status =
(sccPrepTxBd[chan]->status (sccPrepTxBd[chan]->status
& M8xx_BD_WRAP) & M8xx_BD_WRAP)
| M8xx_BD_READY | M8xx_BD_INTERRUPT; | M8xx_BD_READY | M8xx_BD_INTERRUPT;
if ((sccPrepTxBd[chan]->status & M8xx_BD_WRAP) != 0) { if ((sccPrepTxBd[chan]->status & M8xx_BD_WRAP) != 0) {
sccPrepTxBd[chan] = sccFrstTxBd[chan]; sccPrepTxBd[chan] = sccFrstTxBd[chan];
} }
else { else {
sccPrepTxBd[chan]++; sccPrepTxBd[chan]++;
}
} }
} }
return 0; return 0;
} }

36
c/src/lib/libbsp/sparc/erc32/console/erc32_console.c
View File

@@ -149,28 +149,28 @@ static int erc32_console_first_open(int major, int minor, void *arg)
#if (CONSOLE_USE_INTERRUPTS) #if (CONSOLE_USE_INTERRUPTS)
static ssize_t erc32_console_write_support_int(int minor, const char *buf, size_t len) static ssize_t erc32_console_write_support_int(int minor, const char *buf, size_t len)
{ {
console_data *cd = &Console_Port_Data[minor];
int k = 0;
if (minor == 0) { /* uart a */
for (k = 0;
k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA); k ++) {
ERC32_MEC.UART_Channel_A = (unsigned char)buf[k];
}
ERC32_Force_interrupt(ERC32_INTERRUPT_UART_A_RX_TX);
} else { /* uart b */
for (k = 0;
k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB); k ++) {
ERC32_MEC.UART_Channel_B = (unsigned char)buf[k];
}
ERC32_Force_interrupt(ERC32_INTERRUPT_UART_B_RX_TX);
}
if (len > 0) { if (len > 0) {
console_data *cd = &Console_Port_Data[minor];
int k = 0;
if (minor == 0) { /* uart a */
for (k = 0;
k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA); k ++) {
ERC32_MEC.UART_Channel_A = (unsigned char)buf[k];
}
ERC32_Force_interrupt(ERC32_INTERRUPT_UART_A_RX_TX);
} else { /* uart b */
for (k = 0;
k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB); k ++) {
ERC32_MEC.UART_Channel_B = (unsigned char)buf[k];
}
ERC32_Force_interrupt(ERC32_INTERRUPT_UART_B_RX_TX);
}
cd->pDeviceContext = (void *)k; cd->pDeviceContext = (void *)k;
cd->bActive = true; cd->bActive = true;
} }
return 0; return 0;
} }

29
c/src/lib/libbsp/sparc/leon3/console/console.c
View File

@@ -117,27 +117,24 @@ void console_isr(void *arg)
*/ */
int console_write_interrupt(int minor, const char *buf, int len) int console_write_interrupt(int minor, const char *buf, int len)
{ {
struct apbuart_priv *uart; if (len > 0) {
unsigned int oldLevel; struct apbuart_priv *uart;
if (minor == 0) if (minor == 0)
uart = &apbuarts[syscon_uart_index]; uart = &apbuarts[syscon_uart_index];
else else
uart = &apbuarts[minor - 1]; uart = &apbuarts[minor - 1];
/* Remember what position in buffer */ /* Remember what position in buffer */
rtems_interrupt_disable(oldLevel); /* Enable TX interrupt */
uart->regs->ctrl |= LEON_REG_UART_CTRL_TI;
/* Enable TX interrupt */ /* start UART TX, this will result in an interrupt when done */
uart->regs->ctrl |= LEON_REG_UART_CTRL_TI; uart->regs->data = *buf;
/* start UART TX, this will result in an interrupt when done */ uart->sending = 1;
uart->regs->data = *buf; }
uart->sending = 1;
rtems_interrupt_enable(oldLevel);
return 0; return 0;
} }

17
c/src/lib/libcpu/bfin/serial/uart.c
View File

@@ -323,12 +323,14 @@ static int setAttributes(int minor, const struct termios *termios) {
static ssize_t uart_interruptWrite(int minor, const char *buf, size_t len) { static ssize_t uart_interruptWrite(int minor, const char *buf, size_t len) {
uint32_t base = 0; uint32_t base = 0;
bfin_uart_channel_t* channel = NULL; bfin_uart_channel_t* channel = NULL;
rtems_interrupt_level isrLevel;
/** /**
* Sanity Check * Sanity Check
*/ */
if (NULL == buf || NULL == channel || NULL == uartsConfig || minor < 0) { if (
NULL == buf || NULL == channel || NULL == uartsConfig
|| minor < 0 || 0 == len
) {
return 0; return 0;
} }
@@ -338,8 +340,6 @@ static ssize_t uart_interruptWrite(int minor, const char *buf, size_t len) {
return 0; return 0;
} }
rtems_interrupt_disable(isrLevel);
base = channel->uart_baseAddress; base = channel->uart_baseAddress;
channel->flags |= BFIN_UART_XMIT_BUSY; channel->flags |= BFIN_UART_XMIT_BUSY;
@@ -347,8 +347,6 @@ static ssize_t uart_interruptWrite(int minor, const char *buf, size_t len) {
*(uint16_t volatile *) (base + UART_THR_OFFSET) = *buf; *(uint16_t volatile *) (base + UART_THR_OFFSET) = *buf;
*(uint16_t volatile *) (base + UART_IER_OFFSET) = UART_IER_ETBEI; *(uint16_t volatile *) (base + UART_IER_OFFSET) = UART_IER_ETBEI;
rtems_interrupt_enable(isrLevel);
return 0; return 0;
} }
@@ -412,12 +410,11 @@ static ssize_t uart_DmaWrite(int minor, const char *buf, size_t len) {
uint32_t base = 0; uint32_t base = 0;
bfin_uart_channel_t* channel = NULL; bfin_uart_channel_t* channel = NULL;
uint32_t tx_dma_base = 0; uint32_t tx_dma_base = 0;
rtems_interrupt_level isrLevel;
/** /**
* Sanity Check * Sanity Check
*/ */
if ( NULL == buf || 0 > minor || NULL == uartsConfig ) { if ( NULL == buf || 0 > minor || NULL == uartsConfig || 0 == len ) {
return 0; return 0;
} }
@@ -430,8 +427,6 @@ static ssize_t uart_DmaWrite(int minor, const char *buf, size_t len) {
return 0; return 0;
} }
rtems_interrupt_disable(isrLevel);
base = channel->uart_baseAddress; base = channel->uart_baseAddress;
tx_dma_base = channel->uart_txDmaBaseAddress; tx_dma_base = channel->uart_txDmaBaseAddress;
@@ -445,8 +440,6 @@ static ssize_t uart_DmaWrite(int minor, const char *buf, size_t len) {
*(uint16_t volatile *) (tx_dma_base + DMA_CONFIG_OFFSET) |= DMA_CONFIG_DMAEN; *(uint16_t volatile *) (tx_dma_base + DMA_CONFIG_OFFSET) |= DMA_CONFIG_DMAEN;
*(uint16_t volatile *) (base + UART_IER_OFFSET) = UART_IER_ETBEI; *(uint16_t volatile *) (base + UART_IER_OFFSET) = UART_IER_ETBEI;
rtems_interrupt_enable(isrLevel);
return 0; return 0;
} }

23
c/src/lib/libcpu/m68k/mcf5206/console/mcfuart.c
View File

@@ -519,19 +519,20 @@ mcfuart_interrupt_handler(rtems_vector_number vec)
ssize_t ssize_t
mcfuart_interrupt_write(mcfuart *uart, const char *buf, size_t len) mcfuart_interrupt_write(mcfuart *uart, const char *buf, size_t len)
{ {
int level; if (len > 0)
rtems_interrupt_disable(level);
uart->tx_buf = buf;
uart->tx_buf_len = len;
uart->tx_ptr = 0;
*MCF5206E_UIMR(MBAR, uart->chn) =
MCF5206E_UIMR_FFULL | MCF5206E_UIMR_TXRDY;
while (((*MCF5206E_USR(MBAR,uart->chn) & MCF5206E_USR_TXRDY) != 0) &&
(uart->tx_ptr < uart->tx_buf_len))
{ {
*MCF5206E_UTB(MBAR,uart->chn) = uart->tx_buf[uart->tx_ptr++]; uart->tx_buf = buf;
uart->tx_buf_len = len;
uart->tx_ptr = 0;
*MCF5206E_UIMR(MBAR, uart->chn) =
MCF5206E_UIMR_FFULL | MCF5206E_UIMR_TXRDY;
while (((*MCF5206E_USR(MBAR,uart->chn) & MCF5206E_USR_TXRDY) != 0) &&
(uart->tx_ptr < uart->tx_buf_len))
{
*MCF5206E_UTB(MBAR,uart->chn) = uart->tx_buf[uart->tx_ptr++];
}
} }
rtems_interrupt_enable(level);
return 0; return 0;
} }

4
c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.c
View File

@@ -686,7 +686,6 @@ MG5UART_STATIC int mg5uart_write_support_int(
size_t len size_t len
) )
{ {
uint32_t Irql;
uint32_t pMG5UART_port; uint32_t pMG5UART_port;
pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
@@ -703,8 +702,6 @@ MG5UART_STATIC int mg5uart_write_support_int(
* Put the character out and enable interrupts if necessary. * Put the character out and enable interrupts if necessary.
*/ */
rtems_interrupt_disable(Irql);
MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, *buf); MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, *buf);
if( Console_Port_Data[minor].bActive == FALSE ) if( Console_Port_Data[minor].bActive == FALSE )
@@ -713,7 +710,6 @@ MG5UART_STATIC int mg5uart_write_support_int(
mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL); mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL);
} }
rtems_interrupt_enable(Irql);
return 1; return 1;
} }

11
c/src/lib/libcpu/powerpc/mpc55xx/esci/esci.c
View File

@@ -292,13 +292,12 @@ static int mpc55xx_esci_termios_poll_write( int minor, const char *out,
*/ */
static int mpc55xx_esci_termios_write( int minor, const char *out, size_t n) static int mpc55xx_esci_termios_write( int minor, const char *out, size_t n)
{ {
mpc55xx_esci_driver_entry *e = &mpc55xx_esci_driver_table [minor]; if (n > 0) {
rtems_interrupt_level level; mpc55xx_esci_driver_entry *e = &mpc55xx_esci_driver_table [minor];
rtems_interrupt_disable(level); e->regs->DR.B.D = out [0];
e->regs->DR.B.D = out [0]; e->transmit_in_progress = true;
e->transmit_in_progress = true; }
rtems_interrupt_enable(level);
return 0; return 0;
} }

9
c/src/lib/libcpu/powerpc/mpc5xx/console-generic/console-generic.c
View File

@@ -144,10 +144,13 @@ ssize_t m5xx_uart_write(
size_t len size_t len
) )
{ {
volatile m5xxSCIRegisters_t *regs = sci_descs[minor].regs; if (len > 0) {
volatile m5xxSCIRegisters_t *regs = sci_descs[minor].regs;
regs->scdr = *buf; /* start transmission */
regs->sccr1 |= QSMCM_SCI_TIE; /* enable interrupt */
}
regs->scdr = *buf; /* start transmission */
regs->sccr1 |= QSMCM_SCI_TIE; /* enable interrupt */
return 0; return 0;
} }

13
c/src/lib/libcpu/powerpc/mpc8260/console-generic/console-generic.c
View File

@@ -1090,12 +1090,15 @@ m8xx_uart_write(
size_t len size_t len
) )
{ {
while( (TxBd[minor]->status) & M8260_BD_READY ); if (len > 0) {
while( (TxBd[minor]->status) & M8260_BD_READY );
rtems_cache_flush_multiple_data_lines( buf, len );
TxBd[minor]->buffer = (char *) buf;
TxBd[minor]->length = len;
TxBd[minor]->status = M8260_BD_READY | M8260_BD_WRAP | M8260_BD_INTERRUPT;
}
rtems_cache_flush_multiple_data_lines( buf, len );
TxBd[minor]->buffer = (char *) buf;
TxBd[minor]->length = len;
TxBd[minor]->status = M8260_BD_READY | M8260_BD_WRAP | M8260_BD_INTERRUPT;
return 0; return 0;
} }

7
c/src/lib/libcpu/powerpc/ppc403/console/console.c
View File

@@ -271,8 +271,11 @@ spiPollRead (int minor)
static int static int
spiInterruptWrite (int minor, const char *buf, int len) spiInterruptWrite (int minor, const char *buf, int len)
{ {
port->SPTB = *buf; /* write char to send */ if (len > 0) {
port->SPTC |= TCRIntEnabled; /* always enable tx interrupt */ port->SPTB = *buf; /* write char to send */
port->SPTC |= TCRIntEnabled; /* always enable tx interrupt */
}
return 0; return 0;
} }

7
c/src/lib/libcpu/powerpc/ppc403/console/console405.c
View File

@@ -296,8 +296,11 @@ spiStopRemoteTx (int minor)
static ssize_t InterruptWrite (int minor, const char *buf, size_t len) static ssize_t InterruptWrite (int minor, const char *buf, size_t len)
{ {
port->IER |= IER_XMT; /* always enable tx interrupt */ if (len > 0) {
port->THR = *buf; /* write char to send */ port->IER |= IER_XMT; /* always enable tx interrupt */
port->THR = *buf; /* write char to send */
}
return 0; return 0;
} }

27
c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
View File

@@ -761,24 +761,21 @@ sh4uart2_interrupt_transmit(rtems_vector_number vec)
rtems_status_code rtems_status_code
sh4uart_interrupt_write(sh4uart *uart, const char *buf, int len) sh4uart_interrupt_write(sh4uart *uart, const char *buf, int len)
{ {
volatile uint8_t *scr1 = (volatile uint8_t *)SH7750_SCSCR1; if (len > 0) {
volatile uint16_t *scr2 = (volatile uint16_t *)SH7750_SCSCR2; volatile uint8_t *scr1 = (volatile uint8_t *)SH7750_SCSCR1;
int level; volatile uint16_t *scr2 = (volatile uint16_t *)SH7750_SCSCR2;
while ((SCSSR1 & SH7750_SCSSR1_TEND) == 0); while ((SCSSR1 & SH7750_SCSSR1_TEND) == 0);
rtems_interrupt_disable(level); uart->tx_buf = buf;
uart->tx_buf_len = len;
uart->tx_ptr = 0;
uart->tx_buf = buf; if (uart->chn == SH4_SCI)
uart->tx_buf_len = len; *scr1 |= SH7750_SCSCR_TIE;
uart->tx_ptr = 0; else
*scr2 |= SH7750_SCSCR_TIE;
if (uart->chn == SH4_SCI) }
*scr1 |= SH7750_SCSCR_TIE;
else
*scr2 |= SH7750_SCSCR_TIE;
rtems_interrupt_enable(level);
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }