forked from Imagelibrary/rtems
2010-12-03 Sebastian Huber <sebastian.huber@embedded-brains.de>
* start/start.S, startup/linkcmds: Use linker command base file.
This commit is contained in:
@@ -1,3 +1,7 @@
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2010-12-03 Sebastian Huber <sebastian.huber@embedded-brains.de>
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* start/start.S, startup/linkcmds: Use linker command base file.
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2010-04-30 Sebastian Huber <sebastian.huber@embedded-brains.de>
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* Makefile.am, preinstall.am: Added generic interrupt support modules.
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@@ -11,6 +11,8 @@
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* $Id$
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*/
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#include <bsp/linker-symbols.h>
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/* Some standard definitions...*/
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.equ PSR_MODE_USR, 0x10
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.equ PSR_MODE_FIQ, 0x11
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@@ -32,12 +34,12 @@ _start:
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@---------------------------------------------------------------------------------
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@ AXF addresses
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@---------------------------------------------------------------------------------
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.word _axf_text_start
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.word _axf_ro_end
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.word _axf_data_start
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.word _axf_bss_end
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.word _axf_bss_start
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.word _axf_bss_end
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.word bsp_section_text_begin
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.word bsp_section_rodata_end
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.word bsp_section_data_begin
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.word bsp_section_bss_end
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.word bsp_section_bss_begin
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.word bsp_section_bss_end
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@---------------------------------------------------------------------------------
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@ GamePark magic sequence
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@@ -77,29 +79,29 @@ _start2:
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/* Enter IRQ mode and set up the IRQ stack pointer */
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mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */
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msr cpsr, r0
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ldr r1, =_irq_stack_size
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ldr sp, =_irq_stack
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ldr r1, =bsp_stack_irq_size
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ldr sp, =bsp_stack_irq_begin
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add sp, sp, r1
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/* Enter FIQ mode and set up the FIQ stack pointer */
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mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) /* No interrupts */
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msr cpsr, r0
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ldr r1, =_fiq_stack_size
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ldr sp, =_fiq_stack
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ldr r1, =bsp_stack_fiq_size
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ldr sp, =bsp_stack_fiq_begin
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add sp, sp, r1
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/* Enter ABT mode and set up the ABT stack pointer */
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mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) /* No interrupts */
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msr cpsr, r0
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ldr r1, =_abt_stack_size
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ldr sp, =_abt_stack
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ldr r1, =bsp_stack_abt_size
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ldr sp, =bsp_stack_abt_begin
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add sp, sp, r1
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/* Set up the SVC stack pointer last and stay in SVC mode */
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mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */
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msr cpsr, r0
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ldr r1, =_svc_stack_size
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ldr sp, =_svc_stack
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ldr r1, =bsp_stack_svc_size
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ldr sp, =bsp_stack_svc_begin
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add sp, sp, r1
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sub sp, sp, #0x64
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@@ -1,279 +1,25 @@
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/*
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* GP32 Linker script
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*
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* Written by Philippe Simons <loki_666@fastmail.fm>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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*
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm","elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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/* SEARCH_DIR(/usr/local/rtems-arm-dev-tools/arm-rtems/lib); */
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MEMORY {
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sdram : ORIGIN = 0xc000000, LENGTH = 7M
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SDRAM_MMU : ORIGIN = 0x0c000000, LENGTH = 16k
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SDRAM : ORIGIN = 0x0c004000, LENGTH = 7M - 16k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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/*
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* Declare some sizes.
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*/
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REGION_ALIAS ("REGION_START", SDRAM);
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REGION_ALIAS ("REGION_VECTOR", SDRAM);
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REGION_ALIAS ("REGION_TEXT", SDRAM);
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REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
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REGION_ALIAS ("REGION_RODATA", SDRAM);
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REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
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REGION_ALIAS ("REGION_DATA", SDRAM);
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REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
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REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
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REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
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REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
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REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
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REGION_ALIAS ("REGION_BSS", SDRAM);
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REGION_ALIAS ("REGION_WORK", SDRAM);
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REGION_ALIAS ("REGION_STACK", SDRAM);
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/* The base for SDRAM is set to umon's APPRAMBASE */
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_sdram_base = DEFINED(_sdram_base) ? _sdram_base : 0xc000000;
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_sdram_size = DEFINED(_sdram_size) ? _sdram_size : 7M;
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RamBase = _sdram_base;
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RamSize = _sdram_size;
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HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
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_irq_stack_size = DEFINED(_irq_stack_size) ? _irq_stack_size : 0x1000;
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_fiq_stack_size = DEFINED(_fiq_stack_size) ? _fiq_stack_size : 0x400;
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_abt_stack_size = DEFINED(_abt_stack_size) ? _abt_stack_size : 0x100;
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_svc_stack_size = DEFINED(_svc_stack_size) ? _svc_stack_size : 0x1000;
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/* Do we need any of these for elf?
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__DYNAMIC = 0; */
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SECTIONS
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{
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.base :
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{
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arm_exception_table = .;
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arm_reset_vect = .; /* 0x00 */
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. += 4;
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arm_undef_vect = .; /* 0x04 */
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. += 4;
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arm_swi_vect = .; /* 0x08 */
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. += 4;
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arm_iabrt_vect = .; /* 0x0c */
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. += 4;
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arm_dabrt_vect = .; /* 0x10 */
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. += 4;
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/* no vector here */
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. += 4;
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arm_irq_vect = .; /* 0x18 */
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. += 4;
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arm_fiq_vect = .; /* 0x1c */
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. += 4;
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/* FIXME: */
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rtems_vector_table = .;
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. += (8 * 4); /* 8 ARM interrupts */
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bsp_vector_table = .;
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. += (32 * 4); /* 32 S3C2400 interrupts */
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. = ALIGN (0x100);
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} > sdram
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.text :
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{
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_axf_text_start = . ;
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*(EXCLUDE_FILE (*text.iwram*) .text)
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*(.text.*)
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*(.stub)
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/*
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* Special FreeBSD sysctl sections.
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*/
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. = ALIGN (16);
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__start_set_sysctl_set = .;
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*(set_sysctl_*);
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__stop_set_sysctl_set = ABSOLUTE(.);
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*(set_domain_*);
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*(set_pseudo_*);
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/* .gnu.warning sections are handled specially by elf32.em. */
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*(.gnu.warning)
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*(.gnu.linkonce.t*)
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*(.glue_7)
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*(.glue_7t)
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} > sdram
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__text_end = . ;
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.init :
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{
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*(.init)
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} > sdram /*=0*/
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.jcr :
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{
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*(.jcr)
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} > sdram
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.fini :
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{
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*(.fini)
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} > sdram /*=0*/
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.rodata :
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{
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*(.rodata)
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*all.rodata*(*)
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*(.roda)
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*(.rodata.*)
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*(.gnu.linkonce.r*)
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SORT(CONSTRUCTORS)
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} > sdram = 0xff
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.ctors :
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{
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/* gcc uses crtbegin.o to find the start of the constructors, so
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we make sure it is first. Because this is a wildcard, it
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doesn't matter if the user does not actually link against
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crtbegin.o; the linker won't look for a file to match a
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wildcard. The wildcard also means that it doesn't matter which
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directory crtbegin.o is in. */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >sdram = 0
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.dtors :
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{
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >sdram = 0
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.eh_frame :
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{
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KEEP (*(.eh_frame))
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >sdram = 0
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.gcc_except_table :
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{
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*(.gcc_except_table*)
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >sdram = 0
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_axf_ro_end = . ;
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.data ALIGN(4) :
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{
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_axf_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d*)
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CONSTRUCTORS
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. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
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} >sdram = 0xff
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__data_end = . ;
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.bss ALIGN(4):
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{
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_axf_bss_start = ABSOLUTE(.);
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_clear_start = .;
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(64);
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_clear_end = .;
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. = ALIGN (256);
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_abt_stack = .;
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. += _abt_stack_size;
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. = ALIGN (256);
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_irq_stack = .;
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. += _irq_stack_size;
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. = ALIGN (256);
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_fiq_stack = .;
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. += _fiq_stack_size;
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. = ALIGN (256);
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_svc_stack = .;
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. += _svc_stack_size;
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/*
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* Ideally, the MMU's translation table would be in SRAM. But we
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* don't have any. If we don't use more regions than TLB entries (64),
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* the lookup will only happen once for each region.
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*/
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. = ALIGN (16 * 1024);
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_ttbl_base = .;
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. += (16 * 1024);
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. = ALIGN (1024);
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_bss_free_start = .;
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WorkAreaBase = .;
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} > sdram
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_axf_bss_end = . ;
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_end = . ;
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__end__ = . ;
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PROVIDE (end = _end);
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/* Debugging stuff follows? */
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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/*.stack 0x80000 : { _stack = .; *(.stack) }*/
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/* These must appear regardless of . */
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}
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_ttbl_base = ORIGIN (SDRAM_MMU);
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INCLUDE linkcmds.armv4
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