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Added constants for z85c30_enable_interrupts.

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This commit is contained in:
Joel Sherrill
1998-07-25 16:20:33 +00:00
parent 04c5ac7112
commit dfb16ce24d
2 changed files with 34 additions and 12 deletions
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23
c/src/lib/libchip/serial/z85c30_p.h
View File

@@ -95,15 +95,23 @@ extern "C" {
/* tx/rx interrupt and data transfer mode definition */ /* tx/rx interrupt and data transfer mode definition */
#define SCC_WR1_EXT_INT_EN 0x01 #define SCC_WR1_EXT_INT_EN 0x01
#define SCC_WR1_TX_INT_EN 0x02 #define SCC_WR1_TX_INT_EN 0x02
#define SCC_WR1_PARITY 0x04 #define SCC_WR1_PARITY 0x04
#define SCC_WR1_RX_INT_DIS 0x00 #define SCC_WR1_RX_INT_DIS 0x00
#define SCC_WR1_RX_INT_FIR 0x08 #define SCC_WR1_RX_INT_FIR 0x08
#define SCC_WR1_INT_ALL_RX 0x10 #define SCC_WR1_INT_ALL_RX 0x10
#define SCC_WR1_RX_INT_SPE 0x18 #define SCC_WR1_RX_INT_SPE 0x18
#define SCC_WR1_RDMA_RECTR 0x20 #define SCC_WR1_RDMA_RECTR 0x20
#define SCC_WR1_RDMA_FUNC 0x40 #define SCC_WR1_RDMA_FUNC 0x40
#define SCC_WR1_RDMA_EN 0x80 #define SCC_WR1_RDMA_EN 0x80
#define SCC_ENABLE_ALL_INTR \
(SCC_WR1_EXT_INT_EN | SCC_WR1_TX_INT_EN | SCC_WR1_INT_ALL_RX)
#define SCC_DISABLE_ALL_INTR 0x00
#define SCC_ENABLE_ALL_INTR_EXCEPT_TX \
(SCC_WR1_EXT_INT_EN | SCC_WR1_INT_ALL_RX)
/* bit values for write register 3 */ /* bit values for write register 3 */
/* receive parameters and control */ /* receive parameters and control */
@@ -374,8 +382,6 @@ Z85C30_STATIC int z85c30_negate_DTR(
Z85C30_STATIC void z85c30_initialize_interrupts(int minor); Z85C30_STATIC void z85c30_initialize_interrupts(int minor);
Z85C30_STATIC int z85c30_flush(int major, int minor, void *arg);
Z85C30_STATIC int z85c30_write_support_int( Z85C30_STATIC int z85c30_write_support_int(
int minor, int minor,
const char *buf, const char *buf,
@@ -392,6 +398,11 @@ Z85C30_STATIC int z85c30_inbyte_nonblocking_polled(
int minor int minor
); );
Z85C30_STATIC void z85c30_enable_interrupts(
int minor,
int interrupt_mask
);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

23
c/src/libchip/serial/z85c30_p.h
View File

@@ -95,15 +95,23 @@ extern "C" {
/* tx/rx interrupt and data transfer mode definition */ /* tx/rx interrupt and data transfer mode definition */
#define SCC_WR1_EXT_INT_EN 0x01 #define SCC_WR1_EXT_INT_EN 0x01
#define SCC_WR1_TX_INT_EN 0x02 #define SCC_WR1_TX_INT_EN 0x02
#define SCC_WR1_PARITY 0x04 #define SCC_WR1_PARITY 0x04
#define SCC_WR1_RX_INT_DIS 0x00 #define SCC_WR1_RX_INT_DIS 0x00
#define SCC_WR1_RX_INT_FIR 0x08 #define SCC_WR1_RX_INT_FIR 0x08
#define SCC_WR1_INT_ALL_RX 0x10 #define SCC_WR1_INT_ALL_RX 0x10
#define SCC_WR1_RX_INT_SPE 0x18 #define SCC_WR1_RX_INT_SPE 0x18
#define SCC_WR1_RDMA_RECTR 0x20 #define SCC_WR1_RDMA_RECTR 0x20
#define SCC_WR1_RDMA_FUNC 0x40 #define SCC_WR1_RDMA_FUNC 0x40
#define SCC_WR1_RDMA_EN 0x80 #define SCC_WR1_RDMA_EN 0x80
#define SCC_ENABLE_ALL_INTR \
(SCC_WR1_EXT_INT_EN | SCC_WR1_TX_INT_EN | SCC_WR1_INT_ALL_RX)
#define SCC_DISABLE_ALL_INTR 0x00
#define SCC_ENABLE_ALL_INTR_EXCEPT_TX \
(SCC_WR1_EXT_INT_EN | SCC_WR1_INT_ALL_RX)
/* bit values for write register 3 */ /* bit values for write register 3 */
/* receive parameters and control */ /* receive parameters and control */
@@ -374,8 +382,6 @@ Z85C30_STATIC int z85c30_negate_DTR(
Z85C30_STATIC void z85c30_initialize_interrupts(int minor); Z85C30_STATIC void z85c30_initialize_interrupts(int minor);
Z85C30_STATIC int z85c30_flush(int major, int minor, void *arg);
Z85C30_STATIC int z85c30_write_support_int( Z85C30_STATIC int z85c30_write_support_int(
int minor, int minor,
const char *buf, const char *buf,
@@ -392,6 +398,11 @@ Z85C30_STATIC int z85c30_inbyte_nonblocking_polled(
int minor int minor
); );
Z85C30_STATIC void z85c30_enable_interrupts(
int minor,
int interrupt_mask
);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif