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2001-11-08 Dennis Ehlin (ECS) <Dennis.Ehlin@ecs.ericsson.se>

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This modification is part of the submitted modifications necessary to
	support the IBM PPC405 family.  This submission was reviewed by
	Thomas Doerfler <Thomas.Doerfler@imd-systems.de> who ensured it did
	not negatively impact the ppc403 BSPs.  The submission and tracking
	process was captured as PR50.
	* vectors/align_h.S: Added ppc405 support.
This commit is contained in:
Joel Sherrill
2001-11-08 23:48:52 +00:00
parent aecef8f992
commit de202e7204
2 changed files with 13 additions and 4 deletions
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9
c/src/lib/libbsp/powerpc/psim/ChangeLog
View File

@@ -1,3 +1,12 @@
2001-11-08 Dennis Ehlin (ECS) <Dennis.Ehlin@ecs.ericsson.se>
This modification is part of the submitted modifications necessary to
support the IBM PPC405 family. This submission was reviewed by
Thomas Doerfler <Thomas.Doerfler@imd-systems.de> who ensured it did
not negatively impact the ppc403 BSPs. The submission and tracking
process was captured as PR50.
* vectors/align_h.S: Added ppc405 support.
2001-10-25 Joel Sherrill <joel@OARcorp.com> 2001-10-25 Joel Sherrill <joel@OARcorp.com>
* startup/linkcmds: Added _init and _fini. * startup/linkcmds: Added _init and _fini.

8
c/src/lib/libbsp/powerpc/psim/vectors/align_h.S
View File

@@ -121,13 +121,13 @@ align_h:
stw r8,Open_lr(r1) stw r8,Open_lr(r1)
stw r9,Open_cr(r1) stw r9,Open_cr(r1)
stw r10,Open_ctr(r1) stw r10,Open_ctr(r1)
#if defined(ppc403) #if defined(ppc403) || defined(ppc405)
mfspr r7, srr2 /* SRR 2 */ mfspr r7, srr2 /* SRR 2 */
mfspr r8, srr3 /* SRR 3 */ mfspr r8, srr3 /* SRR 3 */
#endif #endif
mfspr r9, srr0 /* SRR 0 */ mfspr r9, srr0 /* SRR 0 */
mfspr r10, srr1 /* SRR 1 */ mfspr r10, srr1 /* SRR 1 */
#if defined(ppc403) #if defined(ppc403) || defined(ppc405)
stw r7,Open_srr2(r1) stw r7,Open_srr2(r1)
stw r8,Open_srr3(r1) stw r8,Open_srr3(r1)
#endif #endif
@@ -135,7 +135,7 @@ align_h:
stw r10,Open_srr1(r1) stw r10,Open_srr1(r1)
/* Set up common registers */ /* Set up common registers */
#if defined(ppc403) #if defined(ppc403) || defined(ppc405)
mfspr r5, dear /* DEAR: R5 is data exception address */ mfspr r5, dear /* DEAR: R5 is data exception address */
#endif #endif
lwz r9,Open_srr0(r1) /* get faulting instruction */ lwz r9,Open_srr0(r1) /* get faulting instruction */
@@ -431,7 +431,7 @@ align_complete:
mtlr r25 mtlr r25
mtctr r26 mtctr r26
mtcrf 0xFF, r27 mtcrf 0xFF, r27
#if defined(ppc403) #if defined(ppc403) || defined(ppc405)
mtspr srr2, r28 /* SRR 2 */ mtspr srr2, r28 /* SRR 2 */
mtspr srr3, r29 /* SRR 3 */ mtspr srr3, r29 /* SRR 3 */
#endif #endif