RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

arm/xilinx-zynqmp-rpu: Add split mode BSP variants

Browse Source 
Rename xilinx_zynqmp_rpu BSP variant to zynqmp_rpu_lock_step to
emphasize that this BSP is for the lock-step mode RPU configuration.
Add BSP variants zynqmp_rpu_split_0 and zynqmp_rpu_split_1 for the split
mode RPU configuration for core 0 and 1 respectively.
This commit is contained in:
Sebastian Huber
2024-09-19 07:43:32 +02:00
parent 5f1a9d3346
commit dddbdf4d9a
36 changed files with 637 additions and 223 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu.yml
View File

@@ -1,6 +1,6 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: arm
bsp: xilinx_zynqmp_rpu
bsp: zynqmp_rpu_lock_step
build-type: bsp
cflags: []
copyrights:

17
spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu0.yml Normal file
View File

@@ -0,0 +1,17 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: arm
bsp: zynqmp_rpu_split_0
build-type: bsp
cflags: []
copyrights:
- Copyright (C) 2024 embedded brains GmbH
cppflags: []
enabled-by: true
family: xilinx-zynqmp-rpu
includes: []
install: []
links:
- role: build-dependency
uid: grp
source: []
type: build

17
spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu1.yml Normal file
View File

@@ -0,0 +1,17 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: arm
bsp: zynqmp_rpu_split_1
build-type: bsp
cflags: []
copyrights:
- Copyright (C) 2024 embedded brains GmbH
cppflags: []
enabled-by: true
family: xilinx-zynqmp-rpu
includes: []
install: []
links:
- role: build-dependency
uid: grp
source: []
type: build

48
spec/build/bsps/arm/xilinx-zynqmp-rpu/grp.yml
View File

@@ -18,6 +18,38 @@ links:
uid: ../start
- role: build-dependency
uid: abi
- role: build-dependency
uid: optlockstep
- role: build-dependency
uid: optsplitindex
- role: build-dependency
uid: optmematcmori
- role: build-dependency
uid: optmematcmlen
- role: build-dependency
uid: optmembtcmori
- role: build-dependency
uid: optmembtcmlen
- role: build-dependency
uid: optmemocmori
- role: build-dependency
uid: optmemocmlen
- role: build-dependency
uid: optmemddrori
- role: build-dependency
uid: optmemddrlen
- role: build-dependency
uid: optmemnocacheori
- role: build-dependency
uid: optmemnocachelen
- role: build-dependency
uid: optmemdevplori
- role: build-dependency
uid: optmemdevpllen
- role: build-dependency
uid: optmemdevpsori
- role: build-dependency
uid: optmemdevpslen
- role: build-dependency
uid: optclkuart
- role: build-dependency
@@ -28,22 +60,8 @@ links:
uid: ../../optxilclockttcirq
- role: build-dependency
uid: ../../optxilclockttcrefclk
- role: build-dependency
uid: optint0len
- role: build-dependency
uid: optint0ori
- role: build-dependency
uid: optint1len
- role: build-dependency
uid: optint1ori
- role: build-dependency
uid: optramlen
- role: build-dependency
uid: optramori
- role: build-dependency
uid: optresetvec
- role: build-dependency
uid: optnocachelen
- role: build-dependency
uid: obj
- role: build-dependency
@@ -64,6 +82,8 @@ links:
uid: ../../opto2
- role: build-dependency
uid: linkcmds
- role: build-dependency
uid: linkcmdsmemory
- role: build-dependency
uid: ../../bspopts
- role: build-dependency

45
spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml
View File

@@ -1,35 +1,28 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
build-type: config-file
content: |
MEMORY {
RAM_INT_0 : ORIGIN = ${ZYNQMP_RPU_RAM_INT_0_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_INT_0_LENGTH:#010x}
RAM_INT_1 : ORIGIN = ${ZYNQMP_RPU_RAM_INT_1_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_INT_1_LENGTH:#010x}
RAM : ORIGIN = ${ZYNQMP_RPU_RAM_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_LENGTH:#010x} - ${ZYNQMP_RPU_RAM_NOCACHE_LENGTH:#010x}
NOCACHE : ORIGIN = ${ZYNQMP_RPU_RAM_ORIGIN:#010x} + ${ZYNQMP_RPU_RAM_LENGTH:#010x} - ${ZYNQMP_RPU_RAM_NOCACHE_LENGTH:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_NOCACHE_LENGTH:#010x}
}
INCLUDE linkcmds.memory
REGION_ALIAS ("REGION_START", RAM_INT_0);
REGION_ALIAS ("REGION_VECTOR", RAM_INT_0);
REGION_ALIAS ("REGION_TEXT", RAM);
REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
REGION_ALIAS ("REGION_RODATA", RAM);
REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
REGION_ALIAS ("REGION_DATA", RAM);
REGION_ALIAS ("REGION_DATA_LOAD", RAM);
REGION_ALIAS ("REGION_FAST_TEXT", RAM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
REGION_ALIAS ("REGION_FAST_DATA", RAM);
REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
REGION_ALIAS ("REGION_BSS", RAM);
REGION_ALIAS ("REGION_WORK", RAM);
REGION_ALIAS ("REGION_STACK", RAM);
REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE);
REGION_ALIAS ("REGION_START", ATCM);
REGION_ALIAS ("REGION_VECTOR", ATCM);
REGION_ALIAS ("REGION_TEXT", DDR);
REGION_ALIAS ("REGION_TEXT_LOAD", DDR);
REGION_ALIAS ("REGION_RODATA", DDR);
REGION_ALIAS ("REGION_RODATA_LOAD", DDR);
REGION_ALIAS ("REGION_DATA", DDR);
REGION_ALIAS ("REGION_DATA_LOAD", DDR);
REGION_ALIAS ("REGION_FAST_TEXT", ATCM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ATCM);
REGION_ALIAS ("REGION_FAST_DATA", ${ZYNQMP_MEMORY_ATCM_OR_BTCM});
REGION_ALIAS ("REGION_FAST_DATA_LOAD", ${ZYNQMP_MEMORY_ATCM_OR_BTCM});
REGION_ALIAS ("REGION_BSS", DDR);
REGION_ALIAS ("REGION_WORK", DDR);
REGION_ALIAS ("REGION_STACK", ${ZYNQMP_MEMORY_ATCM_OR_BTCM});
REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE);
bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
bsp_vector_table_in_start_section = 1;
INCLUDE linkcmds.armv4
@@ -38,7 +31,7 @@ content: |
_stack_end = bsp_section_stack_end;
__undef_stack = bsp_section_stack_begin;
copyrights:
- Copyright (C) 2023 Reflex Aerospace GmbH
- Copyright (C) 2024 embedded brains GmbH & Co. KG
enabled-by: true
install-path: ${BSP_LIBDIR}
links: []

47
spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmdsmemory.yml Normal file
View File

@@ -0,0 +1,47 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
build-type: config-file
content: |
MEMORY {
ATCM : ORIGIN = ${ZYNQMP_MEMORY_ATCM_ORIGIN:#010x}, LENGTH = ${ZYNQMP_MEMORY_ATCM_LENGTH:#010x}
BTCM : ORIGIN = ${ZYNQMP_MEMORY_BTCM_ORIGIN:#010x}, LENGTH = ${ZYNQMP_MEMORY_BTCM_LENGTH:#010x}
DDR : ORIGIN = ${ZYNQMP_MEMORY_DDR_ORIGIN:#010x}, LENGTH = ${ZYNQMP_MEMORY_DDR_LENGTH:#010x}
NOCACHE : ORIGIN = ${ZYNQMP_MEMORY_NOCACHE_ORIGIN:#010x}, LENGTH = ${ZYNQMP_MEMORY_NOCACHE_LENGTH:#010x}
DEVPL : ORIGIN = ${ZYNQMP_MEMORY_DEVPL_ORIGIN:#010x}, LENGTH = ${ZYNQMP_MEMORY_DEVPL_LENGTH:#010x}
DEVPS : ORIGIN = ${ZYNQMP_MEMORY_DEVPS_ORIGIN:#010x}, LENGTH = ${ZYNQMP_MEMORY_DEVPS_LENGTH:#010x}
OCM : ORIGIN = ${ZYNQMP_MEMORY_OCM_ORIGIN:#010x}, LENGTH = ${ZYNQMP_MEMORY_OCM_LENGTH:#010x}
}
zynqmp_memory_atcm_begin = ORIGIN (ATCM);
zynqmp_memory_atcm_end = ORIGIN (ATCM) + LENGTH (ATCM);
zynqmp_memory_atcm_size = LENGTH (ATCM);
zynqmp_memory_btcm_begin = ORIGIN (BTCM);
zynqmp_memory_btcm_end = ORIGIN (BTCM) + LENGTH (BTCM);
zynqmp_memory_btcm_size = LENGTH (BTCM);
zynqmp_memory_ddr_begin = ORIGIN (DDR);
zynqmp_memory_ddr_end = ORIGIN (DDR) + LENGTH (DDR);
zynqmp_memory_ddr_size = LENGTH (DDR);
zynqmp_memory_nocache_begin = ORIGIN (NOCACHE);
zynqmp_memory_nocache_end = ORIGIN (NOCACHE) + LENGTH (NOCACHE);
zynqmp_memory_nocache_size = LENGTH (NOCACHE);
zynqmp_memory_devpl_begin = ORIGIN (DEVPL);
zynqmp_memory_devpl_end = ORIGIN (DEVPL) + LENGTH (DEVPL);
zynqmp_memory_devpl_size = LENGTH (DEVPL);
zynqmp_memory_devps_begin = ORIGIN (DEVPS);
zynqmp_memory_devps_end = ORIGIN (DEVPS) + LENGTH (DEVPS);
zynqmp_memory_devps_size = LENGTH (DEVPS);
zynqmp_memory_ocm_begin = ORIGIN (OCM);
zynqmp_memory_ocm_end = ORIGIN (OCM) + LENGTH (OCM);
zynqmp_memory_ocm_size = LENGTH (OCM);
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
enabled-by: true
install-path: ${BSP_LIBDIR}
links: []
target: linkcmds.memory
type: build

2
spec/build/bsps/arm/xilinx-zynqmp-rpu/obj.yml
View File

@@ -14,6 +14,7 @@ install:
- destination: ${BSP_INCLUDEDIR}/bsp
source:
- bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h
- bsps/arm/xilinx-zynqmp-rpu/include/bsp/memory.h
- destination: ${BSP_INCLUDEDIR}/peripheral_maps
source:
- bsps/include/peripheral_maps/xilinx_zynqmp.h
@@ -28,6 +29,7 @@ source:
- bsps/arm/xilinx-zynqmp-rpu/start/bspstart.c
- bsps/arm/xilinx-zynqmp-rpu/start/bspstarthooks.c
- bsps/arm/xilinx-zynqmp-rpu/start/bspstartmpu.c
- bsps/arm/xilinx-zynqmp-rpu/start/mpu-config.c
- bsps/shared/dev/clock/xil-ttc.c
- bsps/shared/dev/btimer/btimer-cpucounter.c
- bsps/shared/dev/getentropy/getentropy-cpucounter.c

18
spec/build/bsps/arm/xilinx-zynqmp-rpu/optint0len.yml
View File

@@ -1,18 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x00010000
description: ''
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_RPU_RAM_INT_0_LENGTH
type: build

37
spec/build/bsps/arm/xilinx-zynqmp-rpu/optlockstep.yml Normal file
View File

@@ -0,0 +1,37 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-boolean: null
- define-condition: null
- env-enable: null
- comment: |
In lock step mode, the ATCM and BTCM can be used together as a contiguous
memory region. In this case, we set the ATCM size to the combined size,
the BTCM size is set to zero, and the ZYNQMP_MEMORY_ATCM_OR_BTCM
environment variable is set to ATCM. In split mode, the ATCM and BTCM are
separate memory regions. In this case, the ZYNQMP_MEMORY_ATCM_OR_BTCM
environment variable is set to BTCM. The ZYNQMP_MEMORY_ATCM_OR_BTCM
environment variable is used by the linker script to select memory regions.
- set-value-enabled-by:
- enabled-by: ZYNQMP_RPU_LOCK_STEP_MODE
value: ATCM
- enabled-by: true
value: BTCM
- env-assign: ZYNQMP_MEMORY_ATCM_OR_BTCM
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by:
- arm/zynqmp_rpu_split_0
- arm/zynqmp_rpu_split_1
value: false
- enabled-by: true
value: true
description: |
If this option is true, then the Cortex-R5F cores of the RPU shall operate in
lock-step mode, otherwise they shall operate in split mode.
enabled-by: true
format: '{}'
links: []
name: ZYNQMP_RPU_LOCK_STEP_MODE
type: build

22
spec/build/bsps/arm/xilinx-zynqmp-rpu/optmematcmlen.yml Normal file
View File

@@ -0,0 +1,22 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: ZYNQMP_RPU_LOCK_STEP_MODE
value: 0x00040000
- enabled-by: true
value: 0x00020000
description: |
This option defines the length in bytes of the tightly-coupled memory A
(ATCM).
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_MEMORY_ATCM_LENGTH
type: build

20
spec/build/bsps/arm/xilinx-zynqmp-rpu/optmematcmori.yml Normal file
View File

@@ -0,0 +1,20 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x00000000
description: |
This option defines the address of the tightly-coupled memory A (ATCM)
origin.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_MEMORY_ATCM_ORIGIN
type: build

22
spec/build/bsps/arm/xilinx-zynqmp-rpu/optmembtcmlen.yml Normal file
View File

@@ -0,0 +1,22 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: ZYNQMP_RPU_LOCK_STEP_MODE
value: 0x00000000
- enabled-by: true
value: 0x00020000
description: |
This option defines the length in bytes of the tightly-coupled memory B
(BTCM).
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_MEMORY_BTCM_LENGTH
type: build

8
spec/build/bsps/arm/xilinx-zynqmp-rpu/optint1ori.yml → spec/build/bsps/arm/xilinx-zynqmp-rpu/optmembtcmori.yml
View File

@@ -6,13 +6,15 @@ actions:
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x00020000
description: ''
description: |
This option defines the address for the tightly-coupled memory B (BTCM)
origin.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_RPU_RAM_INT_1_ORIGIN
name: ZYNQMP_MEMORY_BTCM_ORIGIN
type: build

24
spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemddrlen.yml Normal file
View File

@@ -0,0 +1,24 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by:
not: ZYNQMP_RPU_LOCK_STEP_MODE
value: 0x20000000
- enabled-by: true
value: 0x40000000
description: |
This option defines the length in bytes of the DDR memory area used by the
RPU. If the non-cacheble memory area is located in the DDR memory, then this
area shall be excluded from the area specified by this option.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_MEMORY_DDR_LENGTH
type: build

23
spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemddrori.yml Normal file
View File

@@ -0,0 +1,23 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: ZYNQMP_RPU_SPLIT_INDEX_1
value: 0x60000000
- enabled-by: true
value: 0x40000000
description: |
This option defines the address of the DDR memory area used by the RPU. If
the non-cacheble memory area is located in the DDR memory, then this area
shall be excluded from the area specified by this option.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_MEMORY_DDR_ORIGIN
type: build

9
spec/build/bsps/arm/xilinx-zynqmp-rpu/optint1len.yml → spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemdevpllen.yml
View File

@@ -6,13 +6,14 @@ actions:
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x00010000
description: ''
value: 0x40000000
description: |
This option defines the length in bytes of the PL device memory area.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_RPU_RAM_INT_1_LENGTH
name: ZYNQMP_MEMORY_DEVPL_LENGTH
type: build

8
spec/build/bsps/arm/xilinx-zynqmp-rpu/optnocachelen.yml → spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemdevplori.yml
View File

@@ -6,14 +6,14 @@ actions:
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x00100000
value: 0x80000000
description: |
length of nocache RAM region
This option defines the address of the PL device memory area.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_RPU_RAM_NOCACHE_LENGTH
name: ZYNQMP_MEMORY_DEVPL_ORIGIN
type: build

19
spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemdevpslen.yml Normal file
View File

@@ -0,0 +1,19 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x40000000
description: |
This option defines the length in bytes of the PL device memory area.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_MEMORY_DEVPS_LENGTH
type: build

8
spec/build/bsps/arm/xilinx-zynqmp-rpu/optramlen.yml → spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemdevpsori.yml
View File

@@ -6,14 +6,14 @@ actions:
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x10000000
value: 0xc0000000
description: |
override a BSP's default RAM length
This option defines the address of the PL device memory area.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_RPU_RAM_LENGTH
name: ZYNQMP_MEMORY_DEVPS_ORIGIN
type: build

19
spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemnocachelen.yml Normal file
View File

@@ -0,0 +1,19 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x00000000
description: |
This option defines the length in bytes of the non-cacheable memory area.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_MEMORY_NOCACHE_LENGTH
type: build

7
spec/build/bsps/arm/xilinx-zynqmp-rpu/optint0ori.yml → spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemnocacheori.yml
View File

@@ -6,13 +6,14 @@ actions:
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x00000000
description: ''
description: |
This option defines the address of the non-cacheable memory area.
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_RPU_RAM_INT_0_ORIGIN
name: ZYNQMP_MEMORY_NOCACHE_ORIGIN
type: build

21
spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemocmlen.yml Normal file
View File

@@ -0,0 +1,21 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x00040000
description: |
This option defines the length in bytes of the On-Chip Memory (OCM).
Please note that the OCM may be also used by bootloaders or the
ARM Trusted Firmware (ATF).
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_MEMORY_OCM_LENGTH
type: build

21
spec/build/bsps/arm/xilinx-zynqmp-rpu/optmemocmori.yml Normal file
View File

@@ -0,0 +1,21 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0xfffc0000
description: |
This option defines the address of the On-Chip Memory (OCM).
Please note that the OCM may be also used by bootloaders or the
ARM Trusted Firmware (ATF).
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_MEMORY_OCM_ORIGIN
type: build

17
spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml
View File

@@ -1,17 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-boolean: null
- define-condition: null
build-type: option
copyrights:
- Copyright (C) 2023 Reflex Aerospace GmbH
default:
- enabled-by: true
value: true
description: |
Sets the target processing unit to the RPU (R5F) cores.
enabled-by: true
format: '{}'
links: []
name: ZYNQMP_PROC_UNIT_RPU
type: build

18
spec/build/bsps/arm/xilinx-zynqmp-rpu/optramori.yml
View File

@@ -1,18 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 0x00100000
description: ''
enabled-by: true
format: '{:#010x}'
links: []
name: ZYNQMP_RPU_RAM_ORIGIN
type: build

27
spec/build/bsps/arm/xilinx-zynqmp-rpu/optsplitindex.yml Normal file
View File

@@ -0,0 +1,27 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-in-set:
- 0
- 1
- format-and-define: null
- env-assign: null
- set-value: ZYNQMP_RPU_SPLIT_INDEX_${ZYNQMP_RPU_SPLIT_INDEX}
- substitute: null
- env-append: ENABLE
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: arm/zynqmp_rpu_split_1
value: 1
- enabled-by: true
value: 0
description: |
This option defines the RPU core index (0 or 1).
enabled-by:
not: ZYNQMP_RPU_LOCK_STEP_MODE
format: '{}'
links: []
name: ZYNQMP_RPU_SPLIT_INDEX
type: build

2
spec/build/bsps/optxilclockttcbaseaddr.yml
View File

@@ -6,6 +6,8 @@ build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: ZYNQMP_RPU_SPLIT_INDEX_1
value: 0xff110004
- enabled-by: true
value: 0xff110000
description: |

2
spec/build/bsps/optxilclockttcirq.yml
View File

@@ -6,6 +6,8 @@ build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by: ZYNQMP_RPU_SPLIT_INDEX_1
value: 69
- enabled-by: true
value: 68
description: |

1
spec/build/bsps/optzynquartkernbase.yml
View File

@@ -8,6 +8,7 @@ copyrights:
default:
- enabled-by:
- bsps/aarch64/xilinx-zynqmp
- ZYNQMP_RPU_SPLIT_INDEX_0
value: ZYNQ_UART_0_BASE_ADDR
- enabled-by: true
value: ZYNQ_UART_1_BASE_ADDR