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2010-12-03 Sebastian Huber <sebastian.huber@embedded-brains.de>

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* bsp_specs, start/start.S, startup/linkcmds.csb337,
	startup/linkcmds.csb637: Use linker command base file.
This commit is contained in:
Sebastian Huber
2010-12-03 10:51:54 +00:00
parent 4651508bc0
commit dda9595327
5 changed files with 62 additions and 470 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
c/src/lib/libbsp/arm/csb337/ChangeLog
View File

@@ -1,3 +1,8 @@
2010-12-03 Sebastian Huber <sebastian.huber@embedded-brains.de>
* bsp_specs, start/start.S, startup/linkcmds.csb337,
startup/linkcmds.csb637: Use linker command base file.
2010-04-30 Sebastian Huber <sebastian.huber@embedded-brains.de> 2010-04-30 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Added generic interrupt support modules. * Makefile.am, preinstall.am: Added generic interrupt support modules.

2
c/src/lib/libbsp/arm/csb337/bsp_specs
View File

@@ -7,7 +7,7 @@
%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e _start}} %{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e _start}}
*link: *link:
%{!qrtems: %(old_link)} %{qrtems: -dp -Bstatic -N} %{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
*endfile: *endfile:
%{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s } %{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s }

22
c/src/lib/libbsp/arm/csb337/start/start.S
View File

@@ -12,6 +12,8 @@
* $Id$ * $Id$
*/ */
#include <bsp/linker-symbols.h>
/* Some standard definitions...*/ /* Some standard definitions...*/
.equ PSR_MODE_USR, 0x10 .equ PSR_MODE_USR, 0x10
.equ PSR_MODE_FIQ, 0x11 .equ PSR_MODE_FIQ, 0x11
@@ -39,8 +41,8 @@ _start:
msr cpsr, r0 msr cpsr, r0
/* zero the bss */ /* zero the bss */
ldr r1, =_bss_end_ ldr r1, =bsp_section_bss_end
ldr r0, =_bss_start_ ldr r0, =bsp_section_bss_begin
_bss_init: _bss_init:
mov r2, #0 mov r2, #0
@@ -53,29 +55,29 @@ _bss_init:
/* Enter IRQ mode and set up the IRQ stack pointer */ /* Enter IRQ mode and set up the IRQ stack pointer */
mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */ mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0 msr cpsr, r0
ldr r1, =_irq_stack_size ldr r1, =bsp_stack_irq_size
ldr sp, =_irq_stack ldr sp, =bsp_stack_irq_begin
add sp, sp, r1 add sp, sp, r1
/* Enter FIQ mode and set up the FIQ stack pointer */ /* Enter FIQ mode and set up the FIQ stack pointer */
mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) /* No interrupts */ mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0 msr cpsr, r0
ldr r1, =_fiq_stack_size ldr r1, =bsp_stack_fiq_size
ldr sp, =_fiq_stack ldr sp, =bsp_stack_fiq_begin
add sp, sp, r1 add sp, sp, r1
/* Enter ABT mode and set up the ABT stack pointer */ /* Enter ABT mode and set up the ABT stack pointer */
mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) /* No interrupts */ mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0 msr cpsr, r0
ldr r1, =_abt_stack_size ldr r1, =bsp_stack_abt_size
ldr sp, =_abt_stack ldr sp, =bsp_stack_abt_begin
add sp, sp, r1 add sp, sp, r1
/* Set up the SVC stack pointer last and stay in SVC mode */ /* Set up the SVC stack pointer last and stay in SVC mode */
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */ mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0 msr cpsr, r0
ldr r1, =_svc_stack_size ldr r1, =bsp_stack_svc_size
ldr sp, =_svc_stack ldr sp, =bsp_stack_svc_begin
add sp, sp, r1 add sp, sp, r1
sub sp, sp, #0x64 sub sp, sp, #0x64

248
c/src/lib/libbsp/arm/csb337/startup/linkcmds.csb337
View File

@@ -1,230 +1,26 @@
/* MEMORY {
* Cogent CSB337 Linker script SDRAM_MMU : ORIGIN = 0x20100000, LENGTH = 16k
* SDRAM : ORIGIN = 0x20104000, LENGTH = 15M - 16k
* Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> SRAM : ORIGIN = 0x00200000, LENGTH = 16k
* NIRVANA : ORIGIN = 0, LENGTH = 0
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
"elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY
{
sdram : ORIGIN = 0x20100000, LENGTH = 15M
sram : ORIGIN = 0x00200000, LENGTH = 16K
} }
/* REGION_ALIAS ("REGION_START", SDRAM);
* Declare some sizes. REGION_ALIAS ("REGION_VECTOR", SRAM);
*/ REGION_ALIAS ("REGION_TEXT", SDRAM);
_sdram_base = DEFINED(_sdram_base) ? _sdram_base : 0x20100000; REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
_sdram_size = DEFINED(_sdram_size) ? _sdram_size : 15M; REGION_ALIAS ("REGION_RODATA", SDRAM);
REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
REGION_ALIAS ("REGION_DATA", SDRAM);
REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
REGION_ALIAS ("REGION_BSS", SDRAM);
REGION_ALIAS ("REGION_WORK", SDRAM);
REGION_ALIAS ("REGION_STACK", SDRAM);
RamBase = _sdram_base; _ttbl_base = ORIGIN (SDRAM_MMU);
RamSize = _sdram_size;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
_sram_base = DEFINED(_sram_base) ? _sram_base : 0x00000000;
_sram_size = DEFINED(_sram_size) ? _sram_size : 16K;
_irq_stack_size = DEFINED(_irq_stack_size) ? _irq_stack_size : 0x1000;
_fiq_stack_size = DEFINED(_fiq_stack_size) ? _fiq_stack_size : 0x400;
_abt_stack_size = DEFINED(_abt_stack_size) ? _abt_stack_size : 0x100;
_svc_stack_size = DEFINED(_svc_stack_size) ? _svc_stack_size : 0x1000;
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.base :
{
_sram_base = .;
/* reserve room for the vectors and function pointers */
arm_exception_table = .;
. += 64;
/* 256 byte aligned rx buffer header array */
. = ALIGN (0x100);
at91rm9200_emac_rxbuf_hdrs = .;
/* 1 transmit buffer, 0x600 size */
. += (0x100);
at91rm9200_emac_txbuf = .;
. += (0x600);
/* 8 receive buffers, 0x600 each */
at91rm9200_emac_rxbufs = .;
. += (0x600 * 8);
} > sram
.text :
{
_text_start = .;
CREATE_OBJECT_SYMBOLS
*(.text)
*(.text.*)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.gnu.linkonce.t*)
*(.glue_7)
*(.glue_7t)
/* I think these come from the ld docs: */
___CTOR_LIST__ = .;
LONG((___CTOR_END__ - ___CTOR_LIST__) / 4 - 2)
*(.ctors)
LONG(0)
___CTOR_END__ = .;
___DTOR_LIST__ = .;
LONG((___DTOR_END__ - ___DTOR_LIST__) / 4 - 2)
*(.dtors)
LONG(0)
___DTOR_END__ = .;
_etext = .;
PROVIDE (etext = .);
} > sdram
.init :
{
KEEP (*(.init))
} > sdram /*=0*/
.fini :
{
KEEP (*(.fini))
} > sdram /*=0*/
.data :
{
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
*(.jcr)
SORT(CONSTRUCTORS)
_edata = .;
} > sdram
.eh_frame : { *(.eh_frame) } > sdram
.data1 : { *(.data1) } > sdram
.eh_frame : { *(.eh_frame) } > sdram
.gcc_except_table : { *(.gcc_except_table*) } > sdram
.rodata :
{
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r*)
} > sdram
.bss :
{
_bss_start_ = .;
_clear_start = .;
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(64);
_clear_end = .;
. = ALIGN (256);
_abt_stack = .;
. += _abt_stack_size;
. = ALIGN (256);
_irq_stack = .;
. += _irq_stack_size;
. = ALIGN (256);
_fiq_stack = .;
. += _fiq_stack_size;
. = ALIGN (256);
_svc_stack = .;
. += _svc_stack_size;
_bss_end_ = .;
_end = .;
__end = .;
/*
* Ideally, the MMU's translation table would be in SRAM. But we need
* 16K which is the size of SRAM. If we do the mapping right, the TLB
* should be big enough that to hold all the translations that matter,
* so keeping the table in SDRAM won't be a problem.
*/
. = ALIGN (16 * 1024);
_ttbl_base = .;
. += (16 * 1024);
. = ALIGN (1024);
_bss_free_start = .;
WorkAreaBase = .;
} > sdram
/* Debugging stuff follows? */
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* .stack 0x80000 : { _stack = .; *(.stack) }*/
/* These must appear regardless of . */
}
INCLUDE linkcmds.armv4

255
c/src/lib/libbsp/arm/csb337/startup/linkcmds.csb637
View File

@@ -1,237 +1,26 @@
/* MEMORY {
* Cogent CSB637 linker script SDRAM_MMU : ORIGIN = 0x20100000, LENGTH = 16k
* SDRAM : ORIGIN = 0x20104000, LENGTH = 63M - 16k
* Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> SRAM : ORIGIN = 0x00200000, LENGTH = 16k
* File from the old CSB337 RTEMS BSP NIRVANA : ORIGIN = 0, LENGTH = 0
*
* Modified by Joel Sherill
* from OAR Corporation and
* Fernando Nicodemos <fgnicodemos@terra.com.br>
* from NCB - Sistemas Embarcados Ltda. (Brazil)
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
"elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY
{
sdram : ORIGIN = 0x20100000, LENGTH = 63M
sram : ORIGIN = 0x00200000, LENGTH = 16K
} }
/* REGION_ALIAS ("REGION_START", SDRAM);
* Declare some sizes. REGION_ALIAS ("REGION_VECTOR", SRAM);
*/ REGION_ALIAS ("REGION_TEXT", SDRAM);
_sdram_base = DEFINED(_sdram_base) ? _sdram_base : 0x20100000; REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
_sdram_size = DEFINED(_sdram_size) ? _sdram_size : 63M; REGION_ALIAS ("REGION_RODATA", SDRAM);
REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
REGION_ALIAS ("REGION_DATA", SDRAM);
REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
REGION_ALIAS ("REGION_BSS", SDRAM);
REGION_ALIAS ("REGION_WORK", SDRAM);
REGION_ALIAS ("REGION_STACK", SDRAM);
RamBase = _sdram_base; _ttbl_base = ORIGIN (SDRAM_MMU);
RamSize = _sdram_size;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
_sram_base = DEFINED(_sram_base) ? _sram_base : 0x00000000;
_sram_size = DEFINED(_sram_size) ? _sram_size : 16K;
_irq_stack_size = DEFINED(_irq_stack_size) ? _irq_stack_size : 0x1000;
_fiq_stack_size = DEFINED(_fiq_stack_size) ? _fiq_stack_size : 0x400;
_abt_stack_size = DEFINED(_abt_stack_size) ? _abt_stack_size : 0x100;
_svc_stack_size = DEFINED(_svc_stack_size) ? _svc_stack_size : 0x1000;
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.base :
{
_sram_base = .;
/* reserve room for the vectors and function pointers */
arm_exception_table = .;
. += 64;
/* 256 byte aligned rx buffer header array */
. = ALIGN (0x100);
at91rm9200_emac_rxbuf_hdrs = .;
/* 1 transmit buffer, 0x600 size */
. += (0x100);
at91rm9200_emac_txbuf = .;
. += (0x600);
/* 8 receive buffers, 0x600 each */
at91rm9200_emac_rxbufs = .;
. += (0x600 * 8);
} > sram
.text :
{
_text_start = .;
CREATE_OBJECT_SYMBOLS
*(.text)
*(.text.*)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.gnu.linkonce.t*)
*(.glue_7)
*(.glue_7t)
/* I think these come from the ld docs: */
___CTOR_LIST__ = .;
LONG((___CTOR_END__ - ___CTOR_LIST__) / 4 - 2)
*(.ctors)
LONG(0)
___CTOR_END__ = .;
___DTOR_LIST__ = .;
LONG((___DTOR_END__ - ___DTOR_LIST__) / 4 - 2)
*(.dtors)
LONG(0)
___DTOR_END__ = .;
_etext = .;
PROVIDE (etext = .);
} > sdram
.init :
{
KEEP (*(.init))
} > sdram /*=0*/
.fini :
{
KEEP (*(.fini))
} > sdram /*=0*/
.data :
{
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
*(.jcr)
SORT(CONSTRUCTORS)
_edata = .;
} > sdram
.eh_frame : { *(.eh_frame) } > sdram
.data1 : { *(.data1) } > sdram
.eh_frame : { *(.eh_frame) } > sdram
.gcc_except_table : { *(.gcc_except_table*) } > sdram
.rodata :
{
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r*)
} > sdram
.bss :
{
_bss_start_ = .;
_clear_start = .;
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(64);
_clear_end = .;
. = ALIGN (256);
_abt_stack = .;
. += _abt_stack_size;
. = ALIGN (256);
_irq_stack = .;
. += _irq_stack_size;
. = ALIGN (256);
_fiq_stack = .;
. += _fiq_stack_size;
. = ALIGN (256);
_svc_stack = .;
. += _svc_stack_size;
_bss_end_ = .;
_end = .;
__end = .;
/*
* Ideally, the MMU's translation table would be in SRAM. But we need
* 16K which is the size of SRAM. If we do the mapping right, the TLB
* should be big enough that to hold all the translations that matter,
* so keeping the table in SDRAM won't be a problem.
*/
. = ALIGN (16 * 1024);
_ttbl_base = .;
. += (16 * 1024);
. = ALIGN (1024);
_bss_free_start = .;
. = ALIGN (32);
WorkAreaBase = .;
} > sdram
/* Debugging stuff follows? */
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* .stack 0x80000 : { _stack = .; *(.stack) }*/
/* These must appear regardless of . */
}
INCLUDE linkcmds.armv4