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2002-07-16 Greg Menke <gregory.menke@gsfc.nasa.gov>

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* cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
	deadlock caused by interrupt arriving while dispatching.
This commit is contained in:
Joel Sherrill
2002-07-16 22:26:14 +00:00
parent 18c19a7106
commit dc3848d0bc
4 changed files with 16 additions and 6 deletions
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7
c/src/exec/score/cpu/mips/ChangeLog
View File

@@ -1,3 +1,8 @@
2002-07-16 Greg Menke <gregory.menke@gsfc.nasa.gov>
* cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
deadlock caused by interrupt arriving while dispatching.
2002-07-05 Ralf Corsepius <corsepiu@faw.uni-ulm.de> 2002-07-05 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: RTEMS_TOP(../../../..). * configure.ac: RTEMS_TOP(../../../..).
@@ -72,7 +77,7 @@
end of the frame gdb cares about, so doesn't affect gdb or cpu.h end of the frame gdb cares about, so doesn't affect gdb or cpu.h
stuff. stuff.
* rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
to obtain FPU defines without systax errors generated by the C to obtain FPU defines without syntax errors generated by the C
defintions. defintions.
* cpu.c: Improved interrupt level saves & restores. * cpu.c: Improved interrupt level saves & restores.

4
c/src/exec/score/cpu/mips/cpu_asm.S
View File

@@ -56,7 +56,7 @@
* left it in... * left it in...
*/ */
#define INSTRUMENT_ISR_VECTORING /* #define INSTRUMENT_ISR_VECTORING */
/* #define INSTRUMENT_EXECUTING_THREAD */ /* #define INSTRUMENT_EXECUTING_THREAD */
@@ -484,7 +484,7 @@ _CPU_Context_switch_restore:
#if __mips == 3 #if __mips == 3
or t2,SR_EXL + SR_IE or t2,SR_EXL + SR_IE
#elif __mips == 1 #elif __mips == 1
or t2,SR_IEC + SR_IEP /* save current & previous int enable */ or t2,SR_IEC + SR_IEP + SR_IEO /* save current & previous int enable */
#endif #endif
and t0,t2 /* keep only the per-task bits */ and t0,t2 /* keep only the per-task bits */

7
cpukit/score/cpu/mips/ChangeLog
View File

@@ -1,3 +1,8 @@
2002-07-16 Greg Menke <gregory.menke@gsfc.nasa.gov>
* cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
deadlock caused by interrupt arriving while dispatching.
2002-07-05 Ralf Corsepius <corsepiu@faw.uni-ulm.de> 2002-07-05 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: RTEMS_TOP(../../../..). * configure.ac: RTEMS_TOP(../../../..).
@@ -72,7 +77,7 @@
end of the frame gdb cares about, so doesn't affect gdb or cpu.h end of the frame gdb cares about, so doesn't affect gdb or cpu.h
stuff. stuff.
* rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
to obtain FPU defines without systax errors generated by the C to obtain FPU defines without syntax errors generated by the C
defintions. defintions.
* cpu.c: Improved interrupt level saves & restores. * cpu.c: Improved interrupt level saves & restores.

4
cpukit/score/cpu/mips/cpu_asm.S
View File

@@ -56,7 +56,7 @@
* left it in... * left it in...
*/ */
#define INSTRUMENT_ISR_VECTORING /* #define INSTRUMENT_ISR_VECTORING */
/* #define INSTRUMENT_EXECUTING_THREAD */ /* #define INSTRUMENT_EXECUTING_THREAD */
@@ -484,7 +484,7 @@ _CPU_Context_switch_restore:
#if __mips == 3 #if __mips == 3
or t2,SR_EXL + SR_IE or t2,SR_EXL + SR_IE
#elif __mips == 1 #elif __mips == 1
or t2,SR_IEC + SR_IEP /* save current & previous int enable */ or t2,SR_IEC + SR_IEP + SR_IEO /* save current & previous int enable */
#endif #endif
and t0,t2 /* keep only the per-task bits */ and t0,t2 /* keep only the per-task bits */