forked from Imagelibrary/rtems
bsp/gen83xx: Add br_uid BSP variant
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committed by
Sebastian Huber
parent
bd5a138629
commit
d9af2ed4dd
@@ -920,6 +920,14 @@ extern m83xxRegisters_t mpc83xx;
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/* Core PLL mult. factor */
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#define RCWLR_COREPLL(n) (((n)&0xff)<<(31-15))
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/* for MPC8309: */
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#define RCWLR_CEVCOD_1_4 (0<<(31-25)) /* QUICC internal PLL divider 1:4 */
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#define RCWLR_CEVCOD_1_2 (2<<(31-25)) /* QUICC internal PLL divider 1:2 */
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/* QUICC Engine PLL mult. factor */
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#define RCWLR_CEPDF_2 (1<<(31-26)) /* QUICC Engine divide PLL out by 2*/
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/* QUICC Engine PLL mult. factor */
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#define RCWLR_CEPMF(n) (((n)&0x1f)<<(31-31))
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/* PCI host mode */
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#define RCWHR_PCI_AGENT (0 << (31- 0)) /* agent mode */
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#define RCWHR_PCI_HOST (1 << (31- 0)) /* host mode */
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@@ -974,4 +982,11 @@ extern m83xxRegisters_t mpc83xx;
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#define RCWHR_LDP_PAR (0 << (31-30)) /* LDP0-3 are parity pins */
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#define RCWHR_LDP_SPC (1 << (31-30)) /* LDP0-3 are special pins */
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/*
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* For MPC8309:
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*/
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#define RCWHR_RLEXT_LGCY (0 << (31-13)) /* Boot ROM loc. extension: Legacy */
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#define RCWHR_RLEXT_NAND (1 << (31-13)) /* Boot ROM loc. extension: NAND Fl.*/
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#define RCWHR_RLEXT_RSV2 (2 << (31-13)) /* Boot ROM loc. extension: resrvd */
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#define RCWHR_RLEXT_RSV3 (3 << (31-13)) /* Boot ROM loc. extension: resrvd */
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#endif /* _MPC83XX_MPC83XX_H */
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