diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog
index 90d2872a24..786c4bd0d8 100644
--- a/c/src/lib/libcpu/powerpc/ChangeLog
+++ b/c/src/lib/libcpu/powerpc/ChangeLog
@@ -1,3 +1,12 @@
+2008-03-20	Till Straumann <strauman@slac.stanford.edu>
+
+	* new-exceptions/bspsupport/irq.c: don't disable irqs
+	at the interrupt controller (PIC) during initialization -- this
+	caused problems where some BSPs's BSP_disable_irq_at_pic() routine
+	did not ignore IRQ lines associated with cascaded PICs.
+	Rely on the BSP (BSP_setup_the_pic()) to provide a good
+	initial setup.
+
 2008-03-13	Till Straumann <strauman@slac.stanford.edu>
 
 	* new-exceptions/bspsupport/ppc_exc_asm_macros.h,
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq.c
index 054dd114bf..d972ba9b7b 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/irq.c
@@ -353,7 +353,14 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
 			/* at least one handler registered */
 			BSP_enable_irq_at_pic(i);
 		} else {
+/* Do NOT disable; there might be boards with cascaded
+ * interrupt controllers where the BSP (incorrectly) does
+ * not ignore the cascaded interrupts in BSP_disable_irq_at_pic()!
+ * Instead, we rely on BSP_setup_the_pic() for a good 
+ * initial configuration. 
+ * 
 			BSP_disable_irq_at_pic(i);
+ */
 		}
 	}