forked from Imagelibrary/rtems
2002-04-26 Eric Norum <eric.norum@usask.ca>
* netinet/in_cksum_i386.c: Add volatile so the more agressive optimization in gcc 3.1 does not reorder things.
This commit is contained in:
@@ -1,3 +1,8 @@
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2002-04-26 Eric Norum <eric.norum@usask.ca>
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* netinet/in_cksum_i386.c: Add volatile so the more agressive
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optimization in gcc 3.1 does not reorder things.
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2002-04-18 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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2002-04-18 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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* pppd/utils.c: Adapt to gcc-3.x.
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* pppd/utils.c: Adapt to gcc-3.x.
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@@ -19,10 +19,14 @@
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* Thanks to gcc we don't have to guess
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* Thanks to gcc we don't have to guess
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* which registers contain sum & w.
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* which registers contain sum & w.
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*/
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*/
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#define ADD(n) asm("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define ADD(n) __asm__ volatile \
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#define ADDC(n) asm("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define LOAD(n) asm volatile("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
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#define ADDC(n) __asm__ volatile \
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#define MOP asm("adcl $0, %0" : "=r" (sum) : "0" (sum))
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("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define LOAD(n) __asm__ volatile \
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("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
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#define MOP __asm__ volatile \
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("adcl $0, %0" : "=r" (sum) : "0" (sum))
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int
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int
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in_cksum(m, len)
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in_cksum(m, len)
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@@ -1,3 +1,8 @@
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2002-04-26 Eric Norum <eric.norum@usask.ca>
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* netinet/in_cksum_i386.c: Add volatile so the more agressive
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optimization in gcc 3.1 does not reorder things.
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2002-04-18 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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2002-04-18 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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* pppd/utils.c: Adapt to gcc-3.x.
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* pppd/utils.c: Adapt to gcc-3.x.
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@@ -19,10 +19,14 @@
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* Thanks to gcc we don't have to guess
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* Thanks to gcc we don't have to guess
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* which registers contain sum & w.
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* which registers contain sum & w.
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*/
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*/
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#define ADD(n) asm("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define ADD(n) __asm__ volatile \
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#define ADDC(n) asm("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define LOAD(n) asm volatile("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
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#define ADDC(n) __asm__ volatile \
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#define MOP asm("adcl $0, %0" : "=r" (sum) : "0" (sum))
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("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define LOAD(n) __asm__ volatile \
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("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
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#define MOP __asm__ volatile \
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("adcl $0, %0" : "=r" (sum) : "0" (sum))
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int
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int
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in_cksum(m, len)
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in_cksum(m, len)
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@@ -1,3 +1,8 @@
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2002-04-26 Eric Norum <eric.norum@usask.ca>
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* netinet/in_cksum_i386.c: Add volatile so the more agressive
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optimization in gcc 3.1 does not reorder things.
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2002-04-18 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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2002-04-18 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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* pppd/utils.c: Adapt to gcc-3.x.
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* pppd/utils.c: Adapt to gcc-3.x.
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@@ -19,10 +19,14 @@
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* Thanks to gcc we don't have to guess
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* Thanks to gcc we don't have to guess
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* which registers contain sum & w.
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* which registers contain sum & w.
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*/
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*/
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#define ADD(n) asm("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define ADD(n) __asm__ volatile \
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#define ADDC(n) asm("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define LOAD(n) asm volatile("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
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#define ADDC(n) __asm__ volatile \
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#define MOP asm("adcl $0, %0" : "=r" (sum) : "0" (sum))
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("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define LOAD(n) __asm__ volatile \
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("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
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#define MOP __asm__ volatile \
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("adcl $0, %0" : "=r" (sum) : "0" (sum))
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int
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int
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in_cksum(m, len)
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in_cksum(m, len)
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@@ -19,10 +19,14 @@
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* Thanks to gcc we don't have to guess
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* Thanks to gcc we don't have to guess
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* which registers contain sum & w.
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* which registers contain sum & w.
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*/
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*/
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#define ADD(n) asm("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define ADD(n) __asm__ volatile \
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#define ADDC(n) asm("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define LOAD(n) asm volatile("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
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#define ADDC(n) __asm__ volatile \
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#define MOP asm("adcl $0, %0" : "=r" (sum) : "0" (sum))
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("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
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#define LOAD(n) __asm__ volatile \
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("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
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#define MOP __asm__ volatile \
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("adcl $0, %0" : "=r" (sum) : "0" (sum))
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int
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int
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in_cksum(m, len)
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in_cksum(m, len)
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