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bsp/lpc24xx: New BSP variants (PLX800 on LPC1778)

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This commit is contained in:
Sebastian Huber
2012-06-06 15:03:37 +02:00
parent 7329f55d8f
commit d40b09d7e8
7 changed files with 85 additions and 13 deletions
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2
c/src/lib/libbsp/arm/lpc24xx/Makefile.am
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@@ -67,6 +67,8 @@ project_lib_DATA += startup/linkcmds
EXTRA_DIST =
EXTRA_DIST += startup/linkcmds.lpc17xx_ea_ram
EXTRA_DIST += startup/linkcmds.lpc17xx_ea_rom_int
EXTRA_DIST += startup/linkcmds.lpc17xx_plx800_ram
EXTRA_DIST += startup/linkcmds.lpc17xx_plx800_rom_int
EXTRA_DIST += startup/linkcmds.lpc2362
EXTRA_DIST += startup/linkcmds.lpc23xx_tli800
EXTRA_DIST += startup/linkcmds.lpc24xx_ea

20
c/src/lib/libbsp/arm/lpc24xx/configure.ac
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@@ -32,21 +32,19 @@ RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[main oscillator frequency in Hz])
RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768U])
RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz])
RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[120000000U])
#RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[96000000U])
#RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[48000000U])
RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17xx_ea*],[120000000U])
RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc23*],[58982400U])
RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc24xx_plx800_*],[51612800U])
RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000U])
RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz])
RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[lpc17*],[2U])
RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[lpc17xx_ea*],[2U])
RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[*],[1U])
RTEMS_BSPOPTS_HELP([LPC24XX_PCLKDIV],[peripheral clock divider for default PCLK (PCLK = CCLK / PCLKDIV)])
RTEMS_BSPOPTS_HELP([LPC24XX_PCLKDIV],[clock divider for default PCLK (PCLK = CCLK / PCLKDIV)])
RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[lpc17*],[2U])
RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[lpc17xx_ea*],[2U])
RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[*],[1U])
RTEMS_BSPOPTS_HELP([LPC24XX_EMCCLKDIV],[peripheral clock divider for default EMCCLK (EMCCLK = CCLK / EMCCLKDIV)])
RTEMS_BSPOPTS_HELP([LPC24XX_EMCCLKDIV],[clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV)])
RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200U])
RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[baud for UARTs])
@@ -60,7 +58,7 @@ RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MT48LC4M16A2],[enable Micron MT48LC4M16A2 config
RTEMS_BSPOPTS_HELP([LPC24XX_EMC_W9825G2JB75I],[enable Winbond W9825G2JB75I configuration for EMC])
RTEMS_BSPOPTS_SET([LPC24XX_EMC_IS42S32800D7],[lpc24xx_plx800_rom_*],[1])
RTEMS_BSPOPTS_SET([LPC24XX_EMC_IS42S32800D7],[*_plx800_rom_*],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_EMC_IS42S32800D7],[enable ISSI IS42S32800D7 configuration for EMC])
RTEMS_BSPOPTS_SET([LPC24XX_EMC_IS42S32800B],[lpc17xx_ea_rom_*],[1])
@@ -69,7 +67,7 @@ RTEMS_BSPOPTS_HELP([LPC24XX_EMC_IS42S32800B],[enable ISSI IS42S32800B configurat
RTEMS_BSPOPTS_SET([LPC24XX_EMC_M29W160E],[lpc24xx_ncs_rom_*],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_EMC_M29W160E],[enable M29W160E configuration for EMC])
RTEMS_BSPOPTS_SET([LPC24XX_EMC_M29W320E70],[lpc24xx_plx800_rom_*],[1])
RTEMS_BSPOPTS_SET([LPC24XX_EMC_M29W320E70],[*_plx800_rom_*],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_EMC_M29W320E70],[enable M29W320E70 configuration for EMC])
RTEMS_BSPOPTS_HELP([LPC24XX_EMC_SST39VF3201],[enable SST39VF3201 configuration for EMC])
@@ -80,12 +78,12 @@ RTEMS_BSPOPTS_HELP([LPC24XX_EMC_TEST],[enable tests for EMC])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_CONSOLE],[*],[0])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_CONSOLE],[configuration for console (UART 0)])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[lpc24xx_plx800_*],[0])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[*_plx800_*],[0])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_1],[configuration for UART 1])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc23*],[0])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc24xx_ncs_*],[0])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc24xx_plx800_*],[0])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[*_plx800_*],[0])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_2],[configuration for UART 2])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[lpc23*],[0])

4
c/src/lib/libbsp/arm/lpc24xx/include/bspopts.h.in
View File

@@ -42,7 +42,7 @@
/* configuration for UART 3 */
#undef LPC24XX_CONFIG_UART_3
/* peripheral clock divider for default EMCCLK (EMCCLK = CCLK / EMCCLKDIV) */
/* clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV) */
#undef LPC24XX_EMCCLKDIV
/* enable ISSI IS42S32800B configuration for EMC */
@@ -81,7 +81,7 @@
/* RTC oscillator frequency in Hz */
#undef LPC24XX_OSCILLATOR_RTC
/* peripheral clock divider for default PCLK (PCLK = CCLK / PCLKDIV) */
/* clock divider for default PCLK (PCLK = CCLK / PCLKDIV) */
#undef LPC24XX_PCLKDIV
/* stop Ethernet controller at start-up to avoid DMA interference */

5
c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_plx800_ram.cfg Normal file
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@@ -0,0 +1,5 @@
#
# Config file for LPC17XX (PLX800).
#
include $(RTEMS_ROOT)/make/custom/lpc17xx.inc

5
c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_plx800_rom_int.cfg Normal file
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@@ -0,0 +1,5 @@
#
# Config file for LPC17XX (PLX800).
#
include $(RTEMS_ROOT)/make/custom/lpc17xx.inc

31
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_ram Normal file
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@@ -0,0 +1,31 @@
/**
* @file
*
* @brief Memory map for PLX800 (LPC1778).
*/
MEMORY {
ROM_INT : ORIGIN = 0x00000000, LENGTH = 512k
RAM_INT : ORIGIN = 0x10000000, LENGTH = 64k
RAM_PER : ORIGIN = 0x20000000, LENGTH = 32k
ROM_EXT : ORIGIN = 0x80000000, LENGTH = 4M
RAM_EXT : ORIGIN = 0xa0000000, LENGTH = 32M
}
REGION_ALIAS ("REGION_START", RAM_EXT);
REGION_ALIAS ("REGION_VECTOR", RAM_INT);
REGION_ALIAS ("REGION_TEXT", RAM_EXT);
REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_RODATA", RAM_EXT);
REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_DATA", RAM_EXT);
REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_BSS", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_INT);
INCLUDE linkcmds.armv7m

31
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_rom_int Normal file
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@@ -0,0 +1,31 @@
/**
* @file
*
* @brief Memory map for PLX800 (LPC1778).
*/
MEMORY {
ROM_INT : ORIGIN = 0x00000000, LENGTH = 512k
RAM_INT : ORIGIN = 0x10000000, LENGTH = 64k
RAM_PER : ORIGIN = 0x20000000, LENGTH = 32k
ROM_EXT : ORIGIN = 0x80000000, LENGTH = 4M
RAM_EXT : ORIGIN = 0xa0000000, LENGTH = 32M
}
REGION_ALIAS ("REGION_START", ROM_INT);
REGION_ALIAS ("REGION_VECTOR", RAM_INT);
REGION_ALIAS ("REGION_TEXT", ROM_INT);
REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
REGION_ALIAS ("REGION_RODATA", ROM_INT);
REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
REGION_ALIAS ("REGION_DATA", RAM_EXT);
REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
REGION_ALIAS ("REGION_BSS", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_INT);
INCLUDE linkcmds.armv7m