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bsps/powerpc: Add no cache section

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This commit is contained in:
Sebastian Huber
2012-04-24 13:34:03 +02:00
parent 13a8b19eed
commit d101853478
14 changed files with 78 additions and 89 deletions
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1
c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am
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@@ -25,6 +25,7 @@ project_lib_DATA += rtems_crti.$(OBJEXT)
# Link commands
project_lib_DATA += startup/linkcmds
dist_project_lib_DATA += ../shared/startup/linkcmds.base
dist_project_lib_DATA += startup/linkcmds.mpc55xx
dist_project_lib_DATA += startup/linkcmds.gwlcfm
dist_project_lib_DATA += startup/linkcmds.mpc5566evb
dist_project_lib_DATA += startup/linkcmds.mpc5566evb_spe

4
c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am
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@@ -57,6 +57,10 @@ $(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(d
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base
$(PROJECT_LIB)/linkcmds.mpc55xx: startup/linkcmds.mpc55xx $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc55xx
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc55xx
$(PROJECT_LIB)/linkcmds.gwlcfm: startup/linkcmds.gwlcfm $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.gwlcfm
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.gwlcfm

23
c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.gwlcfm
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@@ -1,23 +1,11 @@
MEMORY
{
ROM (RX) : ORIGIN = 0x0, LENGTH = 1536K
RAM (AIW) : ORIGIN = 0x40000000, LENGTH = 80K
MEMORY {
ROM : ORIGIN = 0x0, LENGTH = 1536K
RAM : ORIGIN = 0x40000000, LENGTH = 80K
RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
NOCACHE : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
bsp_ram_start = ORIGIN (RAM);
bsp_ram_end = ORIGIN (RAM) + LENGTH (RAM);
bsp_ram_size = LENGTH (RAM);
bsp_rom_start = ORIGIN (ROM);
bsp_rom_end = ORIGIN (ROM) + LENGTH (ROM);
bsp_rom_size = LENGTH (ROM);
bsp_external_ram_start = ORIGIN (RAM_EXT);
bsp_external_ram_end = ORIGIN (RAM_EXT) + LENGTH (RAM_EXT);
bsp_external_ram_size = LENGTH (RAM_EXT);
REGION_ALIAS ("REGION_START", ROM);
REGION_ALIAS ("REGION_FAST_TEXT", RAM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM);
@@ -33,5 +21,6 @@ REGION_ALIAS ("REGION_BSS", RAM_EXT);
REGION_ALIAS ("REGION_RWEXTRA", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_EXT);
REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
INCLUDE linkcmds.base
INCLUDE linkcmds.mpc55xx

23
c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5566evb
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@@ -1,23 +1,11 @@
MEMORY
{
ROM (RX) : ORIGIN = 0x0, LENGTH = 3M
RAM (AIW) : ORIGIN = 0x40000000, LENGTH = 128K
MEMORY {
ROM : ORIGIN = 0x0, LENGTH = 3M
RAM : ORIGIN = 0x40000000, LENGTH = 128K
RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
NOCACHE : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
bsp_ram_start = ORIGIN (RAM);
bsp_ram_end = ORIGIN (RAM) + LENGTH (RAM);
bsp_ram_size = LENGTH (RAM);
bsp_rom_start = ORIGIN (ROM);
bsp_rom_end = ORIGIN (ROM) + LENGTH (ROM);
bsp_rom_size = LENGTH (ROM);
bsp_external_ram_start = ORIGIN (RAM_EXT);
bsp_external_ram_end = ORIGIN (RAM_EXT) + LENGTH (RAM_EXT);
bsp_external_ram_size = LENGTH (RAM_EXT);
REGION_ALIAS ("REGION_START", ROM);
REGION_ALIAS ("REGION_FAST_TEXT", RAM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM);
@@ -33,5 +21,6 @@ REGION_ALIAS ("REGION_BSS", RAM_EXT);
REGION_ALIAS ("REGION_RWEXTRA", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_EXT);
REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
INCLUDE linkcmds.base
INCLUDE linkcmds.mpc55xx

13
c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx Normal file
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@@ -0,0 +1,13 @@
bsp_ram_start = ORIGIN (RAM);
bsp_ram_size = LENGTH (RAM) + LENGTH (NOCACHE);
bsp_ram_end = bsp_ram_start + bsp_ram_size;
bsp_rom_start = ORIGIN (ROM);
bsp_rom_size = LENGTH (ROM);
bsp_rom_end = bsp_rom_start + bsp_rom_size;
bsp_external_ram_start = ORIGIN (RAM_EXT);
bsp_external_ram_size = LENGTH (RAM_EXT);
bsp_external_ram_end = bsp_external_ram_start + bsp_external_ram_size;
INCLUDE linkcmds.base

23
c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674fevb
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@@ -1,23 +1,11 @@
MEMORY
{
ROM (RX) : ORIGIN = 0x0, LENGTH = 4M
RAM (AIW) : ORIGIN = 0x40000000, LENGTH = 256K
MEMORY {
ROM : ORIGIN = 0x0, LENGTH = 4M
RAM : ORIGIN = 0x40000000, LENGTH = 256K - 16k
RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
NOCACHE : ORIGIN = 0x4003c000, LENGTH = 16k
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
bsp_ram_start = ORIGIN (RAM);
bsp_ram_end = ORIGIN (RAM) + LENGTH (RAM);
bsp_ram_size = LENGTH (RAM);
bsp_rom_start = ORIGIN (ROM);
bsp_rom_end = ORIGIN (ROM) + LENGTH (ROM);
bsp_rom_size = LENGTH (ROM);
bsp_external_ram_start = ORIGIN (RAM_EXT);
bsp_external_ram_end = ORIGIN (RAM_EXT) + LENGTH (RAM_EXT);
bsp_external_ram_size = LENGTH (RAM_EXT);
REGION_ALIAS ("REGION_START", ROM);
REGION_ALIAS ("REGION_FAST_TEXT", RAM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM);
@@ -33,5 +21,6 @@ REGION_ALIAS ("REGION_BSS", RAM);
REGION_ALIAS ("REGION_RWEXTRA", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_EXT);
REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
INCLUDE linkcmds.base
INCLUDE linkcmds.mpc55xx

27
c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.phycore_mpc5554
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@@ -2,27 +2,15 @@
* Debug RAM is the top 4MB of external RAM and is swapped with the
* FLASH for development.
*/
MEMORY
{
ROM (RX) : ORIGIN = 0x00000000, LENGTH = 2M
RAM (AIW) : ORIGIN = 0x40000000, LENGTH = 64K
RAM_EXT (AIW) : ORIGIN = 0x21000000, LENGTH = 4M
DEBUG_RAM (AIW): ORIGIN = 0x21400000, LENGTH = 4M
MEMORY {
ROM : ORIGIN = 0x00000000, LENGTH = 2M
RAM : ORIGIN = 0x40000000, LENGTH = 64K
RAM_EXT : ORIGIN = 0x21000000, LENGTH = 4M
DEBUG_RAM : ORIGIN = 0x21400000, LENGTH = 4M
NOCACHE : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x00000000, LENGTH = 0
}
bsp_ram_start = ORIGIN (RAM);
bsp_ram_end = ORIGIN (RAM) + LENGTH (RAM);
bsp_ram_size = LENGTH (RAM);
bsp_rom_start = ORIGIN (ROM);
bsp_rom_end = ORIGIN (ROM) + LENGTH (ROM);
bsp_rom_size = LENGTH (ROM);
bsp_external_ram_start = ORIGIN (RAM_EXT);
bsp_external_ram_end = ORIGIN (RAM_EXT) + LENGTH (RAM_EXT);
bsp_external_ram_size = LENGTH (RAM_EXT);
bsp_debug_ram_start = ORIGIN (DEBUG_RAM);
bsp_debug_ram_end = ORIGIN (DEBUG_RAM) + LENGTH (DEBUG_RAM);
bsp_debug_ram_size = LENGTH (DEBUG_RAM);
@@ -42,5 +30,6 @@ REGION_ALIAS ("REGION_BSS", RAM_EXT);
REGION_ALIAS ("REGION_RWEXTRA", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_EXT);
REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
INCLUDE linkcmds.base
INCLUDE linkcmds.mpc55xx

13
c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.xkt564levb
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@@ -2,21 +2,15 @@ MEMORY {
ROM : ORIGIN = 0x0, LENGTH = 1M
RAM_0 : ORIGIN = 0x40000000, LENGTH = 64K
RAM_1 : ORIGIN = 0x50000000, LENGTH = 64K
RAM_EXT : ORIGIN = 0x0, LENGTH = 0
NOCACHE : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
bsp_ram_start = ORIGIN (RAM_0);
bsp_ram_size = LENGTH (RAM_0);
bsp_ram_end = bsp_ram_start + bsp_ram_size;
bsp_ram_1_start = ORIGIN (RAM_1);
bsp_ram_1_size = LENGTH (RAM_1);
bsp_ram_1_end = bsp_ram_1_start + bsp_ram_1_size;
bsp_rom_start = ORIGIN (ROM);
bsp_rom_size = LENGTH (ROM);
bsp_rom_end = bsp_rom_start + bsp_rom_size;
REGION_ALIAS ("REGION_START", ROM);
REGION_ALIAS ("REGION_FAST_TEXT", RAM_0);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM);
@@ -32,5 +26,6 @@ REGION_ALIAS ("REGION_BSS", RAM_0);
REGION_ALIAS ("REGION_RWEXTRA", RAM_0);
REGION_ALIAS ("REGION_WORK", RAM_1);
REGION_ALIAS ("REGION_STACK", RAM_1);
REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
INCLUDE linkcmds.base
INCLUDE linkcmds.mpc55xx

6
c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c
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@@ -114,7 +114,11 @@ BSP_START_TEXT_SECTION const struct MMU_tag
/* External SRAM 512k */
MPC55XX_MMU_TAG_INITIALIZER(2, 0x20000000, MPC55XX_MMU_512K, 0, 1, 1, 0),
/* Internal SRAM 256k */
MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_256K, 0, 1, 1, 0),
MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_128K, 0, 1, 1, 0),
MPC55XX_MMU_TAG_INITIALIZER(11, 0x40020000, MPC55XX_MMU_64K, 0, 1, 1, 0),
MPC55XX_MMU_TAG_INITIALIZER(12, 0x40030000, MPC55XX_MMU_32K, 0, 1, 1, 0),
MPC55XX_MMU_TAG_INITIALIZER(13, 0x40038000, MPC55XX_MMU_16K, 0, 1, 1, 0),
MPC55XX_MMU_TAG_INITIALIZER(14, 0x4003c000, MPC55XX_MMU_16K, 0, 1, 1, 1),
/* External Ethernet controller */
MPC55XX_MMU_TAG_INITIALIZER(15, 0x3fff8000, MPC55XX_MMU_64K, 0, 1, 1, 1)
#elif MPC55XX_CHIP_TYPE / 10 == 564

1
c/src/lib/libbsp/powerpc/qoriq/startup/linkcmds.qoriq_core_0
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@@ -25,6 +25,7 @@ REGION_ALIAS ("REGION_BSS", HIGH);
REGION_ALIAS ("REGION_RWEXTRA", HIGH);
REGION_ALIAS ("REGION_WORK", HIGH);
REGION_ALIAS ("REGION_STACK", HIGH);
REGION_ALIAS ("REGION_NOCACHE", HIGH);
bsp_section_robarrier_align = 0x1000000;
bsp_section_rwbarrier_align = 0x1000000;

1
c/src/lib/libbsp/powerpc/qoriq/startup/linkcmds.qoriq_core_1
View File

@@ -24,6 +24,7 @@ REGION_ALIAS ("REGION_BSS", RAM);
REGION_ALIAS ("REGION_RWEXTRA", RAM);
REGION_ALIAS ("REGION_WORK", RAM);
REGION_ALIAS ("REGION_STACK", RAM);
REGION_ALIAS ("REGION_NOCACHE", RAM);
bsp_section_robarrier_align = 0x1000000;
bsp_section_rwbarrier_align = 0x1000000;

1
c/src/lib/libbsp/powerpc/qoriq/startup/linkcmds.qoriq_p1020rdb
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@@ -25,6 +25,7 @@ REGION_ALIAS ("REGION_BSS", HIGH);
REGION_ALIAS ("REGION_RWEXTRA", HIGH);
REGION_ALIAS ("REGION_WORK", HIGH);
REGION_ALIAS ("REGION_STACK", HIGH);
REGION_ALIAS ("REGION_NOCACHE", HIGH);
bsp_section_robarrier_align = 0x1000000;
bsp_section_rwbarrier_align = 0x1000000;

8
c/src/lib/libbsp/powerpc/shared/include/linker-symbols.h
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@@ -7,7 +7,7 @@
*/
/*
* Copyright (c) 2010 embedded brains GmbH. All rights reserved.
* Copyright (c) 2010-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
@@ -95,10 +95,16 @@ LINKER_SYMBOL(bsp_section_stack_begin)
LINKER_SYMBOL(bsp_section_stack_end)
LINKER_SYMBOL(bsp_section_stack_size)
LINKER_SYMBOL(bsp_section_nocache_begin)
LINKER_SYMBOL(bsp_section_nocache_end)
LINKER_SYMBOL(bsp_section_nocache_size)
#define BSP_FAST_TEXT_SECTION __attribute__((section(".bsp_fast_text")))
#define BSP_FAST_DATA_SECTION __attribute__((section(".bsp_fast_data")))
#define BSP_NOCACHE_SECTION __attribute__((section(".bsp_nocache")))
/** @} */
#ifdef __cplusplus

9
c/src/lib/libbsp/powerpc/shared/startup/linkcmds.base
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@@ -7,7 +7,7 @@
*/
/*
* Copyright (c) 2011 embedded brains GmbH. All rights reserved.
* Copyright (c) 2011-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
@@ -324,6 +324,13 @@ SECTIONS {
} > REGION_STACK AT > REGION_STACK
bsp_section_stack_size = bsp_section_stack_end - bsp_section_stack_begin;
.nocache : {
bsp_section_nocache_begin = .;
*(.bsp_nocache)
bsp_section_nocache_end = .;
} > REGION_NOCACHE AT > REGION_NOCACHE
bsp_section_nocache_size = bsp_section_nocache_end - bsp_section_nocache_begin;
/* FIXME */
RamBase = ORIGIN (REGION_WORK);
RamSize = LENGTH (REGION_WORK);