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Add description of external interrupt request assignments.

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Eric Norum
2005-06-30 11:53:12 +00:00
parent 587e310edf
commit d0f01d2f08
1 changed files with 3 additions and 0 deletions
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c/src/lib/libbsp/m68k/uC5282/README
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@@ -177,6 +177,9 @@ x - Final 16-bit location of CS2* space is reserved for FPGA interrupt status.
Interrupt map Interrupt map
External interrupt lines (priority is fixed between 3 and 4):
IRQ7* - Ethernet Transceiver interrupts
IRQ1* - FPGA ('VME') interrupts.
+-----+-----------------------------------------------------------------------+ +-----+-----------------------------------------------------------------------+
| | PRIORITY | | | PRIORITY |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+ +-----+--------+--------+--------+--------+--------+--------+--------+--------+