forked from Imagelibrary/rtems
committed by
Kinsey Moore
parent
e1be689980
commit
cbe60cea71
@@ -1773,10 +1773,16 @@ rtems_status_code rtems_interrupt_get_priority(
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* interrupt is changed, depends on the interrupt controller. In general, you
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* interrupt is changed, depends on the interrupt controller. In general, you
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* should set the interrupt priority of an interrupt vector before a handler is
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* should set the interrupt priority of an interrupt vector before a handler is
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* installed. On some interrupt controllers, setting the priority to the
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* installed. On some interrupt controllers, setting the priority to the
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* maximum value (lowest importance) effectively disables the interrupt. On
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* maximum value (lowest importance) effectively disables the interrupt.
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* some architectures, a range of interrupt priority values may be not disabled
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*
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* by the interrupt disable directives. Handlers of such interrupts shall not
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* On some architectures, a range of interrupt priority values may be not
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* use operating system services.
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* disabled by the interrupt disable directives such as
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* rtems_interrupt_disable() and rtems_interrupt_local_disable(). These
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* interrupts are called non-maskable interrupts. Handlers of non-maskable
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* interrupts shall not use operating system services. In addition,
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* non-maskable interrupts may be not installable through
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* rtems_interrupt_entry_install() or rtems_interrupt_handler_install(), and
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* may require architecture-specific prologue and epilogue code.
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*
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*
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* The interrupt priority settings affect the maximum nesting depth while
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* The interrupt priority settings affect the maximum nesting depth while
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* servicing interrupts. The interrupt stack size calculation needs to take
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* servicing interrupts. The interrupt stack size calculation needs to take
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@@ -1812,6 +1818,9 @@ rtems_status_code rtems_interrupt_get_priority(
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* contrast to the MPIC, a higher priority value is associated with a lower
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* contrast to the MPIC, a higher priority value is associated with a lower
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* importance. The maximum priority value of 15 (mapped to the value 0 for the
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* importance. The maximum priority value of 15 (mapped to the value 0 for the
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* MPIC) inhibits signalling of this interrupt.
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* MPIC) inhibits signalling of this interrupt.
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*
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* Consult the *RTEMS CPU Architecture Supplement* and the BSP documentation in
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* the *RTEMS User Manual* for further information.
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* @endparblock
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* @endparblock
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*
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*
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* @par Constraints
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* @par Constraints
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