forked from Imagelibrary/rtems
New (CVS import Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>'s
submission).
This commit is contained in:
Ralf Corsepius
384
c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
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384
c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
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@@ -0,0 +1,384 @@
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/*===============================================================*\
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| Project: RTEMS generic MPC5200 BSP |
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+-----------------------------------------------------------------+
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| File: $File$
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+-----------------------------------------------------------------+
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| Partially based on the code references which are named below. |
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| Adaptions, modifications, enhancements and any recent parts of |
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| the code are: |
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| Copyright (c) 2005 |
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| Embedded Brains GmbH |
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| Obere Lagerstr. 30 |
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| D-82178 Puchheim |
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| Germany |
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| rtems@embedded-brains.de |
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+-----------------------------------------------------------------+
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| The license and distribution terms for this file may be |
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| found in the file LICENSE in this distribution or at |
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| |
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| http://www.rtems.com/license/LICENSE. |
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| |
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+-----------------------------------------------------------------+
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| this file contains the BSP initialization code |
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+-----------------------------------------------------------------+
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| date history ID |
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| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 01.12.05 creation doe |
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|*****************************************************************|
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|*CVS information: |
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|*(the following information is created automatically, |
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|*do not edit here) |
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|*****************************************************************|
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|* $Log$
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|* Revision 1.8 2005/12/09 08:57:03 thomas
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|* added/modifed file headers
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|*
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|* Revision 1.7 2005/12/06 14:11:12 thomas
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|* added EB file headers
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|*
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*
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|*****************************************************************|
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\*===============================================================*/
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/***********************************************************************/
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/* */
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/* Module: bspstart.c */
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/* Date: 07/17/2003 */
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/* Purpose: RTEMS MPC5x00 C level startup code */
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/* */
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/*---------------------------------------------------------------------*/
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/* */
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/* Description: This routine starts the application. It includes */
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/* application, board, and monitor specific */
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/* initialization and configuration. The generic CPU */
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/* dependent initialization has been performed before */
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/* this routine is invoked. */
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/* */
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/*---------------------------------------------------------------------*/
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/* */
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/* Code */
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/* References: MPC8260ads C level startup code */
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/* Module: bspstart.c */
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/* Project: RTEMS 4.6.0pre1 / MCF8260ads BSP */
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/* Version 1.2 */
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/* Date: 04/17/2002 */
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/* */
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/* Author(s) / Copyright(s): */
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/* */
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/* The MPC860 specific stuff was written by Jay Monkman */
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/* (jmonkman@frasca.com) */
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/* */
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/* Modified for the MPC8260ADS board by Andy Dachs */
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/* <a.dachs@sstl.co.uk> */
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/* Surrey Satellite Technology Limited, 2001 */
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/* A 40MHz system clock is assumed. */
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/* The PON. RST.CONF. Dip switches (DS1) are */
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/* 1 - Off */
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/* 2 - On */
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/* 3 - Off */
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/* 4 - On */
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/* 5 - Off */
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/* 6 - Off */
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/* 7 - Off */
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/* 8 - Off */
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/* Dip switches on DS2 and DS3 are all set to ON */
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/* The LEDs on the board are used to signal panic and fatal_error */
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/* conditions. */
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/* The mmu is unused at this time. */
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/* */
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/* COPYRIGHT (c) 1989-1999. */
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/* On-Line Applications Research Corporation (OAR). */
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/* */
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/* The license and distribution terms for this file may be */
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/* found in found in the file LICENSE in this distribution or at */
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/* http://www.OARcorp.com/rtems/license.html. */
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/* */
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/*---------------------------------------------------------------------*/
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/* */
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/* Partially based on the code references which are named above. */
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/* Adaptions, modifications, enhancements and any recent parts of */
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/* the code are under the right of */
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/* */
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/* IPR Engineering, Dachauer Stra<72>e 38, D-80335 M<>nchen */
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/* Copyright(C) 2003 */
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/* */
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/*---------------------------------------------------------------------*/
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/* */
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/* IPR Engineering makes no representation or warranties with */
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/* respect to the performance of this computer program, and */
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/* specifically disclaims any responsibility for any damages, */
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/* special or consequential, connected with the use of this program. */
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/* */
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/*---------------------------------------------------------------------*/
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/* */
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/* Version history: 1.0 */
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/* */
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/***********************************************************************/
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/*#include "../include/bsp.h"*/
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#include "../include/bsp.h"
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#include <rtems/libio.h>
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#include <rtems/libcsupport.h>
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#include <rtems/powerpc/powerpc.h>
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#include <rtems/score/thread.h>
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#include <rtems/bspIo.h>
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#include <libcpu/cpuIdent.h>
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#include <libcpu/spr.h>
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#include "../irq/irq.h"
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#include <string.h>
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#ifdef STACK_CHECKER_ON
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#include <stackchk.h>
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#endif
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#if defined(HAS_UBOOT)
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bd_t *uboot_bdinfo_ptr = (bd_t *)1; /* will be overwritten from startup code */
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bd_t uboot_bdinfo_copy; /* will be overwritten with copy of bdinfo */
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#endif
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SPR_RW(SPRG0)
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SPR_RW(SPRG1)
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/*
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* The original table from the application (in ROM) and our copy of it with
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* some changes. Configuration is defined in <confdefs.h>. Make sure that
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* our configuration tables are uninitialized so that they get allocated in
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* the .bss section (RAM).
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*/
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extern rtems_configuration_table Configuration;
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extern unsigned long intrStackPtr;
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rtems_configuration_table BSP_Configuration;
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rtems_cpu_table Cpu_table;
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char *rtems_progname;
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/*
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* Use the shared implementations of the following routines.
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* Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
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* rtems/c/src/lib/libbsp/shared/bsplibc.c.
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*/
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void bsp_postdriver_hook(void);
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void bsp_libc_init( void *, uint32_t, int );
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extern void initialize_exceptions(void);
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extern void cpu_init(void);
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void BSP_panic(char *s)
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{
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printk("%s PANIC %s\n",_RTEMS_version, s);
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__asm__ __volatile ("sc");
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}
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void _BSP_Fatal_error(unsigned int v)
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{
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printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
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__asm__ __volatile ("sc");
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}
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/*
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* Function: bsp_pretasking_hook
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* Created: 95/03/10
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*
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* Description:
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* BSP pretasking hook. Called just before drivers are initialized.
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* Used to setup libc and install any BSP extensions.
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*
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* NOTES:
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* Must not use libc (to do io) from here, since drivers are
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* not yet initialized.
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*
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*/
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void
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bsp_pretasking_hook(void)
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{
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/*
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* These are assigned addresses in the linkcmds file for the BSP. This
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* approach is better than having these defined as manifest constants and
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* compiled into the kernel, but it is still not ideal when dealing with
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* multiprocessor configuration in which each board as a different memory
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* map. A better place for defining these symbols might be the makefiles.
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* Consideration should also be given to developing an approach in which
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* the kernel and the application can be linked and burned into ROM
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* independently of each other.
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*/
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#if defined(HAS_UBOOT)
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extern unsigned char _HeapStart;
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bsp_libc_init( &_HeapStart,
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uboot_bdinfo_ptr->bi_memstart
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+ uboot_bdinfo_ptr->bi_memsize
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- (uint32_t)&_HeapStart
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, 0 );
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#else
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extern unsigned char _HeapStart;
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extern unsigned char _HeapEnd;
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bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
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#endif
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#ifdef STACK_CHECKER_ON
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/*
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* Initialize the stack bounds checker
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* We can either turn it on here or from the app.
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*/
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Stack_check_Initialize();
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#endif
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#ifdef RTEMS_DEBUG
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rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
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#endif
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}
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void bsp_predriver_hook(void)
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{
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#if 0
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init_RTC();
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init_PCI();
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initialize_universe();
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initialize_PCI_bridge ();
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#if (HAS_PMC_PSC8)
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initialize_PMC();
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#endif
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/*
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* Initialize Bsp General purpose vector table.
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*/
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initialize_external_exception_vector();
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#if (0)
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/*
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* XXX - Modify this to write a 48000000 (loop to self) command
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* to each interrupt location. This is better for debug.
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*/
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bsp_spurious_initialize();
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#endif
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#endif
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}
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void bsp_start(void)
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{
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extern void *_WorkspaceBase;
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ppc_cpu_id_t myCpu;
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ppc_cpu_revision_t myCpuRevision;
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register unsigned char* intrStack;
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/*
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* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
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* store the result in global variables so that it can be used latter...
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*/
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myCpu = get_ppc_cpu_type();
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myCpuRevision = get_ppc_cpu_revision();
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#if defined(HAS_UBOOT)
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uboot_bdinfo_copy = *uboot_bdinfo_ptr;
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uboot_bdinfo_ptr = &uboot_bdinfo_copy;
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#endif
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cpu_init();
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/*
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* Initialize some SPRG registers related to irq handling
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*/
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intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
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_write_SPRG1((unsigned int)intrStack);
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/* Signal them that this BSP has fixed PR288 - eventually, this should go away */
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_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
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/*
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* initialize the CPU table for this BSP
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*/
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Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
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Cpu_table.predriver_hook = bsp_predriver_hook; /* init PCI / RTC ... */
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Cpu_table.postdriver_hook = bsp_postdriver_hook;
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Cpu_table.clicks_per_usec = (IPB_CLOCK/1000000);
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Cpu_table.do_zero_of_workspace = TRUE;
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Cpu_table.exceptions_in_RAM = TRUE;
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if( Cpu_table.interrupt_stack_size < 4*1024 )
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Cpu_table.interrupt_stack_size = 4 * 1024;
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/*
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* Install our own set of exception vectors
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*/
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initialize_exceptions();
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/*
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* Enable instruction and data caches. Do not force writethrough mode.
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*/
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#if INSTRUCTION_CACHE_ENABLE
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rtems_cache_enable_instruction();
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#endif
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#if DATA_CACHE_ENABLE
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rtems_cache_enable_data();
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#endif
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/*
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* Allocate the memory for the RTEMS Work Space. This can come from
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* a variety of places: hard coded address, malloc'ed from outside
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* RTEMS world (e.g. simulator or primitive memory manager), or (as
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* typically done by stock BSPs) by subtracting the required amount
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* of work space from the last physical address on the CPU board.
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*/
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/*
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* Need to "allocate" the memory for the RTEMS Workspace and
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* tell the RTEMS configuration where it is. This memory is
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* not malloc'ed. It is just "pulled from the air".
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*/
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BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
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/*
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BSP_Configuration.microseconds_per_tick = 1000;
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*/
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/*
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* Initalize RTEMS IRQ system
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*/
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BSP_rtems_irq_mng_init(0);
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Exit from bspstart\n");
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#endif
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}
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/*
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*
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* _Thread_Idle_body
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*
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* Replaces the one in c/src/exec/score/src/threadidlebody.c
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* The MSR[POW] bit is set to put the CPU into the low power mode
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* defined in HID0. HID0 is set during starup in start.S.
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*
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*/
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Thread _Thread_Idle_body(uint32_t ignored )
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{
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for(;;)
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{
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asm volatile("mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0");
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}
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return 0;
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}
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