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2009-05-25 Allan Hessenflow <allanh@kallisti.com>

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PR 1418/cpukit
	* rtems/score/cpu.h: corrected _CPU_ISR_Flash implementation, added
	core synchronization after all cli/sti.
This commit is contained in:
Joel Sherrill
2009-05-27 12:01:59 +00:00
parent 31099c7dfe
commit c7935a4a2a
2 changed files with 11 additions and 5 deletions
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6
cpukit/score/cpu/bfin/ChangeLog
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@@ -1,3 +1,9 @@
2009-05-25 Allan Hessenflow <allanh@kallisti.com>
PR 1418/cpukit
* rtems/score/cpu.h: corrected _CPU_ISR_Flash implementation, added
core synchronization after all cli/sti.
2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1385/cpukit

10
cpukit/score/cpu/bfin/rtems/score/cpu.h
View File

@@ -727,7 +727,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
*/
#define _CPU_ISR_Disable( _level ) \
{ \
asm volatile ("cli %0 \n" : "=d" (_level) ); \
asm volatile ("cli %0; csync \n" : "=d" (_level) ); \
}
@@ -744,7 +744,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
* XXX document implementation including references if appropriate
*/
#define _CPU_ISR_Enable( _level ) { \
__asm__ __volatile__ ("sti %0 \n" : : "d" (_level) ); \
__asm__ __volatile__ ("sti %0; csync \n" : : "d" (_level) ); \
}
/**
@@ -761,8 +761,8 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
* XXX document implementation including references if appropriate
*/
#define _CPU_ISR_Flash( _level ) { \
__asm__ __volatile__ ("sti %0; ssync; sti %1" \
: : "d"(0xffff), "d"(_level)); \
__asm__ __volatile__ ("sti %0; csync; cli r0; csync" \
: : "d"(_level) : "R0" ); \
}
/**
@@ -784,7 +784,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
*/
#define _CPU_ISR_Set_level( _new_level ) \
{ \
__asm__ __volatile__ ( "sti %0" : : "d"(_new_level ? 0 : 0xffff) ); \
__asm__ __volatile__ ( "sti %0; csync" : : "d"(_new_level ? 0 : 0xffff) ); \
}