forked from Imagelibrary/rtems
2008-09-14 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, configure.ac, startup/bspstart.c: Create bsp_get_work_area() into its own file and use BSP Framework to perform more initialization. * startup/bspgetworkarea.c: New file.
This commit is contained in:
@@ -1,3 +1,10 @@
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2008-09-14 Joel Sherrill <joel.sherrill@oarcorp.com>
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* Makefile.am, configure.ac, startup/bspstart.c: Create
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bsp_get_work_area() into its own file and use BSP Framework to
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perform more initialization.
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* startup/bspgetworkarea.c: New file.
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2008-09-06 Ralf Corsépius <ralf.corsepius@rtems.org>
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2008-09-06 Ralf Corsépius <ralf.corsepius@rtems.org>
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* startup/bspstart.c: Convert to "bool".
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* startup/bspstart.c: Convert to "bool".
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@@ -30,7 +30,8 @@ dist_project_lib_DATA += startup/linkcmds
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startup_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
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startup_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
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../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
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../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
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../../shared/sbrk.c \
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../../shared/bsppredriverhook.c startup/bspgetworkarea.c \
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../../shared/bsppretaskinghook.c ../../shared/sbrk.c \
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../../shared/gnatinstallhandler.c
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../../shared/gnatinstallhandler.c
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dlentry_SOURCES = dlentry/dlentry.S
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dlentry_SOURCES = dlentry/dlentry.S
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@@ -31,6 +31,7 @@ RTEMS_BSPOPTS_HELP([PPC_VECTOR_FILE_BASE],
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[This defines the base address of the exception table.
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[This defines the base address of the exception table.
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NOTE: Vectors are actually at 0xFFF00000 but file starts at offset.])
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NOTE: Vectors are actually at 0xFFF00000 but file starts at offset.])
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RTEMS_BSP_BOOTCARD_HANDLES_RAM_ALLOCATION
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# Explicitly list all Makefiles here
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# Explicitly list all Makefiles here
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AC_CONFIG_FILES([Makefile])
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AC_CONFIG_FILES([Makefile])
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37
c/src/lib/libbsp/powerpc/haleakala/startup/bspgetworkarea.c
Normal file
37
c/src/lib/libbsp/powerpc/haleakala/startup/bspgetworkarea.c
Normal file
@@ -0,0 +1,37 @@
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/*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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#include <bsp.h>
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#include <bsp/bootcard.h>
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#include <stdint.h>
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extern void *_WorkspaceStart;
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extern void *_RAMEnd;
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/*
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* This method returns the base address and size of the area which
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* is to be allocated between the RTEMS Workspace and the C Program
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* Heap.
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*/
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void bsp_get_work_area(
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void **work_area_start,
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size_t *work_area_size,
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void **heap_start,
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size_t *heap_size
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)
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{
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uintptr_t size;
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size = (uintptr_t)&_RAMEnd - (uintptr_t)&_WorkspaceStart;
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*work_area_start = (void *)&_WorkspaceStart;
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*work_area_size = size;
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*heap_start = BSP_BOOTCARD_HEAP_USES_WORK_AREA;
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*heap_size = BSP_BOOTCARD_HEAP_SIZE_DEFAULT;
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}
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@@ -9,7 +9,7 @@
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*
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*
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* OUTPUT: NONE
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* OUTPUT: NONE
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*
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*
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* Author: Thomas Doerfler <td@imd.m.isar.de>
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* Author: Thomas Doerfler <td@imd.m.isar.de>
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* IMD Ingenieurbuero fuer Microcomputertechnik
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* IMD Ingenieurbuero fuer Microcomputertechnik
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*
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*
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* COPYRIGHT (c) 1998 by IMD
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* COPYRIGHT (c) 1998 by IMD
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@@ -17,7 +17,7 @@
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* Changes from IMD are covered by the original distributions terms.
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* Changes from IMD are covered by the original distributions terms.
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* This file has been derived from the papyrus BSP:
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* This file has been derived from the papyrus BSP:
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*
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*
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* Author: Andrew Bray <andy@i-cubed.co.uk>
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* Author: Andrew Bray <andy@i-cubed.co.uk>
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*
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*
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* COPYRIGHT (c) 1995 by i-cubed ltd.
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* COPYRIGHT (c) 1995 by i-cubed ltd.
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*
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*
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@@ -63,8 +63,6 @@
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#include <bsp.h>
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#include <bsp.h>
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#include <bsp/uart.h>
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#include <bsp/uart.h>
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#include <rtems/libio.h>
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#include <rtems/libcsupport.h>
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#include <bsp/irq.h>
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#include <bsp/irq.h>
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#include <rtems/bspIo.h>
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#include <rtems/bspIo.h>
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#include <libcpu/cpuIdent.h>
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#include <libcpu/cpuIdent.h>
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@@ -80,125 +78,72 @@
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*/
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*/
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/* Expected by clock.c */
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/* Expected by clock.c */
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uint32_t bsp_clicks_per_usec;
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uint32_t bsp_clicks_per_usec;
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bool bsp_timer_internal_clock; /* true, when timer runs with CPU clk */
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bool bsp_timer_internal_clock; /* true, when timer runs with CPU clk */
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uint32_t bsp_timer_least_valid;
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uint32_t bsp_timer_least_valid;
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uint32_t bsp_timer_average_overhead;
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uint32_t bsp_timer_average_overhead;
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/* Initialize whatever libc we are using
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* called from postdriver hook
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*/
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void bsp_postdriver_hook(void);
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void bsp_libc_init( void *, uint32_t, int );
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/*
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*
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* bsp_predriver_hook
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*
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* Before drivers are setup.
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*/
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void bsp_predriver_hook(void)
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{
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}
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/*
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* Function: bsp_pretasking_hook
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* Created: 95/03/10
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*
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* Description:
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* BSP pretasking hook. Called just before drivers are initialized.
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* Used to setup libc and install any BSP extensions.
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*
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* NOTES:
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* Must not use libc (to do io) from here, since drivers are
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* not yet initialized.
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*
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*/
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extern uint8_t _RAMEnd; /* Defined in linkcmds */
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void bsp_pretasking_hook(void)
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/* Initialise libc with the address and size of the heap, which runs
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from the end of the RTEMS workspace to the top of RAM */
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{
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uint32_t heap_start;
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heap_start = ( (uint32_t)Configuration.work_space_start +
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rtems_configuration_get_work_space_size() );
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bsp_libc_init((void *)heap_start, (uint32_t)(&_RAMEnd) - heap_start, 0);
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#ifdef RTEMS_DEBUG
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rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
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#endif
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}
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/*-------------------- Haleakala-specific UART setup -------------------------*/
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/*-------------------- Haleakala-specific UART setup -------------------------*/
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static void
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static void
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EarlyUARTInit(int baudRate)
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EarlyUARTInit(int baudRate)
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{
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{
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uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
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uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
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int divider = BSP_UART_BAUD_BASE / baudRate;
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int divider = BSP_UART_BAUD_BASE / baudRate;
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up[LCR] = DLAB; /* Access DLM/DLL */
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up[LCR] = DLAB; /* Access DLM/DLL */
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up[DLL] = divider & 0x0FF;
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up[DLL] = divider & 0x0FF;
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up[DLM] = divider >> 8;
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up[DLM] = divider >> 8;
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up[LCR] = CHR_8_BITS;
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up[LCR] = CHR_8_BITS;
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up[MCR] = DTR | RTS;
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up[MCR] = DTR | RTS;
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up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
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up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
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up[THR] = '+';
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up[THR] = '+';
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}
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}
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static void
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static void
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InitUARTClock(void)
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InitUARTClock(void)
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{
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{
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uint32_t reg;
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uint32_t reg;
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mfsdr(SDR0_UART0,reg);
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mfsdr(SDR0_UART0,reg);
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reg &= ~0x008000FF;
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reg &= ~0x008000FF;
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reg |= 0x00800001; /* Ext clock, div 1 */
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reg |= 0x00800001; /* Ext clock, div 1 */
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mtsdr(SDR0_UART0,reg);
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mtsdr(SDR0_UART0,reg);
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}
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}
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void GPIO_AlternateSelect(int bitnum, int source)
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void GPIO_AlternateSelect(int bitnum, int source)
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/* PPC405EX: select a GPIO function for the specified pin */
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/* PPC405EX: select a GPIO function for the specified pin */
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{
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{
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int shift;
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int shift;
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unsigned long value, mask;
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unsigned long value, mask;
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GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
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GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
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shift = (31 - bitnum) & 0xF;
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shift = (31 - bitnum) & 0xF;
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value = (source & 3) << (shift*2);
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value = (source & 3) << (shift*2);
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mask = 3 << (shift*2);
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mask = 3 << (shift*2);
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if (bitnum <= 15) {
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if (bitnum <= 15) {
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gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
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gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
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gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
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gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
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} else {
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} else {
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gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
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gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
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gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
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gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
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}
|
}
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}
|
}
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|
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void Init_FPGA(void)
|
void Init_FPGA(void)
|
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{
|
{
|
||||||
/* Have to write to the FPGA to enable the UART drivers */
|
/* Have to write to the FPGA to enable the UART drivers */
|
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/* Have to enable CS2 as an output in GPIO to get the FPGA working */
|
/* Have to enable CS2 as an output in GPIO to get the FPGA working */
|
||||||
mtebc(EBC0_B2CR,0xF0018000); /* Set up CS2 at 0xF0000000 */
|
mtebc(EBC0_B2CR,0xF0018000); /* Set up CS2 at 0xF0000000 */
|
||||||
mtebc(EBC0_B2AP,0x9400C800);
|
mtebc(EBC0_B2AP,0x9400C800);
|
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GPIO_AlternateSelect(9,1); /* GPIO9 = PerCS2 */
|
GPIO_AlternateSelect(9,1); /* GPIO9 = PerCS2 */
|
||||||
{
|
{
|
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unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
|
unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
|
||||||
unsigned long n;
|
unsigned long n;
|
||||||
n = *(fpgaPtr);
|
n = *(fpgaPtr);
|
||||||
n &= ~0x00100; /* User LEDs on */
|
n &= ~0x00100; /* User LEDs on */
|
||||||
n |= 0x30000; /* UART 0 and 1 transcievers on! */
|
n |= 0x30000; /* UART 0 and 1 transcievers on! */
|
||||||
*fpgaPtr = n;
|
*fpgaPtr = n;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/*===================================================================*/
|
/*===================================================================*/
|
||||||
@@ -206,17 +151,16 @@ void Init_FPGA(void)
|
|||||||
static void
|
static void
|
||||||
DirectUARTWrite(const char c)
|
DirectUARTWrite(const char c)
|
||||||
{
|
{
|
||||||
uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
|
uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
|
||||||
while ((up[LSR] & THRE) == 0) { ; }
|
while ((up[LSR] & THRE) == 0) { ; }
|
||||||
up[THR] = c;
|
up[THR] = c;
|
||||||
if (c=='\n')
|
if (c=='\n')
|
||||||
DirectUARTWrite('\r');
|
DirectUARTWrite('\r');
|
||||||
}
|
}
|
||||||
|
|
||||||
/* We will provide our own printk output function as it may get used early */
|
/* We will provide our own printk output function as it may get used early */
|
||||||
BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
|
BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
|
||||||
|
|
||||||
|
|
||||||
/*===================================================================*/
|
/*===================================================================*/
|
||||||
|
|
||||||
|
|
||||||
@@ -225,66 +169,51 @@ BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
|
|||||||
*
|
*
|
||||||
* This routine does the bulk of the system initialization.
|
* This routine does the bulk of the system initialization.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
void bsp_start( void )
|
void bsp_start( void )
|
||||||
{
|
{
|
||||||
LINKER_SYMBOL(intrStack_start);
|
LINKER_SYMBOL(intrStack_start);
|
||||||
LINKER_SYMBOL(intrStack_size);
|
LINKER_SYMBOL(intrStack_size);
|
||||||
ppc_cpu_id_t myCpu;
|
ppc_cpu_id_t myCpu;
|
||||||
ppc_cpu_revision_t myCpuRevision;
|
ppc_cpu_revision_t myCpuRevision;
|
||||||
|
|
||||||
/* Get the UART clock initialized first in case we call printk */
|
/* Get the UART clock initialized first in case we call printk */
|
||||||
|
|
||||||
InitUARTClock();
|
InitUARTClock();
|
||||||
Init_FPGA();
|
Init_FPGA();
|
||||||
EarlyUARTInit(115200);
|
EarlyUARTInit(115200);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
|
* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
|
||||||
* function store the result in global variables
|
* function store the result in global variables
|
||||||
* so that it can be used later...
|
* so that it can be used later...
|
||||||
*/
|
*/
|
||||||
myCpu = get_ppc_cpu_type();
|
myCpu = get_ppc_cpu_type();
|
||||||
myCpuRevision = get_ppc_cpu_revision();
|
myCpuRevision = get_ppc_cpu_revision();
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* initialize the device driver parameters
|
* initialize the device driver parameters
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Set globals visible to clock.c */
|
/* Set globals visible to clock.c */
|
||||||
bsp_clicks_per_usec = 400; /* timebase register ticks/microsecond = CPU Clk in MHz */
|
/* timebase register ticks/microsecond = CPU Clk in MHz */
|
||||||
bsp_timer_internal_clock = TRUE;
|
bsp_clicks_per_usec = 400;
|
||||||
bsp_timer_average_overhead = 2;
|
|
||||||
bsp_timer_least_valid = 3;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Initialize default raw exception handlers.
|
|
||||||
*/
|
|
||||||
ppc_exc_initialize(
|
|
||||||
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
|
|
||||||
(uint32_t) intrStack_start,
|
|
||||||
(uint32_t) intrStack_size);
|
|
||||||
|
|
||||||
/*
|
bsp_timer_internal_clock = TRUE;
|
||||||
* Install our own set of exception vectors
|
bsp_timer_average_overhead = 2;
|
||||||
*/
|
bsp_timer_least_valid = 3;
|
||||||
BSP_rtems_irq_mng_init(0);
|
|
||||||
|
/*
|
||||||
/*
|
* Initialize default raw exception handlers.
|
||||||
* Allocate the memory for the RTEMS Work Space. This can come from
|
*/
|
||||||
* a variety of places: hard coded address, malloc'ed from outside
|
ppc_exc_initialize(
|
||||||
* RTEMS world (e.g. simulator or primitive memory manager), or (as
|
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
|
||||||
* typically done by stock BSPs) by subtracting the required amount
|
(uint32_t) intrStack_start,
|
||||||
* of work space from the last physical address on the CPU board.
|
(uint32_t) intrStack_size);
|
||||||
*/
|
|
||||||
/* In this case we allocate space at an address defined in linkcmds
|
|
||||||
which points to a block above the stack and below the heap */
|
|
||||||
{
|
|
||||||
extern uint8_t _WorkspaceStart;
|
|
||||||
Configuration.work_space_start = &_WorkspaceStart;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Install our own set of exception vectors
|
||||||
|
*/
|
||||||
|
BSP_rtems_irq_mng_init(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void BSP_ask_for_reset(void)
|
void BSP_ask_for_reset(void)
|
||||||
@@ -304,5 +233,3 @@ void _BSP_Fatal_error(unsigned int v)
|
|||||||
printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
|
printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
|
||||||
BSP_ask_for_reset();
|
BSP_ask_for_reset();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user