forked from Imagelibrary/rtems
bsps/powerpc: Add cache size functions
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@@ -25,6 +25,52 @@
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#define CPU_INSTRUCTION_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
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#endif
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#define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
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static inline size_t _CPU_cache_get_data_cache_size(uint32_t level)
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{
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switch (level) {
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case 0:
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/* Fall through */
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#ifdef PPC_CACHE_DATA_L3_SIZE
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case 3:
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return PPC_CACHE_DATA_L3_SIZE;
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#endif
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#ifdef PPC_CACHE_DATA_L2_SIZE
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case 2:
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return PPC_CACHE_DATA_L2_SIZE;
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#endif
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#ifdef PPC_CACHE_DATA_L1_SIZE
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case 1:
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return PPC_CACHE_DATA_L1_SIZE;
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#endif
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default:
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return 0;
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}
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}
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static inline size_t _CPU_cache_get_instruction_cache_size(uint32_t level)
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{
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switch (level) {
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case 0:
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/* Fall through */
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#ifdef PPC_CACHE_INSTRUCTION_L3_SIZE
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case 3:
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return PPC_CACHE_INSTRUCTION_L3_SIZE;
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#endif
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#ifdef PPC_CACHE_INSTRUCTION_L2_SIZE
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case 2:
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return PPC_CACHE_INSTRUCTION_L2_SIZE;
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#endif
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#ifdef PPC_CACHE_INSTRUCTION_L1_SIZE
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case 1:
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return PPC_CACHE_INSTRUCTION_L1_SIZE;
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#endif
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default:
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return 0;
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}
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}
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/*
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* CACHE MANAGER: The following functions are CPU-specific.
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* They provide the basic implementation for the rtems_* cache
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