m68k/gen68340: Fix warnings

This commit is contained in:
Joel Sherrill
2014-10-14 09:34:52 -05:00
parent 3785ed6c26
commit c28f5033e5
6 changed files with 522 additions and 569 deletions

View File

@@ -1,6 +1,8 @@
/*
* 68340/68349 console serial I/O.
*
*/
/*
* Author:
* Geoffroy Montel
* France Telecom - CNET/DSM/TAM/CAT
@@ -295,9 +297,8 @@ dbugInitialise (void)
if (USE_INTERRUPTS_A) {
rtems_isr_entry old_handler;
rtems_status_code sc;
sc = rtems_interrupt_catch (InterruptHandler,
(void) rtems_interrupt_catch (InterruptHandler,
CONSOLE_VECTOR,
&old_handler);
@@ -379,9 +380,8 @@ dbugInitialise (void)
if ((USE_INTERRUPTS_B && !(CHANNEL_ENABLED_A))
|| (USE_INTERRUPTS_B && CHANNEL_ENABLED_A && !USE_INTERRUPTS_A)) {
rtems_isr_entry old_handler;
rtems_status_code sc;
sc = rtems_interrupt_catch (InterruptHandler,
(void) rtems_interrupt_catch (InterruptHandler,
CONSOLE_VECTOR,
&old_handler);

View File

@@ -1,6 +1,8 @@
/*
* M68340/349 uart management tools
*
* M68340/349 UART management tools
*/
/*
* Author:
* Geoffroy Montel
* France Telecom - CNET/DSM/TAM/CAT
@@ -32,23 +34,23 @@
look at Motorola's MC68340 Integrated Processor User's Manual
page 7-30 for more infos */
float m340_Baud_Rates_Table[16][2] = {\
{ 50, 75 }, \
{ 110, 110 }, \
{ 134.5, 134.5 }, \
{ 200, 150 }, \
{ 300, 300 }, \
{ 600, 600 }, \
{ 1200, 1200 }, \
{ 1050, 2000 }, \
{ 2400, 2400 }, \
{ 4800, 4800 }, \
{ 7200, 1800 }, \
{ 9600, 9600 }, \
{ 38400, 19200 }, \
{ 76800, 38400 }, \
{ SCLK/16, SCLK/16}, \
{ SCLK, SCLK }, \
float m340_Baud_Rates_Table[16][2] = {
{ 50, 75 },
{ 110, 110 },
{ 134.5, 134.5 },
{ 200, 150 },
{ 300, 300 },
{ 600, 600 },
{ 1200, 1200 },
{ 1050, 2000 },
{ 2400, 2400 },
{ 4800, 4800 },
{ 7200, 1800 },
{ 9600, 9600 },
{ 38400, 19200 },
{ 76800, 38400 },
{ SCLK/16, SCLK/16},
{ SCLK, SCLK },
};
/* config on both 340 channels */
@@ -123,10 +125,14 @@ void Init_UART_Table(void)
two correct configs for this:
RCS=11, TCS=11, Set=1 or 2
*****************************************************/
t_baud_speed_table
Find_Right_m340_UART_Channel_Config(float ReceiverBaudRate, float TransmitterBaudRate)
static t_baud_speed_table
Find_Right_m340_UART_Channel_Config(
float ReceiverBaudRate,
float TransmitterBaudRate
)
{
t_baud_speed_table return_value;
int i,j;
struct {
int cs;
@@ -136,39 +142,50 @@ Find_Right_m340_UART_Channel_Config(float ReceiverBaudRate, float TransmitterBau
int Receiver_nb_of_config = 0;
int Transmitter_nb_of_config = 0;
int i,j;
/* Receiver and Transmitter baud rates must be compatible, ie in the
* same set.
*/
/* Receiver and Transmitter baud rates must be compatible, ie in the same set */
/* search for configurations for ReceiverBaudRate - there can't be more than two (only two sets) */
for (i=0;i<16;i++)
for (j=0;j<2;j++)
/* search for configurations for ReceiverBaudRate
* there can't be more than two (only two sets).
*/
for (i=0;i<16;i++) {
for (j=0;j<2;j++) {
if (m340_Baud_Rates_Table[i][j]==ReceiverBaudRate) {
Receiver[Receiver_nb_of_config].cs=i;
Receiver[Receiver_nb_of_config].set=j;
Receiver_nb_of_config++;
}
}
}
/* search for configurations for TransmitterBaudRate - there can't be more than two (only two sets) */
for (i=0;i<16;i++)
for (j=0;j<2;j++)
/* search for configurations for TransmitterBaudRate
* there can't be more than two (only two sets)
*/
for (i=0;i<16;i++) {
for (j=0;j<2;j++) {
if (m340_Baud_Rates_Table[i][j]==TransmitterBaudRate) {
Transmitter[Transmitter_nb_of_config].cs=i;
Transmitter[Transmitter_nb_of_config].set=j;
Transmitter_nb_of_config++;
}
}
}
/* now check if there's a compatible config */
return_value.nb=0;
for (i=0; i<Receiver_nb_of_config; i++)
for (j=0;j<Transmitter_nb_of_config;j++)
for (i=0; i<Receiver_nb_of_config; i++) {
for (j=0;j<Transmitter_nb_of_config;j++) {
if (Receiver[i].set == Transmitter[j].set) {
return_value.baud_speed_table[return_value.nb].set = Receiver[i].set + 1; /* we want set 1 or set 2, not 0 or 1 */
return_value.baud_speed_table[return_value.nb].set = Receiver[i].set + 1;
/* we want set 1 or set 2, not 0 or 1 */
return_value.baud_speed_table[return_value.nb].rcs = Receiver[i].cs;
return_value.baud_speed_table[return_value.nb].tcs = Transmitter[j].cs;
return_value.nb++;
}
}
}
return return_value;
}
@@ -189,8 +206,14 @@ Find_Right_m340_UART_Channel_Config(float ReceiverBaudRate, float TransmitterBau
needs set 2)
*****************************************************/
t_baud_speed_table
Find_Right_m340_UART_Config(float ChannelA_ReceiverBaudRate, float ChannelA_TransmitterBaudRate, uint8_t enableA,
float ChannelB_ReceiverBaudRate, float ChannelB_TransmitterBaudRate, uint8_t enableB)
Find_Right_m340_UART_Config(
float ChannelA_ReceiverBaudRate,
float ChannelA_TransmitterBaudRate,
uint8_t enableA,
float ChannelB_ReceiverBaudRate,
float ChannelB_TransmitterBaudRate,
uint8_t enableB
)
{
t_baud_speed_table tableA, tableB;
t_baud_speed_table return_value, tmp;
@@ -200,31 +223,43 @@ Find_Right_m340_UART_Config(float ChannelA_ReceiverBaudRate, float ChannelA_Tran
return_value.nb=0;
if (enableA && enableB) {
tableA = Find_Right_m340_UART_Channel_Config(ChannelA_ReceiverBaudRate, ChannelA_TransmitterBaudRate);
tableB = Find_Right_m340_UART_Channel_Config(ChannelB_ReceiverBaudRate, ChannelB_TransmitterBaudRate);
tableA = Find_Right_m340_UART_Channel_Config(
ChannelA_ReceiverBaudRate, ChannelA_TransmitterBaudRate);
tableB = Find_Right_m340_UART_Channel_Config(
ChannelB_ReceiverBaudRate, ChannelB_TransmitterBaudRate);
for (i=0;i<tableA.nb;i++)
for (j=0;j<tableB.nb;j++)
for (i=0;i<tableA.nb;i++) {
for (j=0;j<tableB.nb;j++) {
if (tableA.baud_speed_table[i].set==tableB.baud_speed_table[j].set) {
return_value.baud_speed_table[UART_CHANNEL_A].set=tableA.baud_speed_table[i].set;
return_value.baud_speed_table[UART_CHANNEL_A].rcs=tableA.baud_speed_table[i].rcs;
return_value.baud_speed_table[UART_CHANNEL_A].tcs=tableA.baud_speed_table[i].tcs;
return_value.baud_speed_table[UART_CHANNEL_B].set=tableB.baud_speed_table[j].set;
return_value.baud_speed_table[UART_CHANNEL_B].rcs=tableB.baud_speed_table[j].rcs;
return_value.baud_speed_table[UART_CHANNEL_B].tcs=tableB.baud_speed_table[j].tcs;
return_value.baud_speed_table[UART_CHANNEL_A].set =
tableA.baud_speed_table[i].set;
return_value.baud_speed_table[UART_CHANNEL_A].rcs =
tableA.baud_speed_table[i].rcs;
return_value.baud_speed_table[UART_CHANNEL_A].tcs =
tableA.baud_speed_table[i].tcs;
return_value.baud_speed_table[UART_CHANNEL_B].set =
tableB.baud_speed_table[j].set;
return_value.baud_speed_table[UART_CHANNEL_B].rcs =
tableB.baud_speed_table[j].rcs;
return_value.baud_speed_table[UART_CHANNEL_B].tcs =
tableB.baud_speed_table[j].tcs;
return_value.nb=2;
break;
}
}
}
return return_value;
}
if (enableA) {
return_value = Find_Right_m340_UART_Channel_Config(ChannelA_ReceiverBaudRate, ChannelA_TransmitterBaudRate);
return_value = Find_Right_m340_UART_Channel_Config(
ChannelA_ReceiverBaudRate, ChannelA_TransmitterBaudRate);
return return_value;
}
if (enableB) {
tmp = Find_Right_m340_UART_Channel_Config(ChannelB_ReceiverBaudRate, ChannelB_TransmitterBaudRate);
tmp = Find_Right_m340_UART_Channel_Config(
ChannelB_ReceiverBaudRate, ChannelB_TransmitterBaudRate);
if (tmp.nb!=0) {
return_value.nb = 2;
return_value.baud_speed_table[1].set = tmp.baud_speed_table[0].set;
@@ -235,12 +270,10 @@ Find_Right_m340_UART_Config(float ChannelA_ReceiverBaudRate, float ChannelA_Tran
return return_value;
}
/****************************************************************************************************/
/*
* very low level fmted output
*/
extern void dbug_out_char( int minor, int ch );
extern int dbug_in_char( int minor );
extern int dbug_char_present( int minor );
@@ -276,96 +309,3 @@ ssize_t dbugWrite (int minor, const char *buf, size_t len)
return retval;
}
static void fmt_num( int minor, unsigned long, unsigned );
static void fmt_str( int minor, const char* );
/******************************************************
Name: RAW_GETC
Input parameters: channel, buffer and its length
Output parameters:
Description: a light blocking "getc"
*****************************************************/
char RAW_GETC(int minor)
{
while (!dbug_char_present(minor)) continue;
return dbug_in_char(minor);
}
/******************************************************
Name: RAW_FMT
Input parameters: channel, buffer and its length
Output parameters: always successfull
Description: a light polled "printf"
useful when there's a serious pb and
there are no more interrupts
*****************************************************/
void RAW_FMT( int minor, const char* fmt, ... )
{
int ch;
va_list va;
va_start( va, fmt );
while( (ch = *fmt++) )
if( ch != '%' || (ch = *fmt++) == '%' )
{
if( ch == '\n' )
dbug_out_char( minor, '\r' );
dbug_out_char( minor, ch );
}
else switch( ch )
{
case 'c':
dbug_out_char( minor, va_arg( va, int ) );
continue;
case 's':
fmt_str( minor, va_arg( va, char* ) );
continue;
case 'd':
ch = va_arg( va, int );
if( ch >= 0 )
fmt_num( minor, ch, 10 );
else
{
dbug_out_char( minor, '-' );
fmt_num( minor, -ch, 10 );
}
continue;
case 'u':
fmt_num( minor, va_arg( va, unsigned ), 10 );
continue;
case 'o':
fmt_num( minor, va_arg( va, unsigned ), 8 );
continue;
case 'x':
case 'p':
fmt_num( minor, va_arg( va, unsigned ), 16 );
continue;
default: continue;
return;
}
va_end( va );
}
static void fmt_num( int minor, unsigned long num, unsigned base )
{
char buf[33];
int ib = sizeof(buf);
buf[--ib] = 0;
do
{
buf[--ib] = "0123456789ABCDEF"[num%base];
num /= base;
}
while( num != 0 );
fmt_str( minor, buf+ib );
}
static void fmt_str( int minor, const char* str )
{
if( str )
while( *str )
dbug_out_char( minor, *str++ );
}

View File

@@ -26,6 +26,8 @@
#ifndef _BSP_H
#define _BSP_H
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
@@ -60,8 +62,23 @@ rtems_isr_entry set_vector(
int type
);
/*
* Methods used across files inside the BSP
*/
int dbug_in_char( int minor );
void dbug_out_char( int minor, int ch );
int dbug_char_present( int minor );
void _dbug_dumpanic(void);
/*
* Only called from .S but prototyped here to capture the dependecy.
*/
void _Init68340 (void);
#ifdef __cplusplus
}
#endif
#endif /* !ASM */
#endif

View File

@@ -3,7 +3,9 @@
* The name of this entry point is compiler dependent.
* It jumps to the BSP which is responsible for performing
* all initialization.
*
*/
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
@@ -26,7 +28,10 @@
#include <rtems/asm.h>
#include <m68349.inc>
#define _OLD_ASTECC 1 /* old addresses for AST68340 only, undefine for AST68349 */
#include <bsp.h> /* to indicate dependencies */
/* old addresses for AST68340 only, undefine for AST68349 */
#define _OLD_ASTECC 1
BEGIN_CODE
/*

View File

@@ -1,6 +1,8 @@
/*
* M68340/349 registers and stack dump if an exception is raised
*
*/
/*
* Author:
* Pascal Cadic
* France Telecom - CNET/DSM/TAM/CAT
@@ -16,10 +18,10 @@
* http://www.rtems.org/license/LICENSE.
*/
#include <stdio.h>
#include <bsp.h>
#include <rtems/bspIo.h>
const char *exceptionName[] =
{
const char *exceptionName[] = {
"INITIAL STACK POINTER",
"INITIAL PROGRAM COUNTER",
"BUS ERROR",
@@ -96,9 +98,6 @@ typedef struct {
boot_panic_registers_t _boot_panic_registers;
extern void RAW_FMT( int minor, const char* fmt, ... );
extern char RAW_GETC(int minor);
/******************************************************
Name: _dbug_dump
Input parameters: sr, pc, stack pointer,
@@ -106,16 +105,21 @@ extern char RAW_GETC(int minor);
Output parameters: -
Description: display the supervisor stack
*****************************************************/
void _dbug_dump(unsigned short sr, void* pc, unsigned short *stack, int size)
static void _dbug_dump(
unsigned short sr,
void* pc,
unsigned short *stack,
int size
)
{
int i;
int i;
RAW_FMT(0,"%x : %x \t%x",0,sr,(unsigned short)(((unsigned)pc)>>16));
printk(0,"%x : %x \t%x",0,sr,(unsigned short)(((unsigned)pc)>>16));
for (i=2; i<size; i++) {
if ((i%8)==0) RAW_FMT(0,"\n%x :",i/8);
RAW_FMT(0," %x\t",stack[i-2]);
if ((i%8)==0) printk(0,"\n%x :",i/8);
printk(0," %x\t",stack[i-2]);
}
RAW_FMT(0,"\n");
printk(0,"\n");
}
/******************************************************
@@ -142,45 +146,45 @@ void _dbug_dumpanic(void)
vector = (_boot_panic_registers.format_id&0x0FFF)>>2;
frametype = (_boot_panic_registers.format_id&0xF000)>>12;
RAW_FMT(0,"\n---------------------------------------------\n");
printk(0,"\n---------------------------------------------\n");
if (vector<64)
RAW_FMT(0,"%s",exceptionName[vector]);
printk(0,"%s",exceptionName[vector]);
else {
RAW_FMT(0,"RESERVED USER");
printk(0,"RESERVED USER");
}
RAW_FMT(0," exception (vector %x, type %x)\n",vector,frametype);
RAW_FMT(0,"---------------------------------------------\n");
RAW_FMT(0,"PC : 0x%x ",pc);
RAW_FMT(0,"A7 : 0x%x ",_boot_panic_registers.a7);
RAW_FMT(0,"SR : 0x%x\n",status);
printk(0," exception (vector %x, type %x)\n",vector,frametype);
printk(0,"---------------------------------------------\n");
printk(0,"PC : 0x%x ",pc);
printk(0,"A7 : 0x%x ",_boot_panic_registers.a7);
printk(0,"SR : 0x%x\n",status);
if (frametype==0x0c) {
RAW_FMT(0,"\nfaulted address = 0x%x\n",faultedAddr);
printk(0,"\nfaulted address = 0x%x\n",faultedAddr);
}
RAW_FMT(0,"---------------------------------------------\n");
RAW_FMT(0," panic regs\n");
RAW_FMT(0,"---------------------------------------------\n");
RAW_FMT(0,"D[0..3] : %x \t%x \t%x \t%x\n",
printk(0,"---------------------------------------------\n");
printk(0," panic regs\n");
printk(0,"---------------------------------------------\n");
printk(0,"D[0..3] : %x \t%x \t%x \t%x\n",
_boot_panic_registers.d0,_boot_panic_registers.d1,
_boot_panic_registers.d2,_boot_panic_registers.d3);
RAW_FMT(0,"D[4..7] : %x \t%x \t%x \t%x\n",
printk(0,"D[4..7] : %x \t%x \t%x \t%x\n",
_boot_panic_registers.d4,_boot_panic_registers.d5,
_boot_panic_registers.d6,_boot_panic_registers.d7);
RAW_FMT(0,"A[0..3] : %x \t%x \t%x \t%x\n",
printk(0,"A[0..3] : %x \t%x \t%x \t%x\n",
_boot_panic_registers.a0,_boot_panic_registers.a1,
_boot_panic_registers.a2,_boot_panic_registers.a3);
RAW_FMT(0,"A[4..7] : %x \t%x \t%x \t%x\n",
printk(0,"A[4..7] : %x \t%x \t%x \t%x\n",
_boot_panic_registers.a4,_boot_panic_registers.a5,
_boot_panic_registers.a6,_boot_panic_registers.a7);
RAW_FMT(0," SFC : %x",_boot_panic_registers.sfc);
RAW_FMT(0," DFC : %x\n",_boot_panic_registers.dfc);
RAW_FMT(0," VBR : %x\n",_boot_panic_registers.vbr);
RAW_FMT(0,"---------------------------------------------\n");
RAW_FMT(0," panic stack\n");
RAW_FMT(0,"---------------------------------------------\n");
printk(0," SFC : %x",_boot_panic_registers.sfc);
printk(0," DFC : %x\n",_boot_panic_registers.dfc);
printk(0," VBR : %x\n",_boot_panic_registers.vbr);
printk(0,"---------------------------------------------\n");
printk(0," panic stack\n");
printk(0,"---------------------------------------------\n");
_dbug_dump(status, pc, (unsigned short*)stack,64*2);
RAW_FMT(0,"---------------------------------------------\n");
RAW_FMT(0,"press escape to reboot\n");
} while ((c=RAW_GETC(0))!=ESCAPE); /* cgets ne marche pas si les IT sont bloquées */
printk(0,"---------------------------------------------\n");
printk(0,"press escape to reboot\n");
} while ((c=getchark())!=ESCAPE);
}

View File

@@ -1,11 +1,16 @@
/*
* ATTENTION: AS MC68349 has no built-in Timer, the following code doesn't work
* ATTENTION: As MC68349 has no built-in Timer, the following code doesn't work
* in a MC68349. You can't use FIFO full mode for the moment, but
* it should be easy to fix this by using an external timer
* it should be easy to fix this by using an external timer.
*
* Use TIMER 1 for TIMEOUT when using FIFO FULL mode in UART driver
* Use TIMER 2 for timing test suites
*
* NOTE: It is important that the timer start/stop overhead be
* determined when porting or modifying this code.
*/
/*
* Geoffroy Montel
* France Telecom - CNET/DSM/TAM/CAT
* 4, rue du Clos Courtel
@@ -13,16 +18,6 @@
* FRANCE
*
* e-mail: g_montel@yahoo.com
*/
/*
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* NOTE: It is important that the timer start/stop overhead be
* determined when porting or modifying this code.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
@@ -58,18 +53,14 @@ void (*Restart_Check_B_Timer)(void);
int preload = 0;
/******************************************************
Name: __Restart_Fifo_Full_Timer
Input parameters: -
Output parameters: -
Description: when a character is received, sets
the TIMER to raise an interrupt at
TIMEOUT.
It's necessary to prevent from not
getting n-1 characters (with n the
Uart Fifo size)
*****************************************************/
void __Restart_Fifo_Full_Timer (void)
/*
* __Restart_Fifo_Full_Timer
*
* When a character is received, sets the TIMER to raise an interrupt at
* TIMEOUT. It's necessary to prevent from not getting n-1 characters
* (with n the Uart Fifo size).
*/
static void __Restart_Fifo_Full_Timer (void)
{
TSR1 |= m340_TO;
TCR1 &= ~m340_CPE;
@@ -77,15 +68,13 @@ void __Restart_Fifo_Full_Timer (void)
TCR1 |= m340_CPE;
}
/******************************************************
Name: __Restart_Fifo_Full_Timer
Input parameters: -
Output parameters: -
Description: when no character has been received
recently, check now and then if whether
a there's a character in the FIFO
*****************************************************/
void __Restart_Check_Timer (void)
/*
* __Restart_Check_Timer
*
* When no character has been received recently, check now and then if whether
* a there's a character in the FIFO
*/
static void __Restart_Check_Timer (void)
{
TSR1 |= m340_TO;
TCR1 &= ~m340_CPE;
@@ -93,40 +82,41 @@ void __Restart_Check_Timer (void)
TCR1 |= m340_CPE;
}
/******************************************************
Name: __do_nothing
Input parameters: -
Output parameters: -
Description: we always restart the fifo full timer
with a call to Restart_*_Timer
if we do not use FIFO full, Restart_*_Timer
are set to do __do_nothing
*****************************************************/
void __do_nothing (void)
/*
* __do_nothing
*
* We always restart the fifo full timer with a call to Restart_*_Timer
* if we do not use FIFO full, Restart_X_Timer are set to do __do_nothing
*/
static void __do_nothing (void)
{
}
#define Fifo_Full_on_A (m340_uart_config[UART_CHANNEL_A].rx_mode==UART_FIFO_FULL && m340_uart_config[UART_CHANNEL_A].enable && m340_uart_config[UART_CHANNEL_A].mode==UART_INTERRUPTS)
#define Fifo_Full_on_B (m340_uart_config[UART_CHANNEL_B].rx_mode==UART_FIFO_FULL && m340_uart_config[UART_CHANNEL_B].enable && m340_uart_config[UART_CHANNEL_B].mode==UART_INTERRUPTS)
#define Fifo_Full_on_A \
(m340_uart_config[UART_CHANNEL_A].rx_mode==UART_FIFO_FULL && \
m340_uart_config[UART_CHANNEL_A].enable && \
m340_uart_config[UART_CHANNEL_A].mode==UART_INTERRUPTS)
#define Fifo_Full_on_B \
(m340_uart_config[UART_CHANNEL_B].rx_mode==UART_FIFO_FULL && \
m340_uart_config[UART_CHANNEL_B].enable && \
m340_uart_config[UART_CHANNEL_B].mode==UART_INTERRUPTS)
/******************************************************
Name: Fifo_Full_benchmark_timer_initialize
Input parameters: -
Output parameters: -
Description: initialize Timer 1 for FIFO full mode
*****************************************************/
/*
* Fifo_Full_benchmark_timer_initialize
*
* initialize Timer 1 for FIFO full mode
*/
void Fifo_Full_benchmark_timer_initialize (void)
{
float max_baud_rate;
int prescaler_output_tap = -1;
int nb_of_clock_ticks = 0;
rtems_isr_entry old_handler;
/*
* USE TIMER 1 for UART FIFO FULL mode
*/
if ( Fifo_Full_on_A || Fifo_Full_on_B )
{
if ( Fifo_Full_on_A || Fifo_Full_on_B ) {
/* Disable the timer */
TCR1 &= ~m340_SWR;
@@ -134,18 +124,23 @@ void Fifo_Full_benchmark_timer_initialize (void)
TSR1 &= ~(m340_TO | m340_TG | m340_TC);
/* Init the stop bit for normal operation, ignore FREEZE, user privileges,
set interrupt arbitration */
* set interrupt arbitration.
*/
TMCR1 = TIMER1_INTERRUPT_ARBITRATION;
/* interrupt priority level and interrupt vector */
TIR1 = TIMER1_VECTOR | (TIMER1_IRQ_LEVEL << 8);
/* compute prescaler */
if ( Fifo_Full_on_A && Fifo_Full_on_B)
max_baud_rate = max(m340_uart_config[UART_CHANNEL_A].rx_baudrate, m340_uart_config[UART_CHANNEL_B].rx_baudrate);
else if ( Fifo_Full_on_A )
if ( Fifo_Full_on_A && Fifo_Full_on_B) {
max_baud_rate = max(
m340_uart_config[UART_CHANNEL_A].rx_baudrate,
m340_uart_config[UART_CHANNEL_B].rx_baudrate
);
} else if ( Fifo_Full_on_A ) {
max_baud_rate = m340_uart_config[UART_CHANNEL_A].rx_baudrate;
else max_baud_rate = m340_uart_config[UART_CHANNEL_B].rx_baudrate;
} else
max_baud_rate = m340_uart_config[UART_CHANNEL_B].rx_baudrate;
/* find out config */
nb_of_clock_ticks = (10/max_baud_rate)*(CLOCK_SPEED*1000000)*1.2;
@@ -183,41 +178,37 @@ void Fifo_Full_benchmark_timer_initialize (void)
if (prescaler_output_tap!=-1) TCR1 |= prescaler_output_tap | m340_PSE;
/* install interrupt vector */
{
rtems_isr_entry old_handler;
rtems_status_code sc;
rtems_interrupt_catch(InterruptHandler, TIMER1_VECTOR, &old_handler);
sc = rtems_interrupt_catch (InterruptHandler,
TIMER1_VECTOR,
&old_handler);
/* uncomment this if you want to pass control to your own ISR handler
it may be usefull to do so to check for performances with an oscilloscope */
/*
{
proc_ptr ignored;
_CPU_ISR_install_raw_handler( TIMER1_VECTOR, _Debug_ISR_Handler_Console, &ignored );
}
*/
}
} /* fifo full mode on a uart */
/* install routines */
Restart_Check_A_Timer = Fifo_Full_on_A ? __Restart_Check_Timer : __do_nothing;
Restart_Fifo_Full_A_Timer = Fifo_Full_on_A ? __Restart_Fifo_Full_Timer : __do_nothing;
Restart_Check_B_Timer = Fifo_Full_on_B ? __Restart_Check_Timer : __do_nothing;
Restart_Fifo_Full_B_Timer = Fifo_Full_on_B ? __Restart_Fifo_Full_Timer : __do_nothing;
if ( Fifo_Full_on_A ) {
Restart_Check_A_Timer = __Restart_Check_Timer;
Restart_Fifo_Full_A_Timer = __Restart_Fifo_Full_Timer;
} else {
Restart_Check_A_Timer = __do_nothing;
Restart_Fifo_Full_A_Timer = __do_nothing;
}
if ( Fifo_Full_on_B ) {
Restart_Check_B_Timer = __Restart_Check_Timer;
Restart_Fifo_Full_B_Timer = __Restart_Fifo_Full_Timer;
} else {
Restart_Check_B_Timer = __do_nothing;
Restart_Fifo_Full_B_Timer = __do_nothing;
}
/* start checking timer */
Restart_Check_A_Timer();
Restart_Check_B_Timer();
}
/******************************************************
Name: benchmark_timer_initialize
Input parameters: -
Output parameters: -
Description: init Timer for timing test suites
*****************************************************/
/*
* benchmark_timer_initialize
*
* init Timer for timing test suites
*/
void benchmark_timer_initialize (void)
{
/* Disable the timer */
@@ -244,26 +235,22 @@ void benchmark_timer_initialize (void)
TCR2 = m340_SWR | m340_ICOC | m340_PSE | m340_Divide_by_16 | m340_CPE;
}
/******************************************************
Name: benchmark_timer_read
Input parameters: -
Output parameters: -
Description: Return timer value in microsecond units
*****************************************************/
uint32_t
benchmark_timer_read (void)
/*
* benchmark_timer_read
*
* Return timer value in microsecond units
*/
uint32_t benchmark_timer_read (void)
{
/* there's CLOCK_SPEED / 16 micro seconds between two timer register decrement */
/* there's CLOCK_SPEED / 16 micro seconds between two timer
* register decrements.
*/
return (((0xFFFF - TCNTR2) * CLOCK_SPEED) / 16);
}
/******************************************************
Name: benchmark_timer_disable_subtracting_average_overhead
Input parameters: -
Output parameters: -
Description: -
*****************************************************/
void
benchmark_timer_disable_subtracting_average_overhead(bool find_flag)
/*
* benchmark_timer_disable_subtracting_average_overhead
*/
void benchmark_timer_disable_subtracting_average_overhead(bool find_flag)
{
}