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m68k/gen68340: Fix warnings

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This commit is contained in:
Joel Sherrill
2014-10-14 09:34:52 -05:00
parent 3785ed6c26
commit c28f5033e5
6 changed files with 522 additions and 569 deletions
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10
c/src/lib/libbsp/m68k/gen68340/console/console.c
View File

@@ -1,6 +1,8 @@
/* /*
* 68340/68349 console serial I/O. * 68340/68349 console serial I/O.
* */
/*
* Author: * Author:
* Geoffroy Montel * Geoffroy Montel
* France Telecom - CNET/DSM/TAM/CAT * France Telecom - CNET/DSM/TAM/CAT
@@ -295,9 +297,8 @@ dbugInitialise (void)
if (USE_INTERRUPTS_A) { if (USE_INTERRUPTS_A) {
rtems_isr_entry old_handler; rtems_isr_entry old_handler;
rtems_status_code sc;
sc = rtems_interrupt_catch (InterruptHandler, (void) rtems_interrupt_catch (InterruptHandler,
CONSOLE_VECTOR, CONSOLE_VECTOR,
&old_handler); &old_handler);
@@ -379,9 +380,8 @@ dbugInitialise (void)
if ((USE_INTERRUPTS_B && !(CHANNEL_ENABLED_A)) if ((USE_INTERRUPTS_B && !(CHANNEL_ENABLED_A))
|| (USE_INTERRUPTS_B && CHANNEL_ENABLED_A && !USE_INTERRUPTS_A)) { || (USE_INTERRUPTS_B && CHANNEL_ENABLED_A && !USE_INTERRUPTS_A)) {
rtems_isr_entry old_handler; rtems_isr_entry old_handler;
rtems_status_code sc;
sc = rtems_interrupt_catch (InterruptHandler, (void) rtems_interrupt_catch (InterruptHandler,
CONSOLE_VECTOR, CONSOLE_VECTOR,
&old_handler); &old_handler);

442
c/src/lib/libbsp/m68k/gen68340/console/m340uart.c
View File

@@ -1,6 +1,8 @@
/* /*
* M68340/349 uart management tools * M68340/349 UART management tools
* */
/*
* Author: * Author:
* Geoffroy Montel * Geoffroy Montel
* France Telecom - CNET/DSM/TAM/CAT * France Telecom - CNET/DSM/TAM/CAT
@@ -32,23 +34,23 @@
look at Motorola's MC68340 Integrated Processor User's Manual look at Motorola's MC68340 Integrated Processor User's Manual
page 7-30 for more infos */ page 7-30 for more infos */
float m340_Baud_Rates_Table[16][2] = {\ float m340_Baud_Rates_Table[16][2] = {
{ 50, 75 }, \ { 50, 75 },
{ 110, 110 }, \ { 110, 110 },
{ 134.5, 134.5 }, \ { 134.5, 134.5 },
{ 200, 150 }, \ { 200, 150 },
{ 300, 300 }, \ { 300, 300 },
{ 600, 600 }, \ { 600, 600 },
{ 1200, 1200 }, \ { 1200, 1200 },
{ 1050, 2000 }, \ { 1050, 2000 },
{ 2400, 2400 }, \ { 2400, 2400 },
{ 4800, 4800 }, \ { 4800, 4800 },
{ 7200, 1800 }, \ { 7200, 1800 },
{ 9600, 9600 }, \ { 9600, 9600 },
{ 38400, 19200 }, \ { 38400, 19200 },
{ 76800, 38400 }, \ { 76800, 38400 },
{ SCLK/16, SCLK/16}, \ { SCLK/16, SCLK/16},
{ SCLK, SCLK }, \ { SCLK, SCLK },
}; };
/* config on both 340 channels */ /* config on both 340 channels */
@@ -65,110 +67,125 @@ uart_channel_config m340_uart_config[UART_NUMBER_OF_CHANNELS];
Input parameters: - Input parameters: -
Output parameters: - Output parameters: -
Description: Init the m340_uart_config Description: Init the m340_uart_config
THIS SHOULD NOT BE HERE! THIS SHOULD NOT BE HERE!
Its aim was to let the user configure Its aim was to let the user configure
UARTs for each application. UARTs for each application.
As we can't pass args to the console As we can't pass args to the console
driver initialisation routine at the driver initialisation routine at the
moment, this was not done. moment, this was not done.
ATTENTION: TERMIOS init presupposes that the channel ATTENTION: TERMIOS init presupposes that the channel
baud rates is 9600/9600. baud rates is 9600/9600.
-> risks when using IOCTL -> risks when using IOCTL
*****************************************************/ *****************************************************/
void Init_UART_Table(void) void Init_UART_Table(void)
{ {
m340_uart_config[UART_CHANNEL_A].enable = TRUE; m340_uart_config[UART_CHANNEL_A].enable = TRUE;
strcpy(m340_uart_config[UART_CHANNEL_A].name, UART_CONSOLE_NAME); strcpy(m340_uart_config[UART_CHANNEL_A].name, UART_CONSOLE_NAME);
m340_uart_config[UART_CHANNEL_A].parity_mode = m340_No_Parity; m340_uart_config[UART_CHANNEL_A].parity_mode = m340_No_Parity;
m340_uart_config[UART_CHANNEL_A].bits_per_char = m340_8bpc; m340_uart_config[UART_CHANNEL_A].bits_per_char = m340_8bpc;
m340_uart_config[UART_CHANNEL_A].rx_baudrate = 9600; m340_uart_config[UART_CHANNEL_A].rx_baudrate = 9600;
m340_uart_config[UART_CHANNEL_A].tx_baudrate = 9600; m340_uart_config[UART_CHANNEL_A].tx_baudrate = 9600;
m340_uart_config[UART_CHANNEL_A].rx_mode = UART_CRR; m340_uart_config[UART_CHANNEL_A].rx_mode = UART_CRR;
m340_uart_config[UART_CHANNEL_A].mode = UART_POLLING; m340_uart_config[UART_CHANNEL_A].mode = UART_POLLING;
m340_uart_config[UART_CHANNEL_A].termios.enable = TRUE; m340_uart_config[UART_CHANNEL_A].termios.enable = TRUE;
m340_uart_config[UART_CHANNEL_A].termios.rx_buffer_size = NOT_IMPLEMENTED_YET; m340_uart_config[UART_CHANNEL_A].termios.rx_buffer_size = NOT_IMPLEMENTED_YET;
m340_uart_config[UART_CHANNEL_A].termios.tx_buffer_size = NOT_IMPLEMENTED_YET; m340_uart_config[UART_CHANNEL_A].termios.tx_buffer_size = NOT_IMPLEMENTED_YET;
m340_uart_config[UART_CHANNEL_B].enable = FALSE; m340_uart_config[UART_CHANNEL_B].enable = FALSE;
strcpy(m340_uart_config[UART_CHANNEL_B].name, UART_RAW_IO_NAME); strcpy(m340_uart_config[UART_CHANNEL_B].name, UART_RAW_IO_NAME);
m340_uart_config[UART_CHANNEL_B].parity_mode = m340_No_Parity; m340_uart_config[UART_CHANNEL_B].parity_mode = m340_No_Parity;
m340_uart_config[UART_CHANNEL_B].bits_per_char = m340_8bpc; m340_uart_config[UART_CHANNEL_B].bits_per_char = m340_8bpc;
m340_uart_config[UART_CHANNEL_B].rx_baudrate = 38400; m340_uart_config[UART_CHANNEL_B].rx_baudrate = 38400;
m340_uart_config[UART_CHANNEL_B].tx_baudrate = 38400; m340_uart_config[UART_CHANNEL_B].tx_baudrate = 38400;
m340_uart_config[UART_CHANNEL_B].rx_mode = UART_CRR; m340_uart_config[UART_CHANNEL_B].rx_mode = UART_CRR;
m340_uart_config[UART_CHANNEL_B].mode = UART_INTERRUPTS; m340_uart_config[UART_CHANNEL_B].mode = UART_INTERRUPTS;
m340_uart_config[UART_CHANNEL_B].termios.enable = TRUE; m340_uart_config[UART_CHANNEL_B].termios.enable = TRUE;
m340_uart_config[UART_CHANNEL_B].termios.rx_buffer_size = NOT_IMPLEMENTED_YET; m340_uart_config[UART_CHANNEL_B].termios.rx_buffer_size = NOT_IMPLEMENTED_YET;
m340_uart_config[UART_CHANNEL_B].termios.tx_buffer_size = NOT_IMPLEMENTED_YET; m340_uart_config[UART_CHANNEL_B].termios.tx_buffer_size = NOT_IMPLEMENTED_YET;
} }
/****************************************************** /******************************************************
Name: Find_Right_m340_UART_Channel_Config Name: Find_Right_m340_UART_Channel_Config
Input parameters: Send/Receive baud rates for a Input parameters: Send/Receive baud rates for a
given channel given channel
Output parameters: UART compatible configs for this Output parameters: UART compatible configs for this
channel channel
Description: returns which uart configurations fit Description: returns which uart configurations fit
Receiver Baud Rate and Transmitter Baud Receiver Baud Rate and Transmitter Baud
Rate for a given channel Rate for a given channel
For instance, according to the For instance, according to the
m340_Baud_Rates_Table: m340_Baud_Rates_Table:
- Output Speed = 50, Input Speed = 75 - Output Speed = 50, Input Speed = 75
is not a correct config, because is not a correct config, because
50 bauds implies set 1 and 75 bauds 50 bauds implies set 1 and 75 bauds
implies set 2 implies set 2
- Output Speed = 9600, Input Speed = 9600 - Output Speed = 9600, Input Speed = 9600
two correct configs for this: two correct configs for this:
RCS=11, TCS=11, Set=1 or 2 RCS=11, TCS=11, Set=1 or 2
*****************************************************/ *****************************************************/
t_baud_speed_table static t_baud_speed_table
Find_Right_m340_UART_Channel_Config(float ReceiverBaudRate, float TransmitterBaudRate) Find_Right_m340_UART_Channel_Config(
float ReceiverBaudRate,
float TransmitterBaudRate
)
{ {
t_baud_speed_table return_value; t_baud_speed_table return_value;
int i,j;
struct { struct {
int cs; int cs;
int set; int set;
} Receiver[2], Transmitter[2]; } Receiver[2], Transmitter[2];
int Receiver_nb_of_config = 0; int Receiver_nb_of_config = 0;
int Transmitter_nb_of_config = 0; int Transmitter_nb_of_config = 0;
int i,j; /* Receiver and Transmitter baud rates must be compatible, ie in the
* same set.
*/
/* Receiver and Transmitter baud rates must be compatible, ie in the same set */ /* search for configurations for ReceiverBaudRate
* there can't be more than two (only two sets).
*/
for (i=0;i<16;i++) {
for (j=0;j<2;j++) {
if (m340_Baud_Rates_Table[i][j]==ReceiverBaudRate) {
Receiver[Receiver_nb_of_config].cs=i;
Receiver[Receiver_nb_of_config].set=j;
Receiver_nb_of_config++;
}
}
}
/* search for configurations for ReceiverBaudRate - there can't be more than two (only two sets) */ /* search for configurations for TransmitterBaudRate
for (i=0;i<16;i++) * there can't be more than two (only two sets)
for (j=0;j<2;j++) */
if (m340_Baud_Rates_Table[i][j]==ReceiverBaudRate) { for (i=0;i<16;i++) {
Receiver[Receiver_nb_of_config].cs=i; for (j=0;j<2;j++) {
Receiver[Receiver_nb_of_config].set=j; if (m340_Baud_Rates_Table[i][j]==TransmitterBaudRate) {
Receiver_nb_of_config++; Transmitter[Transmitter_nb_of_config].cs=i;
} Transmitter[Transmitter_nb_of_config].set=j;
Transmitter_nb_of_config++;
}
}
}
/* search for configurations for TransmitterBaudRate - there can't be more than two (only two sets) */ /* now check if there's a compatible config */
for (i=0;i<16;i++) return_value.nb=0;
for (j=0;j<2;j++)
if (m340_Baud_Rates_Table[i][j]==TransmitterBaudRate) {
Transmitter[Transmitter_nb_of_config].cs=i;
Transmitter[Transmitter_nb_of_config].set=j;
Transmitter_nb_of_config++;
}
/* now check if there's a compatible config */ for (i=0; i<Receiver_nb_of_config; i++) {
return_value.nb=0; for (j=0;j<Transmitter_nb_of_config;j++) {
if (Receiver[i].set == Transmitter[j].set) {
for (i=0; i<Receiver_nb_of_config; i++) return_value.baud_speed_table[return_value.nb].set = Receiver[i].set + 1;
for (j=0;j<Transmitter_nb_of_config;j++) /* we want set 1 or set 2, not 0 or 1 */
if (Receiver[i].set == Transmitter[j].set) { return_value.baud_speed_table[return_value.nb].rcs = Receiver[i].cs;
return_value.baud_speed_table[return_value.nb].set = Receiver[i].set + 1; /* we want set 1 or set 2, not 0 or 1 */ return_value.baud_speed_table[return_value.nb].tcs = Transmitter[j].cs;
return_value.baud_speed_table[return_value.nb].rcs = Receiver[i].cs; return_value.nb++;
return_value.baud_speed_table[return_value.nb].tcs = Transmitter[j].cs; }
return_value.nb++; }
} }
return return_value; return return_value;
} }
@@ -176,71 +193,87 @@ Find_Right_m340_UART_Channel_Config(float ReceiverBaudRate, float TransmitterBau
/****************************************************** /******************************************************
Name: Find_Right_m340_UART_Config Name: Find_Right_m340_UART_Config
Input parameters: Send/Receive baud rates for both Input parameters: Send/Receive baud rates for both
channels channels
Output parameters: UART compatible configs for Output parameters: UART compatible configs for
BOTH channels BOTH channels
Description: returns which uart configurations fit Description: returns which uart configurations fit
Receiver Baud Rate and Transmitter Baud Receiver Baud Rate and Transmitter Baud
Rate for both channels Rate for both channels
For instance, if we want 9600/38400 on For instance, if we want 9600/38400 on
channel A and 9600/19200 on channel B, channel A and 9600/19200 on channel B,
this is not a good m340 uart config this is not a good m340 uart config
(channel A needs set 1 and channel B (channel A needs set 1 and channel B
needs set 2) needs set 2)
*****************************************************/ *****************************************************/
t_baud_speed_table t_baud_speed_table
Find_Right_m340_UART_Config(float ChannelA_ReceiverBaudRate, float ChannelA_TransmitterBaudRate, uint8_t enableA, Find_Right_m340_UART_Config(
float ChannelB_ReceiverBaudRate, float ChannelB_TransmitterBaudRate, uint8_t enableB) float ChannelA_ReceiverBaudRate,
float ChannelA_TransmitterBaudRate,
uint8_t enableA,
float ChannelB_ReceiverBaudRate,
float ChannelB_TransmitterBaudRate,
uint8_t enableB
)
{ {
t_baud_speed_table tableA, tableB; t_baud_speed_table tableA, tableB;
t_baud_speed_table return_value, tmp; t_baud_speed_table return_value, tmp;
int i,j; int i,j;
memset( &return_value, '\0', sizeof(return_value) ); memset( &return_value, '\0', sizeof(return_value) );
return_value.nb=0; return_value.nb=0;
if (enableA && enableB) { if (enableA && enableB) {
tableA = Find_Right_m340_UART_Channel_Config(ChannelA_ReceiverBaudRate, ChannelA_TransmitterBaudRate); tableA = Find_Right_m340_UART_Channel_Config(
tableB = Find_Right_m340_UART_Channel_Config(ChannelB_ReceiverBaudRate, ChannelB_TransmitterBaudRate); ChannelA_ReceiverBaudRate, ChannelA_TransmitterBaudRate);
tableB = Find_Right_m340_UART_Channel_Config(
ChannelB_ReceiverBaudRate, ChannelB_TransmitterBaudRate);
for (i=0;i<tableA.nb;i++) for (i=0;i<tableA.nb;i++) {
for (j=0;j<tableB.nb;j++) for (j=0;j<tableB.nb;j++) {
if (tableA.baud_speed_table[i].set==tableB.baud_speed_table[j].set) { if (tableA.baud_speed_table[i].set==tableB.baud_speed_table[j].set) {
return_value.baud_speed_table[UART_CHANNEL_A].set=tableA.baud_speed_table[i].set; return_value.baud_speed_table[UART_CHANNEL_A].set =
return_value.baud_speed_table[UART_CHANNEL_A].rcs=tableA.baud_speed_table[i].rcs; tableA.baud_speed_table[i].set;
return_value.baud_speed_table[UART_CHANNEL_A].tcs=tableA.baud_speed_table[i].tcs; return_value.baud_speed_table[UART_CHANNEL_A].rcs =
return_value.baud_speed_table[UART_CHANNEL_B].set=tableB.baud_speed_table[j].set; tableA.baud_speed_table[i].rcs;
return_value.baud_speed_table[UART_CHANNEL_B].rcs=tableB.baud_speed_table[j].rcs; return_value.baud_speed_table[UART_CHANNEL_A].tcs =
return_value.baud_speed_table[UART_CHANNEL_B].tcs=tableB.baud_speed_table[j].tcs; tableA.baud_speed_table[i].tcs;
return_value.nb=2; return_value.baud_speed_table[UART_CHANNEL_B].set =
break; tableB.baud_speed_table[j].set;
} return_value.baud_speed_table[UART_CHANNEL_B].rcs =
return return_value; tableB.baud_speed_table[j].rcs;
} return_value.baud_speed_table[UART_CHANNEL_B].tcs =
tableB.baud_speed_table[j].tcs;
if (enableA) { return_value.nb=2;
return_value = Find_Right_m340_UART_Channel_Config(ChannelA_ReceiverBaudRate, ChannelA_TransmitterBaudRate); break;
return return_value; }
} }
if (enableB) {
tmp = Find_Right_m340_UART_Channel_Config(ChannelB_ReceiverBaudRate, ChannelB_TransmitterBaudRate);
if (tmp.nb!=0) {
return_value.nb = 2;
return_value.baud_speed_table[1].set = tmp.baud_speed_table[0].set;
return_value.baud_speed_table[1].rcs = tmp.baud_speed_table[0].rcs;
return_value.baud_speed_table[1].tcs = tmp.baud_speed_table[0].tcs;
} }
} return return_value;
return return_value; }
if (enableA) {
return_value = Find_Right_m340_UART_Channel_Config(
ChannelA_ReceiverBaudRate, ChannelA_TransmitterBaudRate);
return return_value;
}
if (enableB) {
tmp = Find_Right_m340_UART_Channel_Config(
ChannelB_ReceiverBaudRate, ChannelB_TransmitterBaudRate);
if (tmp.nb!=0) {
return_value.nb = 2;
return_value.baud_speed_table[1].set = tmp.baud_speed_table[0].set;
return_value.baud_speed_table[1].rcs = tmp.baud_speed_table[0].rcs;
return_value.baud_speed_table[1].tcs = tmp.baud_speed_table[0].tcs;
}
}
return return_value;
} }
/****************************************************************************************************/
/* /*
* very low level fmted output * very low level fmted output
*/ */
extern void dbug_out_char( int minor, int ch ); extern void dbug_out_char( int minor, int ch );
extern int dbug_in_char( int minor ); extern int dbug_in_char( int minor );
extern int dbug_char_present( int minor ); extern int dbug_char_present( int minor );
@@ -253,9 +286,9 @@ extern int dbug_char_present( int minor );
*****************************************************/ *****************************************************/
int dbugRead (int minor) int dbugRead (int minor)
{ {
if (dbug_char_present(minor) == 0) if (dbug_char_present(minor) == 0)
return -1; return -1;
return dbug_in_char(minor); return dbug_in_char(minor);
} }
/****************************************************** /******************************************************
@@ -266,106 +299,13 @@ int dbugRead (int minor)
*****************************************************/ *****************************************************/
ssize_t dbugWrite (int minor, const char *buf, size_t len) ssize_t dbugWrite (int minor, const char *buf, size_t len)
{ {
static char txBuf; static char txBuf;
size_t retval = len; size_t retval = len;
while (len--) { while (len--) {
txBuf = *buf++; txBuf = *buf++;
dbug_out_char( minor, (int)txBuf ); dbug_out_char( minor, (int)txBuf );
} }
return retval; return retval;
} }
static void fmt_num( int minor, unsigned long, unsigned );
static void fmt_str( int minor, const char* );
/******************************************************
Name: RAW_GETC
Input parameters: channel, buffer and its length
Output parameters:
Description: a light blocking "getc"
*****************************************************/
char RAW_GETC(int minor)
{
while (!dbug_char_present(minor)) continue;
return dbug_in_char(minor);
}
/******************************************************
Name: RAW_FMT
Input parameters: channel, buffer and its length
Output parameters: always successfull
Description: a light polled "printf"
useful when there's a serious pb and
there are no more interrupts
*****************************************************/
void RAW_FMT( int minor, const char* fmt, ... )
{
int ch;
va_list va;
va_start( va, fmt );
while( (ch = *fmt++) )
if( ch != '%' || (ch = *fmt++) == '%' )
{
if( ch == '\n' )
dbug_out_char( minor, '\r' );
dbug_out_char( minor, ch );
}
else switch( ch )
{
case 'c':
dbug_out_char( minor, va_arg( va, int ) );
continue;
case 's':
fmt_str( minor, va_arg( va, char* ) );
continue;
case 'd':
ch = va_arg( va, int );
if( ch >= 0 )
fmt_num( minor, ch, 10 );
else
{
dbug_out_char( minor, '-' );
fmt_num( minor, -ch, 10 );
}
continue;
case 'u':
fmt_num( minor, va_arg( va, unsigned ), 10 );
continue;
case 'o':
fmt_num( minor, va_arg( va, unsigned ), 8 );
continue;
case 'x':
case 'p':
fmt_num( minor, va_arg( va, unsigned ), 16 );
continue;
default: continue;
return;
}
va_end( va );
}
static void fmt_num( int minor, unsigned long num, unsigned base )
{
char buf[33];
int ib = sizeof(buf);
buf[--ib] = 0;
do
{
buf[--ib] = "0123456789ABCDEF"[num%base];
num /= base;
}
while( num != 0 );
fmt_str( minor, buf+ib );
}
static void fmt_str( int minor, const char* str )
{
if( str )
while( *str )
dbug_out_char( minor, *str++ );
}

17
c/src/lib/libbsp/m68k/gen68340/include/bsp.h
View File

@@ -26,6 +26,8 @@
#ifndef _BSP_H #ifndef _BSP_H
#define _BSP_H #define _BSP_H
#ifndef ASM
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
@@ -60,8 +62,23 @@ rtems_isr_entry set_vector(
int type int type
); );
/*
* Methods used across files inside the BSP
*/
int dbug_in_char( int minor );
void dbug_out_char( int minor, int ch );
int dbug_char_present( int minor );
void _dbug_dumpanic(void);
/*
* Only called from .S but prototyped here to capture the dependecy.
*/
void _Init68340 (void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* !ASM */
#endif #endif

9
c/src/lib/libbsp/m68k/gen68340/start/start.S
View File

@@ -3,7 +3,9 @@
* The name of this entry point is compiler dependent. * The name of this entry point is compiler dependent.
* It jumps to the BSP which is responsible for performing * It jumps to the BSP which is responsible for performing
* all initialization. * all initialization.
* */
/*
* COPYRIGHT (c) 1989-1999. * COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
@@ -26,7 +28,10 @@
#include <rtems/asm.h> #include <rtems/asm.h>
#include <m68349.inc> #include <m68349.inc>
#define _OLD_ASTECC 1 /* old addresses for AST68340 only, undefine for AST68349 */ #include <bsp.h> /* to indicate dependencies */
/* old addresses for AST68340 only, undefine for AST68349 */
#define _OLD_ASTECC 1
BEGIN_CODE BEGIN_CODE
/* /*

272
c/src/lib/libbsp/m68k/gen68340/startup/dumpanic.c
View File

@@ -1,6 +1,8 @@
/* /*
* M68340/349 registers and stack dump if an exception is raised * M68340/349 registers and stack dump if an exception is raised
* */
/*
* Author: * Author:
* Pascal Cadic * Pascal Cadic
* France Telecom - CNET/DSM/TAM/CAT * France Telecom - CNET/DSM/TAM/CAT
@@ -16,106 +18,108 @@
* http://www.rtems.org/license/LICENSE. * http://www.rtems.org/license/LICENSE.
*/ */
#include <stdio.h> #include <bsp.h>
#include <rtems/bspIo.h>
const char *exceptionName[] = const char *exceptionName[] = {
{ "INITIAL STACK POINTER",
"INITIAL STACK POINTER", "INITIAL PROGRAM COUNTER",
"INITIAL PROGRAM COUNTER", "BUS ERROR",
"BUS ERROR", "ADDRESS ERROR",
"ADDRESS ERROR", "ILLEGAL INSTRUCTION",
"ILLEGAL INSTRUCTION", "DIVISION BY ZERO",
"DIVISION BY ZERO", "CHK, CHK2",
"CHK, CHK2", "TRAPcc, TRAPv",
"TRAPcc, TRAPv", "PRIVILEGE VIOLATION",
"PRIVILEGE VIOLATION", "TRACE",
"TRACE", "LINE A EMULATOR",
"LINE A EMULATOR", "LINE F EMULATOR",
"LINE F EMULATOR", "HARDWARE BREAK",
"HARDWARE BREAK", "COPROCESSOR PROTOCOL VIOLATION",
"COPROCESSOR PROTOCOL VIOLATION", "FORMAT ERROR",
"FORMAT ERROR", "UNINITIALIZED INTERRUPT",
"UNINITIALIZED INTERRUPT", "RESERVED 16",
"RESERVED 16", "RESERVED 17",
"RESERVED 17", "RESERVED 18",
"RESERVED 18", "RESERVED 19",
"RESERVED 19", "RESERVED 20",
"RESERVED 20", "RESERVED 21",
"RESERVED 21", "RESERVED 22",
"RESERVED 22", "RESERVED 23",
"RESERVED 23", "SPURIOUS INTERRUPT",
"SPURIOUS INTERRUPT", "LEVEL 1 AUTOVECTOR",
"LEVEL 1 AUTOVECTOR", "LEVEL 2 AUTOVECTOR",
"LEVEL 2 AUTOVECTOR", "LEVEL 3 AUTOVECTOR",
"LEVEL 3 AUTOVECTOR", "LEVEL 4 AUTOVECTOR",
"LEVEL 4 AUTOVECTOR", "LEVEL 5 AUTOVECTOR",
"LEVEL 5 AUTOVECTOR", "LEVEL 6 AUTOVECTOR",
"LEVEL 6 AUTOVECTOR", "LEVEL 7 AUTOVECTOR",
"LEVEL 7 AUTOVECTOR", "TRAP 1",
"TRAP 1", "TRAP 2",
"TRAP 2", "TRAP 3",
"TRAP 3", "TRAP 4",
"TRAP 4", "TRAP 5",
"TRAP 5", "TRAP 6",
"TRAP 6", "TRAP 7",
"TRAP 7", "TRAP 8",
"TRAP 8", "TRAP 9",
"TRAP 9", "TRAP 10",
"TRAP 10", "TRAP 11",
"TRAP 11", "TRAP 12",
"TRAP 12", "TRAP 13",
"TRAP 13", "TRAP 14",
"TRAP 14", "TRAP 15",
"TRAP 15", "VECTOR 48",
"VECTOR 48", "VECTOR 49",
"VECTOR 49", "VECTOR 50",
"VECTOR 50", "VECTOR 51",
"VECTOR 51", "VECTOR 52",
"VECTOR 52", "VECTOR 53",
"VECTOR 53", "VECTOR 54",
"VECTOR 54", "VECTOR 55",
"VECTOR 55", "VECTOR 56",
"VECTOR 56", "VECTOR 57",
"VECTOR 57", "VECTOR 58",
"VECTOR 58", "VECTOR 59",
"VECTOR 59", "VECTOR 60",
"VECTOR 60", "VECTOR 61",
"VECTOR 61", "VECTOR 62",
"VECTOR 62", "VECTOR 63",
"VECTOR 63", };
};
typedef struct { typedef struct {
unsigned long pc; unsigned long pc;
unsigned short sr; unsigned short sr;
unsigned short format_id; unsigned short format_id;
unsigned long d0, d1, d2, d3, d4, d5, d6, d7; unsigned long d0, d1, d2, d3, d4, d5, d6, d7;
unsigned long a0, a1, a2, a3, a4, a5, a6, a7; unsigned long a0, a1, a2, a3, a4, a5, a6, a7;
unsigned long sfc, dfc, vbr; unsigned long sfc, dfc, vbr;
} boot_panic_registers_t; } boot_panic_registers_t;
boot_panic_registers_t _boot_panic_registers; boot_panic_registers_t _boot_panic_registers;
extern void RAW_FMT( int minor, const char* fmt, ... );
extern char RAW_GETC(int minor);
/****************************************************** /******************************************************
Name: _dbug_dump Name: _dbug_dump
Input parameters: sr, pc, stack pointer, Input parameters: sr, pc, stack pointer,
size to display size to display
Output parameters: - Output parameters: -
Description: display the supervisor stack Description: display the supervisor stack
*****************************************************/ *****************************************************/
void _dbug_dump(unsigned short sr, void* pc, unsigned short *stack, int size) static void _dbug_dump(
unsigned short sr,
void* pc,
unsigned short *stack,
int size
)
{ {
int i; int i;
RAW_FMT(0,"%x : %x \t%x",0,sr,(unsigned short)(((unsigned)pc)>>16)); printk(0,"%x : %x \t%x",0,sr,(unsigned short)(((unsigned)pc)>>16));
for (i=2; i<size; i++) { for (i=2; i<size; i++) {
if ((i%8)==0) RAW_FMT(0,"\n%x :",i/8); if ((i%8)==0) printk(0,"\n%x :",i/8);
RAW_FMT(0," %x\t",stack[i-2]); printk(0," %x\t",stack[i-2]);
} }
RAW_FMT(0,"\n"); printk(0,"\n");
} }
/****************************************************** /******************************************************
@@ -123,8 +127,8 @@ int i;
Input parameters: - Input parameters: -
Output parameters: - Output parameters: -
Description: display microcontroler state. Registers Description: display microcontroler state. Registers
values are stored in _boot_panic_registers values are stored in _boot_panic_registers
which is filled in _uhoh ASM routine which is filled in _uhoh ASM routine
*****************************************************/ *****************************************************/
void _dbug_dumpanic(void) void _dbug_dumpanic(void)
{ {
@@ -134,53 +138,53 @@ void _dbug_dumpanic(void)
unsigned char frametype, *stack; unsigned char frametype, *stack;
#define ESCAPE 27 #define ESCAPE 27
stack = (unsigned char*)(_boot_panic_registers.a7); stack = (unsigned char*)(_boot_panic_registers.a7);
do { do {
status = _boot_panic_registers.sr; status = _boot_panic_registers.sr;
pc = (void*)_boot_panic_registers.pc; pc = (void*)_boot_panic_registers.pc;
faultedAddr = *(void**)(stack+4); faultedAddr = *(void**)(stack+4);
vector = (_boot_panic_registers.format_id&0x0FFF)>>2; vector = (_boot_panic_registers.format_id&0x0FFF)>>2;
frametype = (_boot_panic_registers.format_id&0xF000)>>12; frametype = (_boot_panic_registers.format_id&0xF000)>>12;
RAW_FMT(0,"\n---------------------------------------------\n"); printk(0,"\n---------------------------------------------\n");
if (vector<64) if (vector<64)
RAW_FMT(0,"%s",exceptionName[vector]); printk(0,"%s",exceptionName[vector]);
else { else {
RAW_FMT(0,"RESERVED USER"); printk(0,"RESERVED USER");
} }
RAW_FMT(0," exception (vector %x, type %x)\n",vector,frametype); printk(0," exception (vector %x, type %x)\n",vector,frametype);
RAW_FMT(0,"---------------------------------------------\n"); printk(0,"---------------------------------------------\n");
RAW_FMT(0,"PC : 0x%x ",pc); printk(0,"PC : 0x%x ",pc);
RAW_FMT(0,"A7 : 0x%x ",_boot_panic_registers.a7); printk(0,"A7 : 0x%x ",_boot_panic_registers.a7);
RAW_FMT(0,"SR : 0x%x\n",status); printk(0,"SR : 0x%x\n",status);
if (frametype==0x0c) { if (frametype==0x0c) {
RAW_FMT(0,"\nfaulted address = 0x%x\n",faultedAddr); printk(0,"\nfaulted address = 0x%x\n",faultedAddr);
} }
RAW_FMT(0,"---------------------------------------------\n"); printk(0,"---------------------------------------------\n");
RAW_FMT(0," panic regs\n"); printk(0," panic regs\n");
RAW_FMT(0,"---------------------------------------------\n"); printk(0,"---------------------------------------------\n");
RAW_FMT(0,"D[0..3] : %x \t%x \t%x \t%x\n", printk(0,"D[0..3] : %x \t%x \t%x \t%x\n",
_boot_panic_registers.d0,_boot_panic_registers.d1, _boot_panic_registers.d0,_boot_panic_registers.d1,
_boot_panic_registers.d2,_boot_panic_registers.d3); _boot_panic_registers.d2,_boot_panic_registers.d3);
RAW_FMT(0,"D[4..7] : %x \t%x \t%x \t%x\n", printk(0,"D[4..7] : %x \t%x \t%x \t%x\n",
_boot_panic_registers.d4,_boot_panic_registers.d5, _boot_panic_registers.d4,_boot_panic_registers.d5,
_boot_panic_registers.d6,_boot_panic_registers.d7); _boot_panic_registers.d6,_boot_panic_registers.d7);
RAW_FMT(0,"A[0..3] : %x \t%x \t%x \t%x\n", printk(0,"A[0..3] : %x \t%x \t%x \t%x\n",
_boot_panic_registers.a0,_boot_panic_registers.a1, _boot_panic_registers.a0,_boot_panic_registers.a1,
_boot_panic_registers.a2,_boot_panic_registers.a3); _boot_panic_registers.a2,_boot_panic_registers.a3);
RAW_FMT(0,"A[4..7] : %x \t%x \t%x \t%x\n", printk(0,"A[4..7] : %x \t%x \t%x \t%x\n",
_boot_panic_registers.a4,_boot_panic_registers.a5, _boot_panic_registers.a4,_boot_panic_registers.a5,
_boot_panic_registers.a6,_boot_panic_registers.a7); _boot_panic_registers.a6,_boot_panic_registers.a7);
RAW_FMT(0," SFC : %x",_boot_panic_registers.sfc); printk(0," SFC : %x",_boot_panic_registers.sfc);
RAW_FMT(0," DFC : %x\n",_boot_panic_registers.dfc); printk(0," DFC : %x\n",_boot_panic_registers.dfc);
RAW_FMT(0," VBR : %x\n",_boot_panic_registers.vbr); printk(0," VBR : %x\n",_boot_panic_registers.vbr);
RAW_FMT(0,"---------------------------------------------\n"); printk(0,"---------------------------------------------\n");
RAW_FMT(0," panic stack\n"); printk(0," panic stack\n");
RAW_FMT(0,"---------------------------------------------\n"); printk(0,"---------------------------------------------\n");
_dbug_dump(status, pc, (unsigned short*)stack,64*2); _dbug_dump(status, pc, (unsigned short*)stack,64*2);
RAW_FMT(0,"---------------------------------------------\n"); printk(0,"---------------------------------------------\n");
RAW_FMT(0,"press escape to reboot\n"); printk(0,"press escape to reboot\n");
} while ((c=RAW_GETC(0))!=ESCAPE); /* cgets ne marche pas si les IT sont bloquées */ } while ((c=getchark())!=ESCAPE);
} }

341
c/src/lib/libbsp/m68k/gen68340/timer/timer.c
View File

@@ -1,11 +1,16 @@
/* /*
* ATTENTION: AS MC68349 has no built-in Timer, the following code doesn't work * ATTENTION: As MC68349 has no built-in Timer, the following code doesn't work
* in a MC68349. You can't use FIFO full mode for the moment, but * in a MC68349. You can't use FIFO full mode for the moment, but
* it should be easy to fix this by using an external timer * it should be easy to fix this by using an external timer.
* *
* Use TIMER 1 for TIMEOUT when using FIFO FULL mode in UART driver * Use TIMER 1 for TIMEOUT when using FIFO FULL mode in UART driver
* Use TIMER 2 for timing test suites * Use TIMER 2 for timing test suites
* *
* NOTE: It is important that the timer start/stop overhead be
* determined when porting or modifying this code.
*/
/*
* Geoffroy Montel * Geoffroy Montel
* France Telecom - CNET/DSM/TAM/CAT * France Telecom - CNET/DSM/TAM/CAT
* 4, rue du Clos Courtel * 4, rue du Clos Courtel
@@ -13,16 +18,6 @@
* FRANCE * FRANCE
* *
* e-mail: g_montel@yahoo.com * e-mail: g_montel@yahoo.com
*/
/*
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* NOTE: It is important that the timer start/stop overhead be
* determined when porting or modifying this code.
* *
* COPYRIGHT (c) 1989-1999. * COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
@@ -47,7 +42,7 @@
#define TIMER2_IRQ_LEVEL 4 #define TIMER2_IRQ_LEVEL 4
#define TIMER2_INTERRUPT_ARBITRATION 4 #define TIMER2_INTERRUPT_ARBITRATION 4
#define CLOCK_SPEED 25 /* in Mhz */ #define CLOCK_SPEED 25 /* in Mhz */
#define max(a,b) (((a)>(b)) ? (a) : (b)) #define max(a,b) (((a)>(b)) ? (a) : (b))
@@ -58,34 +53,28 @@ void (*Restart_Check_B_Timer)(void);
int preload = 0; int preload = 0;
/****************************************************** /*
Name: __Restart_Fifo_Full_Timer * __Restart_Fifo_Full_Timer
Input parameters: - *
Output parameters: - * When a character is received, sets the TIMER to raise an interrupt at
Description: when a character is received, sets * TIMEOUT. It's necessary to prevent from not getting n-1 characters
the TIMER to raise an interrupt at * (with n the Uart Fifo size).
TIMEOUT. */
It's necessary to prevent from not static void __Restart_Fifo_Full_Timer (void)
getting n-1 characters (with n the
Uart Fifo size)
*****************************************************/
void __Restart_Fifo_Full_Timer (void)
{ {
TSR1 |= m340_TO; TSR1 |= m340_TO;
TCR1 &= ~m340_CPE; TCR1 &= ~m340_CPE;
WPREL11 = preload; WPREL11 = preload;
TCR1 |= m340_CPE; TCR1 |= m340_CPE;
} }
/****************************************************** /*
Name: __Restart_Fifo_Full_Timer * __Restart_Check_Timer
Input parameters: - *
Output parameters: - * When no character has been received recently, check now and then if whether
Description: when no character has been received * a there's a character in the FIFO
recently, check now and then if whether */
a there's a character in the FIFO static void __Restart_Check_Timer (void)
*****************************************************/
void __Restart_Check_Timer (void)
{ {
TSR1 |= m340_TO; TSR1 |= m340_TO;
TCR1 &= ~m340_CPE; TCR1 &= ~m340_CPE;
@@ -93,177 +82,175 @@ void __Restart_Check_Timer (void)
TCR1 |= m340_CPE; TCR1 |= m340_CPE;
} }
/****************************************************** /*
Name: __do_nothing * __do_nothing
Input parameters: - *
Output parameters: - * We always restart the fifo full timer with a call to Restart_*_Timer
Description: we always restart the fifo full timer * if we do not use FIFO full, Restart_X_Timer are set to do __do_nothing
with a call to Restart_*_Timer */
if we do not use FIFO full, Restart_*_Timer static void __do_nothing (void)
are set to do __do_nothing
*****************************************************/
void __do_nothing (void)
{ {
} }
#define Fifo_Full_on_A (m340_uart_config[UART_CHANNEL_A].rx_mode==UART_FIFO_FULL && m340_uart_config[UART_CHANNEL_A].enable && m340_uart_config[UART_CHANNEL_A].mode==UART_INTERRUPTS) #define Fifo_Full_on_A \
#define Fifo_Full_on_B (m340_uart_config[UART_CHANNEL_B].rx_mode==UART_FIFO_FULL && m340_uart_config[UART_CHANNEL_B].enable && m340_uart_config[UART_CHANNEL_B].mode==UART_INTERRUPTS) (m340_uart_config[UART_CHANNEL_A].rx_mode==UART_FIFO_FULL && \
m340_uart_config[UART_CHANNEL_A].enable && \
m340_uart_config[UART_CHANNEL_A].mode==UART_INTERRUPTS)
#define Fifo_Full_on_B \
(m340_uart_config[UART_CHANNEL_B].rx_mode==UART_FIFO_FULL && \
m340_uart_config[UART_CHANNEL_B].enable && \
m340_uart_config[UART_CHANNEL_B].mode==UART_INTERRUPTS)
/****************************************************** /*
Name: Fifo_Full_benchmark_timer_initialize * Fifo_Full_benchmark_timer_initialize
Input parameters: - *
Output parameters: - * initialize Timer 1 for FIFO full mode
Description: initialize Timer 1 for FIFO full mode */
*****************************************************/
void Fifo_Full_benchmark_timer_initialize (void) void Fifo_Full_benchmark_timer_initialize (void)
{ {
float max_baud_rate; float max_baud_rate;
int prescaler_output_tap = -1; int prescaler_output_tap = -1;
int nb_of_clock_ticks = 0; int nb_of_clock_ticks = 0;
rtems_isr_entry old_handler;
/* /*
* USE TIMER 1 for UART FIFO FULL mode * USE TIMER 1 for UART FIFO FULL mode
*/ */
if ( Fifo_Full_on_A || Fifo_Full_on_B ) {
/* Disable the timer */
TCR1 &= ~m340_SWR;
if ( Fifo_Full_on_A || Fifo_Full_on_B ) /* Reset the interrupts */
{ TSR1 &= ~(m340_TO | m340_TG | m340_TC);
/* Disable the timer */
TCR1 &= ~m340_SWR;
/* Reset the interrupts */ /* Init the stop bit for normal operation, ignore FREEZE, user privileges,
TSR1 &= ~(m340_TO | m340_TG | m340_TC); * set interrupt arbitration.
*/
TMCR1 = TIMER1_INTERRUPT_ARBITRATION;
/* Init the stop bit for normal operation, ignore FREEZE, user privileges, /* interrupt priority level and interrupt vector */
set interrupt arbitration */ TIR1 = TIMER1_VECTOR | (TIMER1_IRQ_LEVEL << 8);
TMCR1 = TIMER1_INTERRUPT_ARBITRATION;
/* interrupt priority level and interrupt vector */ /* compute prescaler */
TIR1 = TIMER1_VECTOR | (TIMER1_IRQ_LEVEL << 8); if ( Fifo_Full_on_A && Fifo_Full_on_B) {
max_baud_rate = max(
m340_uart_config[UART_CHANNEL_A].rx_baudrate,
m340_uart_config[UART_CHANNEL_B].rx_baudrate
);
} else if ( Fifo_Full_on_A ) {
max_baud_rate = m340_uart_config[UART_CHANNEL_A].rx_baudrate;
} else
max_baud_rate = m340_uart_config[UART_CHANNEL_B].rx_baudrate;
/* compute prescaler */ /* find out config */
if ( Fifo_Full_on_A && Fifo_Full_on_B) nb_of_clock_ticks = (10/max_baud_rate)*(CLOCK_SPEED*1000000)*1.2;
max_baud_rate = max(m340_uart_config[UART_CHANNEL_A].rx_baudrate, m340_uart_config[UART_CHANNEL_B].rx_baudrate); if (nb_of_clock_ticks < 0xFFFF) {
else if ( Fifo_Full_on_A ) preload = nb_of_clock_ticks;
max_baud_rate = m340_uart_config[UART_CHANNEL_A].rx_baudrate; prescaler_output_tap = -1;
else max_baud_rate = m340_uart_config[UART_CHANNEL_B].rx_baudrate; } else if (nb_of_clock_ticks/2 < 0xFFFF) {
preload = nb_of_clock_ticks/2;
prescaler_output_tap = m340_Divide_by_2;
} else if (nb_of_clock_ticks/4 < 0xFFFF) {
preload = nb_of_clock_ticks/4;
prescaler_output_tap = m340_Divide_by_4;
} else if (nb_of_clock_ticks/8 < 0xFFFF) {
preload = nb_of_clock_ticks/8;
prescaler_output_tap = m340_Divide_by_16;
} else if (nb_of_clock_ticks/16 < 0xFFFF) {
preload = nb_of_clock_ticks/16;
prescaler_output_tap = m340_Divide_by_16;
} else if (nb_of_clock_ticks/32 < 0xFFFF) {
preload = nb_of_clock_ticks/32;
prescaler_output_tap = m340_Divide_by_32;
} else if (nb_of_clock_ticks/64 < 0xFFFF) {
preload = nb_of_clock_ticks/64;
prescaler_output_tap = m340_Divide_by_64;
} else if (nb_of_clock_ticks/128 < 0xFFFF) {
preload = nb_of_clock_ticks/128;
prescaler_output_tap = m340_Divide_by_128;
} else if (nb_of_clock_ticks/256 < 0xFFFF) {
preload = nb_of_clock_ticks/256;
prescaler_output_tap = m340_Divide_by_256;
}
/* find out config */ /* Input Capture/Output Compare (ICOC) */
nb_of_clock_ticks = (10/max_baud_rate)*(CLOCK_SPEED*1000000)*1.2; TCR1 = m340_SWR | m340_TO_Enabled | m340_ICOC;
if (nb_of_clock_ticks < 0xFFFF) { if (prescaler_output_tap!=-1) TCR1 |= prescaler_output_tap | m340_PSE;
preload = nb_of_clock_ticks;
prescaler_output_tap = -1;
} else if (nb_of_clock_ticks/2 < 0xFFFF) {
preload = nb_of_clock_ticks/2;
prescaler_output_tap = m340_Divide_by_2;
} else if (nb_of_clock_ticks/4 < 0xFFFF) {
preload = nb_of_clock_ticks/4;
prescaler_output_tap = m340_Divide_by_4;
} else if (nb_of_clock_ticks/8 < 0xFFFF) {
preload = nb_of_clock_ticks/8;
prescaler_output_tap = m340_Divide_by_16;
} else if (nb_of_clock_ticks/16 < 0xFFFF) {
preload = nb_of_clock_ticks/16;
prescaler_output_tap = m340_Divide_by_16;
} else if (nb_of_clock_ticks/32 < 0xFFFF) {
preload = nb_of_clock_ticks/32;
prescaler_output_tap = m340_Divide_by_32;
} else if (nb_of_clock_ticks/64 < 0xFFFF) {
preload = nb_of_clock_ticks/64;
prescaler_output_tap = m340_Divide_by_64;
} else if (nb_of_clock_ticks/128 < 0xFFFF) {
preload = nb_of_clock_ticks/128;
prescaler_output_tap = m340_Divide_by_128;
} else if (nb_of_clock_ticks/256 < 0xFFFF) {
preload = nb_of_clock_ticks/256;
prescaler_output_tap = m340_Divide_by_256;
}
/* Input Capture/Output Compare (ICOC) */ /* install interrupt vector */
TCR1 = m340_SWR | m340_TO_Enabled | m340_ICOC; rtems_interrupt_catch(InterruptHandler, TIMER1_VECTOR, &old_handler);
if (prescaler_output_tap!=-1) TCR1 |= prescaler_output_tap | m340_PSE;
/* install interrupt vector */ } /* fifo full mode on a uart */
{
rtems_isr_entry old_handler;
rtems_status_code sc;
sc = rtems_interrupt_catch (InterruptHandler, /* install routines */
TIMER1_VECTOR, if ( Fifo_Full_on_A ) {
&old_handler); Restart_Check_A_Timer = __Restart_Check_Timer;
Restart_Fifo_Full_A_Timer = __Restart_Fifo_Full_Timer;
} else {
Restart_Check_A_Timer = __do_nothing;
Restart_Fifo_Full_A_Timer = __do_nothing;
}
/* uncomment this if you want to pass control to your own ISR handler if ( Fifo_Full_on_B ) {
it may be usefull to do so to check for performances with an oscilloscope */ Restart_Check_B_Timer = __Restart_Check_Timer;
/* Restart_Fifo_Full_B_Timer = __Restart_Fifo_Full_Timer;
{ } else {
proc_ptr ignored; Restart_Check_B_Timer = __do_nothing;
_CPU_ISR_install_raw_handler( TIMER1_VECTOR, _Debug_ISR_Handler_Console, &ignored ); Restart_Fifo_Full_B_Timer = __do_nothing;
} }
*/
}
} /* fifo full mode on a uart */
/* install routines */ /* start checking timer */
Restart_Check_A_Timer = Fifo_Full_on_A ? __Restart_Check_Timer : __do_nothing; Restart_Check_A_Timer();
Restart_Fifo_Full_A_Timer = Fifo_Full_on_A ? __Restart_Fifo_Full_Timer : __do_nothing; Restart_Check_B_Timer();
Restart_Check_B_Timer = Fifo_Full_on_B ? __Restart_Check_Timer : __do_nothing;
Restart_Fifo_Full_B_Timer = Fifo_Full_on_B ? __Restart_Fifo_Full_Timer : __do_nothing;
/* start checking timer */
Restart_Check_A_Timer();
Restart_Check_B_Timer();
} }
/****************************************************** /*
Name: benchmark_timer_initialize * benchmark_timer_initialize
Input parameters: - *
Output parameters: - * init Timer for timing test suites
Description: init Timer for timing test suites */
*****************************************************/
void benchmark_timer_initialize (void) void benchmark_timer_initialize (void)
{ {
/* Disable the timer */ /* Disable the timer */
TCR2 &= ~m340_SWR; TCR2 &= ~m340_SWR;
/* Reset the interrupts */ /* Reset the interrupts */
TSR2 &= ~(m340_TO | m340_TG | m340_TC); TSR2 &= ~(m340_TO | m340_TG | m340_TC);
/* Init the stop bit for normal operation, ignore FREEZE, user privileges, /* Init the stop bit for normal operation, ignore FREEZE, user privileges,
set interrupt arbitration */ set interrupt arbitration */
TMCR1 = TIMER2_INTERRUPT_ARBITRATION; TMCR1 = TIMER2_INTERRUPT_ARBITRATION;
/* interrupt priority level and interrupt vector */ /* interrupt priority level and interrupt vector */
TIR1 = TIMER2_VECTOR | (TIMER2_IRQ_LEVEL << 8); TIR1 = TIMER2_VECTOR | (TIMER2_IRQ_LEVEL << 8);
/* Init the stop bit for normal operation, ignore FREEZE, user privileges, /* Init the stop bit for normal operation, ignore FREEZE, user privileges,
set interrupt arbitration */ set interrupt arbitration */
TMCR2 = TIMER2_INTERRUPT_ARBITRATION; TMCR2 = TIMER2_INTERRUPT_ARBITRATION;
/* Preload register 1 */ /* Preload register 1 */
WPREL21 = 0xFFFF; WPREL21 = 0xFFFF;
/* Input Capture/Output Compare (ICOC) */ /* Input Capture/Output Compare (ICOC) */
TCR2 = m340_SWR | m340_ICOC | m340_PSE | m340_Divide_by_16 | m340_CPE; TCR2 = m340_SWR | m340_ICOC | m340_PSE | m340_Divide_by_16 | m340_CPE;
} }
/****************************************************** /*
Name: benchmark_timer_read * benchmark_timer_read
Input parameters: - *
Output parameters: - * Return timer value in microsecond units
Description: Return timer value in microsecond units */
*****************************************************/ uint32_t benchmark_timer_read (void)
uint32_t
benchmark_timer_read (void)
{ {
/* there's CLOCK_SPEED / 16 micro seconds between two timer register decrement */ /* there's CLOCK_SPEED / 16 micro seconds between two timer
* register decrements.
*/
return (((0xFFFF - TCNTR2) * CLOCK_SPEED) / 16); return (((0xFFFF - TCNTR2) * CLOCK_SPEED) / 16);
} }
/****************************************************** /*
Name: benchmark_timer_disable_subtracting_average_overhead * benchmark_timer_disable_subtracting_average_overhead
Input parameters: - */
Output parameters: - void benchmark_timer_disable_subtracting_average_overhead(bool find_flag)
Description: -
*****************************************************/
void
benchmark_timer_disable_subtracting_average_overhead(bool find_flag)
{ {
} }