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powerpc: Move legacy CPU_Interrupt_frame

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The only remaining user of CPU_Interrupt_frame on PowerPC is the mpc5xx
support.  Move it to here.

Update #2809.
This commit is contained in:
Sebastian Huber
2016-11-11 11:31:13 +01:00
parent 40d592eb3e
commit bf4fdb1f1d
3 changed files with 33 additions and 32 deletions
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1
c/src/lib/libbsp/powerpc/ss555/irq/irq.h
View File

@@ -44,7 +44,6 @@ int CPU_get_current_rtems_irq_handler(rtems_irq_connect_data* irq);
int CPU_remove_rtems_irq_handler(const rtems_irq_connect_data* irq);
int CPU_rtems_irq_mngt_set(rtems_irq_global_settings* config);
int CPU_rtems_irq_mngt_get(rtems_irq_global_settings** config);
void C_dispatch_irq_handler(CPU_Interrupt_frame *frame, unsigned int excNum);
void C_default_exception_handler(CPU_Exception_frame* excPtr);
/*

33
c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.h
View File

@@ -161,6 +161,39 @@ int CPU_irq_level_from_symbolic_name(const rtems_irq_number name);
extern void CPU_rtems_irq_mng_init(unsigned cpuId);
typedef struct CPU_Interrupt_frame {
uint32_t stacklink; /* Ensure this is a real frame (also reg1 save) */
uint32_t calleeLr; /* link register used by callees: SVR4/EABI */
/* This is what is left out of the primary contexts */
uint32_t gpr0;
uint32_t gpr2; /* play safe */
uint32_t gpr3;
uint32_t gpr4;
uint32_t gpr5;
uint32_t gpr6;
uint32_t gpr7;
uint32_t gpr8;
uint32_t gpr9;
uint32_t gpr10;
uint32_t gpr11;
uint32_t gpr12;
uint32_t gpr13; /* Play safe */
uint32_t gpr28; /* For internal use by the IRQ handler */
uint32_t gpr29; /* For internal use by the IRQ handler */
uint32_t gpr30; /* For internal use by the IRQ handler */
uint32_t gpr31; /* For internal use by the IRQ handler */
uint32_t cr; /* Bits of this are volatile, so no-one may save */
uint32_t ctr;
uint32_t xer;
uint32_t lr;
uint32_t pc;
uint32_t msr;
uint32_t pad[3];
} CPU_Interrupt_frame;
void C_dispatch_irq_handler(CPU_Interrupt_frame *frame, unsigned int excNum);
#endif
#endif

31
cpukit/score/cpu/powerpc/rtems/score/cpu.h
View File

@@ -437,37 +437,6 @@ typedef struct {
#endif /* (PPC_HAS_FPU == 1) */
} Context_Control_fp;
typedef struct CPU_Interrupt_frame {
uint32_t stacklink; /* Ensure this is a real frame (also reg1 save) */
uint32_t calleeLr; /* link register used by callees: SVR4/EABI */
/* This is what is left out of the primary contexts */
uint32_t gpr0;
uint32_t gpr2; /* play safe */
uint32_t gpr3;
uint32_t gpr4;
uint32_t gpr5;
uint32_t gpr6;
uint32_t gpr7;
uint32_t gpr8;
uint32_t gpr9;
uint32_t gpr10;
uint32_t gpr11;
uint32_t gpr12;
uint32_t gpr13; /* Play safe */
uint32_t gpr28; /* For internal use by the IRQ handler */
uint32_t gpr29; /* For internal use by the IRQ handler */
uint32_t gpr30; /* For internal use by the IRQ handler */
uint32_t gpr31; /* For internal use by the IRQ handler */
uint32_t cr; /* Bits of this are volatile, so no-one may save */
uint32_t ctr;
uint32_t xer;
uint32_t lr;
uint32_t pc;
uint32_t msr;
uint32_t pad[3];
} CPU_Interrupt_frame;
#endif /* ASM */
/*