RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

2008-09-25 Joel Sherrill <joel.sherrill@oarcorp.com>

Browse Source 
* Makefile.am, configure.ac, sh7032/score/cpu_asm.c,
	sh7045/score/cpu_asm.c, sh7750/score/cpu_asm.c: Move duplicated
	context switch code to score/cpu and provide an interrupt handling
	stub for the GDB SuperH simulator since it does not support
	interrupts or devices. This has been used to run tests on the
	simulator BSP as SH1, SH2, and SH4.
	* shgdb/score/cpu_asm.c, shgdb/score/ispshgdb.c: New files.
This commit is contained in:
Joel Sherrill
2008-09-25 19:32:15 +00:00
parent fa6f92df95
commit be7ca346fd
8 changed files with 251 additions and 454 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
c/src/lib/libcpu/sh/ChangeLog
View File

@@ -1,3 +1,13 @@
2008-09-25 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, configure.ac, sh7032/score/cpu_asm.c,
sh7045/score/cpu_asm.c, sh7750/score/cpu_asm.c: Move duplicated
context switch code to score/cpu and provide an interrupt handling
stub for the GDB SuperH simulator since it does not support
interrupts or devices. This has been used to run tests on the
simulator BSP as SH1, SH2, and SH4.
* shgdb/score/cpu_asm.c, shgdb/score/ispshgdb.c: New files.
2008-09-05 Joel Sherrill <joel.sherrill@OARcorp.com>
* sh7032/clock/ckinit.c, sh7045/clock/ckinit.c, sh7750/clock/ckinit.c:

8
c/src/lib/libcpu/sh/Makefile.am
View File

@@ -119,5 +119,13 @@ sh7750_timer_rel_CPPFLAGS = $(AM_CPPFLAGS)
sh7750_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
if shgdb
## sh7045/score
noinst_PROGRAMS += shgdb/score.rel
shgdb_score_rel_SOURCES = shgdb/score/cpu_asm.c shgdb/score/ispshgdb.c
shgdb_score_rel_CPPFLAGS = $(AM_CPPFLAGS)
shgdb_score_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../automake/local.am

1
c/src/lib/libcpu/sh/configure.ac
View File

@@ -24,6 +24,7 @@ RTEMS_PROG_CCAS
AM_CONDITIONAL([sh7032],[test x"$RTEMS_CPU_MODEL" = x"sh7032"])
AM_CONDITIONAL([sh7045],[test x"$RTEMS_CPU_MODEL" = x"sh7045"])
AM_CONDITIONAL([sh7750],[test x"$RTEMS_CPU_MODEL" = x"sh7750"])
AM_CONDITIONAL([shgdb],[test x"$RTEMS_CPU_MODEL" = x"shgdb"])
RTEMS_AMPOLISH3

127
c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c
View File

@@ -124,133 +124,6 @@ unsigned int sh_set_irq_priority(
return 0;
}
/*
* _CPU_Context_save_fp_context
*
* This routine is responsible for saving the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*/
void _CPU_Context_save_fp(
Context_Control_fp **fp_context_ptr
)
{
}
/*
* _CPU_Context_restore_fp_context
*
* This routine is responsible for restoring the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*/
void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
)
{
}
/* _CPU_Context_switch
*
* This routine performs a normal non-FP context switch.
*/
/* within __CPU_Context_switch:
* _CPU_Context_switch
* _CPU_Context_restore
*
* This routine is generally used only to restart self in an
* efficient manner. It may simply be a label in _CPU_Context_switch.
*
* NOTE: It should be safe not to store r4, r5
*
* NOTE: It is doubtful if r0 is really needed to be stored
*
* NOTE: gbr is added, but should not be necessary, as it is
* only used globally in this port.
*/
/*
* FIXME: This is an ugly hack, but we wanted to avoid recalculating
* the offset each time Context_Control is changed
*/
void __CPU_Context_switch(
Context_Control *run, /* r4 */
Context_Control *heir /* r5 */
)
{
asm volatile(
".global __CPU_Context_switch\n"
"__CPU_Context_switch:\n"
" add %0,r4\n"
" stc.l sr,@-r4\n"
" stc.l gbr,@-r4\n"
" mov.l r0,@-r4\n"
" mov.l r1,@-r4\n"
" mov.l r2,@-r4\n"
" mov.l r3,@-r4\n"
" mov.l r6,@-r4\n"
" mov.l r7,@-r4\n"
" mov.l r8,@-r4\n"
" mov.l r9,@-r4\n"
" mov.l r10,@-r4\n"
" mov.l r11,@-r4\n"
" mov.l r12,@-r4\n"
" mov.l r13,@-r4\n"
" mov.l r14,@-r4\n"
" sts.l pr,@-r4\n"
" sts.l mach,@-r4\n"
" sts.l macl,@-r4\n"
" mov.l r15,@-r4\n"
" mov r5, r4\n"
:: "i" (sizeof(Context_Control))
);
asm volatile(
".global __CPU_Context_restore\n"
"__CPU_Context_restore:\n"
" mov.l @r4+,r15\n"
" lds.l @r4+,macl\n"
" lds.l @r4+,mach\n"
" lds.l @r4+,pr\n"
" mov.l @r4+,r14\n"
" mov.l @r4+,r13\n"
" mov.l @r4+,r12\n"
" mov.l @r4+,r11\n"
" mov.l @r4+,r10\n"
" mov.l @r4+,r9\n"
" mov.l @r4+,r8\n"
" mov.l @r4+,r7\n"
" mov.l @r4+,r6\n"
" mov.l @r4+,r3\n"
" mov.l @r4+,r2\n"
" mov.l @r4+,r1\n"
" mov.l @r4+,r0\n"
" ldc.l @r4+,gbr\n"
" ldc.l @r4+,sr\n"
" rts\n"
" nop\n" );
}
/*
* This routine provides the RTEMS interrupt management.
*/

127
c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c
View File

@@ -126,133 +126,6 @@ unsigned int sh_set_irq_priority(
return 0;
}
/*
* _CPU_Context_save_fp_context
*
* This routine is responsible for saving the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*/
void _CPU_Context_save_fp(
Context_Control_fp **fp_context_ptr
)
{
}
/*
* _CPU_Context_restore_fp_context
*
* This routine is responsible for restoring the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*/
void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
)
{
}
/* _CPU_Context_switch
*
* This routine performs a normal non-FP context switch.
*/
/* within __CPU_Context_switch:
* _CPU_Context_switch
* _CPU_Context_restore
*
* This routine is generally used only to restart self in an
* efficient manner. It may simply be a label in _CPU_Context_switch.
*
* NOTE: It should be safe not to store r4, r5
*
* NOTE: It is doubtful if r0 is really needed to be stored
*
* NOTE: gbr is added, but should not be necessary, as it is
* only used globally in this port.
*/
/*
* FIXME: This is an ugly hack, but we wanted to avoid recalculating
* the offset each time Context_Control is changed
*/
void __CPU_Context_switch(
Context_Control *run, /* r4 */
Context_Control *heir /* r5 */
)
{
asm volatile("\n\
.global __CPU_Context_switch\n\
__CPU_Context_switch:\n\
\n\
add %0,r4\n\
\n\
stc.l sr,@-r4\n\
stc.l gbr,@-r4\n\
mov.l r0,@-r4\n\
mov.l r1,@-r4\n\
mov.l r2,@-r4\n\
mov.l r3,@-r4\n\
\n\
mov.l r6,@-r4\n\
mov.l r7,@-r4\n\
mov.l r8,@-r4\n\
mov.l r9,@-r4\n\
mov.l r10,@-r4\n\
mov.l r11,@-r4\n\
mov.l r12,@-r4\n\
mov.l r13,@-r4\n\
mov.l r14,@-r4\n\
sts.l pr,@-r4\n\
sts.l mach,@-r4\n\
sts.l macl,@-r4\n\
mov.l r15,@-r4\n\
\n\
mov r5, r4"
:: "i" (sizeof(Context_Control))
);
asm volatile("\n\
.global __CPU_Context_restore\n\
__CPU_Context_restore:\n\
mov.l @r4+,r15\n\
lds.l @r4+,macl\n\
lds.l @r4+,mach\n\
lds.l @r4+,pr\n\
mov.l @r4+,r14\n\
mov.l @r4+,r13\n\
mov.l @r4+,r12\n\
mov.l @r4+,r11\n\
mov.l @r4+,r10\n\
mov.l @r4+,r9\n\
mov.l @r4+,r8\n\
mov.l @r4+,r7\n\
mov.l @r4+,r6\n\
\n\
mov.l @r4+,r3\n\
mov.l @r4+,r2\n\
mov.l @r4+,r1\n\
mov.l @r4+,r0\n\
ldc.l @r4+,gbr\n\
ldc.l @r4+,sr\n\
\n\
rts\n\
nop" );
}
/*
* This routine provides the RTEMS interrupt management.
*/

200
c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c
View File

@@ -50,206 +50,6 @@ extern proc_ptr _Hardware_isr_Table[];
register unsigned long *stack_ptr asm("r15");
/*
* _CPU_Context_save_fp_context
*
* This routine is responsible for saving the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*/
void _CPU_Context_save_fp(
Context_Control_fp **fp_context_ptr /* r4 */
)
{
#if SH_HAS_FPU
asm volatile("\n\
mov.l @%0,r4 \n\
add %1,r4\n\
sts.l fpscr,@-r4\n\
sts.l fpul,@-r4\n\
lds %2,fpscr\n\
fmov dr14,@-r4\n\
fmov dr12,@-r4\n\
fmov dr10,@-r4\n\
fmov dr8,@-r4\n\
fmov dr6,@-r4\n\
fmov dr4,@-r4\n\
fmov dr2,@-r4\n\
fmov dr0,@-r4\n\
"
#ifdef SH4_USE_X_REGISTERS
"\
lds %3,fpscr\n\
fmov xd14,@-r4\n\
fmov xd12,@-r4\n\
fmov xd10,@-r4\n\
fmov xd8,@-r4\n\
fmov xd6,@-r4\n\
fmov xd4,@-r4\n\
fmov xd2,@-r4\n\
fmov xd0,@-r4\n\
"
#endif
"lds %4,fpscr\n\
"
:
: "r"(fp_context_ptr), "r"(sizeof(Context_Control_fp)),
"r"(SH4_FPSCR_SZ), "r"(SH4_FPSCR_PR | SH4_FPSCR_SZ), "r"(SH4_FPSCR_PR)
: "r4", "r0");
#endif
}
/*
* _CPU_Context_restore_fp_context
*
* This routine is responsible for restoring the FP context
* at *fp_context_ptr. If the point to load the FP context
* from is changed then the pointer is modified by this routine.
*
* Sometimes a macro implementation of this is in cpu.h which dereferences
* the ** and a similarly named routine in this file is passed something
* like a (Context_Control_fp *). The general rule on making this decision
* is to avoid writing assembly language.
*/
void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr /* r4 */
)
{
#if SH_HAS_FPU
asm volatile("\n\
mov.l @%0,r4 \n\
"
#ifdef SH4_USE_X_REGISTERS
"\n\
lds %1,fpscr\n\
fmov @r4+,xd0\n\
fmov @r4+,xd2\n\
fmov @r4+,xd4\n\
fmov @r4+,xd6\n\
fmov @r4+,xd8\n\
fmov @r4+,xd10\n\
fmov @r4+,xd12\n\
fmov @r4+,xd14\n\
"
#endif
"\n\
lds %2,fpscr\n\
fmov @r4+,dr0\n\
fmov @r4+,dr2\n\
fmov @r4+,dr4\n\
fmov @r4+,dr6\n\
fmov @r4+,dr8\n\
fmov @r4+,dr10\n\
fmov @r4+,dr12\n\
fmov @r4+,dr14\n\
lds.l @r4+,fpul\n\
lds.l @r4+,fpscr\n\
" :
: "r"(fp_context_ptr), "r"(SH4_FPSCR_PR | SH4_FPSCR_SZ), "r"(SH4_FPSCR_SZ)
: "r4", "r0");
#endif
}
/* _CPU_Context_switch
*
* This routine performs a normal non-FP context switch.
*/
/* within __CPU_Context_switch:
* _CPU_Context_switch
* _CPU_Context_restore
*
* This routine is generally used only to restart self in an
* efficient manner. It may simply be a label in _CPU_Context_switch.
*
* NOTE: It should be safe not to store r4, r5
*
* NOTE: It is doubtful if r0 is really needed to be stored
*
* NOTE: gbr is added, but should not be necessary, as it is
* only used globally in this port.
*/
/*
* FIXME: This is an ugly hack, but we wanted to avoid recalculating
* the offset each time Context_Control is changed
*/
void __CPU_Context_switch(
Context_Control *run, /* r4 */
Context_Control *heir /* r5 */
)
{
asm volatile("\n\
.global __CPU_Context_switch\n\
__CPU_Context_switch:\n\
\n\
add %0,r4\n\
\n\
stc.l sr,@-r4\n\
stc.l gbr,@-r4\n\
mov.l r0,@-r4\n\
mov.l r1,@-r4\n\
mov.l r2,@-r4\n\
mov.l r3,@-r4\n\
\n\
mov.l r6,@-r4\n\
mov.l r7,@-r4\n\
mov.l r8,@-r4\n\
mov.l r9,@-r4\n\
mov.l r10,@-r4\n\
mov.l r11,@-r4\n\
mov.l r12,@-r4\n\
mov.l r13,@-r4\n\
mov.l r14,@-r4\n\
sts.l pr,@-r4\n\
sts.l mach,@-r4\n\
sts.l macl,@-r4\n\
mov.l r15,@-r4\n\
\n\
mov r5, r4"
:: "i" (sizeof(Context_Control))
);
asm volatile("\n\
.global __CPU_Context_restore\n\
__CPU_Context_restore:\n\
mov.l @r4+,r15\n\
lds.l @r4+,macl\n\
lds.l @r4+,mach\n\
lds.l @r4+,pr\n\
mov.l @r4+,r14\n\
mov.l @r4+,r13\n\
mov.l @r4+,r12\n\
mov.l @r4+,r11\n\
mov.l @r4+,r10\n\
mov.l @r4+,r9\n\
mov.l @r4+,r8\n\
mov.l @r4+,r7\n\
mov.l @r4+,r6\n\
\n\
mov.l @r4+,r3\n\
mov.l @r4+,r2\n\
mov.l @r4+,r1\n\
mov.l @r4+,r0\n\
ldc.l @r4+,gbr\n\
ldc.l @r4+,sr\n\
\n\
rts\n\
nop" );
}
/*
* This routine provides the RTEMS interrupt management.
*/

83
c/src/lib/libcpu/sh/shgdb/score/cpu_asm.c Normal file
View File

@@ -0,0 +1,83 @@
/*
* Support for SuperH Simulator in GDB
*
* COPYRIGHT (c) 1989-2008.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems/system.h>
#include <rtems/score/cpu.h>
#include <rtems/score/isr.h>
#include <rtems/score/thread.h>
#include <rtems/score/sh.h>
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
unsigned long *_old_stack_ptr;
#endif
register unsigned long *stack_ptr asm("r15");
/*
* This routine provides the RTEMS interrupt management.
*/
void __ISR_Handler( uint32_t vector)
{
ISR_Level level;
_ISR_Disable( level );
_Thread_Dispatch_disable_level++;
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
if( _ISR_Nest_level == 0 )
{
/* Install irq stack */
_old_stack_ptr = stack_ptr;
stack_ptr = _CPU_Interrupt_stack_high;
}
#endif
_ISR_Nest_level++;
_ISR_Enable( level );
/* call isp */
if( _ISR_Vector_table[ vector])
(*_ISR_Vector_table[ vector ])( vector );
_ISR_Disable( level );
_Thread_Dispatch_disable_level--;
_ISR_Nest_level--;
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
if( _ISR_Nest_level == 0 )
/* restore old stack pointer */
stack_ptr = _old_stack_ptr;
#endif
_ISR_Enable( level );
if ( _ISR_Nest_level )
return;
if ( _Thread_Dispatch_disable_level ) {
_ISR_Signals_to_thread_executing = FALSE;
return;
}
if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
_ISR_Signals_to_thread_executing = FALSE;
_Thread_Dispatch();
}
}

149
c/src/lib/libcpu/sh/shgdb/score/ispshgdb.c Normal file
View File

@@ -0,0 +1,149 @@
/*
* This file contains the isp frames for the user interrupts.
* From these procedures __ISR_Handler is called with the vector number
* as argument.
*
* __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in
* some releases of gcc doesn't properly handle #pragma interrupt, if a
* file contains both isrs and normal functions.
*
* Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
* Bernd Becker (becker@faw.uni-ulm.de)
*
* COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE
*
*
* COPYRIGHT (c) 1998.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* Modified to reflect dummy isp entries for GDB SH simulator by Joel.
*
* $Id$
*/
#include <rtems/system.h>
#include <rtems/score/types.h>
/*
* This is a exception vector table
*
* It has the same structure as the actual vector table (vectab)
*/
void _dummy_isp(uint32_t);
proc_ptr _Hardware_isr_Table[256]={
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* PWRon Reset, Maual Reset,...*/
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
/* trapa 0 -31 */
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* irq 152-155*/
_dummy_isp
};
#define Str(a)#a
/*
* Some versions of gcc and all version of egcs at least until egcs-1.1b
* are not able to handle #pragma interrupt correctly if more than 1 isr is
* contained in a file and when optimizing.
* We try to work around this problem by using the macro below.
*/
#define isp( name, number, func)\
asm (".global _"Str(name)"\n\t"\
"_"Str(name)": \n\t"\
" mov.l r0,@-r15 \n\t"\
" mov.l r1,@-r15 \n\t"\
" mov.l r2,@-r15 \n\t"\
" mov.l r3,@-r15 \n\t"\
" mov.l r4,@-r15 \n\t"\
" mov.l r5,@-r15 \n\t"\
" mov.l r6,@-r15 \n\t"\
" mov.l r7,@-r15 \n\t"\
" mov.l r14,@-r15 \n\t"\
" sts.l pr,@-r15 \n\t"\
" sts.l mach,@-r15 \n\t"\
" sts.l macl,@-r15 \n\t"\
" mov r15,r14 \n\t"\
" mov.l "Str(name)"_v, r2 \n\t"\
" mov.l "Str(name)"_k, r1\n\t"\
" jsr @r1 \n\t"\
" mov r2,r4 \n\t"\
" mov r14,r15 \n\t"\
" lds.l @r15+,macl \n\t"\
" lds.l @r15+,mach \n\t"\
" lds.l @r15+,pr \n\t"\
" mov.l @r15+,r14 \n\t"\
" mov.l @r15+,r7 \n\t"\
" mov.l @r15+,r6 \n\t"\
" mov.l @r15+,r5 \n\t"\
" mov.l @r15+,r4 \n\t"\
" mov.l @r15+,r3 \n\t"\
" mov.l @r15+,r2 \n\t"\
" mov.l @r15+,r1 \n\t"\
" mov.l @r15+,r0 \n\t"\
" rte \n\t"\
" nop \n\t"\
" .align 2 \n\t"\
#name"_k: \n\t"\
".long "Str(func)"\n\t"\
#name"_v: \n\t"\
".long "Str(number));
/************************************************
* Dummy interrupt service procedure for
* interrupts being not allowed --> Trap 34
************************************************/
asm(" .section .text\n\
.global __dummy_isp\n\
__dummy_isp:\n\
mov.l r14,@-r15\n\
mov r15, r14\n\
trapa #34\n\
mov.l @r15+,r14\n\
rte\n\
nop");