forked from Imagelibrary/rtems
Add code to maintain CPU load average.
This commit is contained in:
@@ -1,3 +1,8 @@
|
|||||||
|
2006-01-29 Eric Norum <norume@aps.anl.gov>
|
||||||
|
|
||||||
|
* clock/clock.c, network/network.c, startup/bspstart.c:
|
||||||
|
Add an 'extended BSP' routine which returns the CPU load average.
|
||||||
|
|
||||||
2006-01-11 Ralf Corsepius <ralf.corsepius@rtems.org>
|
2006-01-11 Ralf Corsepius <ralf.corsepius@rtems.org>
|
||||||
|
|
||||||
* Makefile.am: Add preinstall.am.
|
* Makefile.am: Add preinstall.am.
|
||||||
|
|||||||
@@ -22,13 +22,28 @@
|
|||||||
*/
|
*/
|
||||||
#define CLOCK_VECTOR (64+58)
|
#define CLOCK_VECTOR (64+58)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* CPU load counters
|
||||||
|
* Place in static RAM so updates don't hit the SDRAM
|
||||||
|
*/
|
||||||
|
extern int __SRAMBASE[];
|
||||||
|
#define IDLE_COUNTER __SRAMBASE[0]
|
||||||
|
#define FILTERED_IDLE __SRAMBASE[1]
|
||||||
|
#define MAX_IDLE_COUNT __SRAMBASE[2]
|
||||||
|
#define FILTER_SHIFT 6
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Periodic interval timer interrupt handler
|
* Periodic interval timer interrupt handler
|
||||||
*/
|
*/
|
||||||
#define Clock_driver_support_at_tick() \
|
#define Clock_driver_support_at_tick() \
|
||||||
do { \
|
do { \
|
||||||
MCF5282_PIT3_PCSR |= MCF5282_PIT_PCSR_PIF; \
|
int idle = IDLE_COUNTER; \
|
||||||
} while (0) \
|
IDLE_COUNTER = 0; \
|
||||||
|
if (idle > MAX_IDLE_COUNT) \
|
||||||
|
MAX_IDLE_COUNT = idle; \
|
||||||
|
FILTERED_IDLE = idle + FILTERED_IDLE - (FILTERED_IDLE>>FILTER_SHIFT);\
|
||||||
|
MCF5282_PIT3_PCSR |= MCF5282_PIT_PCSR_PIF; \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Attach clock interrupt handler
|
* Attach clock interrupt handler
|
||||||
@@ -61,6 +76,9 @@
|
|||||||
preScaleDivisor >>= 1; \
|
preScaleDivisor >>= 1; \
|
||||||
preScaleCode++; \
|
preScaleCode++; \
|
||||||
} \
|
} \
|
||||||
|
IDLE_COUNTER = 0; \
|
||||||
|
FILTERED_IDLE = 0; \
|
||||||
|
MAX_IDLE_COUNT = 0; \
|
||||||
bsp_allocate_interrupt(PIT3_IRQ_LEVEL, PIT3_IRQ_PRIORITY); \
|
bsp_allocate_interrupt(PIT3_IRQ_LEVEL, PIT3_IRQ_PRIORITY); \
|
||||||
MCF5282_INTC0_ICR58 = MCF5282_INTC_ICR_IL(PIT3_IRQ_LEVEL) | \
|
MCF5282_INTC0_ICR58 = MCF5282_INTC_ICR_IL(PIT3_IRQ_LEVEL) | \
|
||||||
MCF5282_INTC_ICR_IP(PIT3_IRQ_PRIORITY); \
|
MCF5282_INTC_ICR_IP(PIT3_IRQ_PRIORITY); \
|
||||||
@@ -68,6 +86,10 @@
|
|||||||
MCF5282_INTC0_IMRH &= ~MCF5282_INTC_IMRH_INT58; \
|
MCF5282_INTC0_IMRH &= ~MCF5282_INTC_IMRH_INT58; \
|
||||||
MCF5282_PIT3_PCSR &= ~MCF5282_PIT_PCSR_EN; \
|
MCF5282_PIT3_PCSR &= ~MCF5282_PIT_PCSR_EN; \
|
||||||
rtems_interrupt_enable( level ); \
|
rtems_interrupt_enable( level ); \
|
||||||
|
MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) | \
|
||||||
|
MCF5282_PIT_PCSR_OVW | \
|
||||||
|
MCF5282_PIT_PCSR_PIE | \
|
||||||
|
MCF5282_PIT_PCSR_RLD; \
|
||||||
MCF5282_PIT3_PMR = BSP_Configuration.microseconds_per_tick - 1; \
|
MCF5282_PIT3_PMR = BSP_Configuration.microseconds_per_tick - 1; \
|
||||||
MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) | \
|
MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) | \
|
||||||
MCF5282_PIT_PCSR_PIE | \
|
MCF5282_PIT_PCSR_PIE | \
|
||||||
@@ -75,4 +97,18 @@
|
|||||||
MCF5282_PIT_PCSR_EN; \
|
MCF5282_PIT_PCSR_EN; \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Provide our own version of the idle task
|
||||||
|
*/
|
||||||
|
void _BSP_Thread_Idle_body(void)
|
||||||
|
{
|
||||||
|
for(;;)
|
||||||
|
asm volatile ("addq.l #1,__SRAMBASE"); /* Atomic increment */
|
||||||
|
}
|
||||||
|
|
||||||
|
int rtems_bsp_cpu_load_percentage(void)
|
||||||
|
{
|
||||||
|
return 100 - ((100 * (FILTERED_IDLE >> FILTER_SHIFT)) / MAX_IDLE_COUNT);
|
||||||
|
}
|
||||||
|
|
||||||
#include "../../../shared/clockdrv_shell.c"
|
#include "../../../shared/clockdrv_shell.c"
|
||||||
|
|||||||
@@ -194,12 +194,13 @@ mcf5282_mii_interrupt_handler( rtems_vector_number v )
|
|||||||
/*
|
/*
|
||||||
* Allocate buffer descriptors from (non-cached) on-chip static RAM
|
* Allocate buffer descriptors from (non-cached) on-chip static RAM
|
||||||
* Ensure 128-bit (16-byte) alignment
|
* Ensure 128-bit (16-byte) alignment
|
||||||
|
* Allow some space at the beginning for other diagnostic counters
|
||||||
*/
|
*/
|
||||||
static mcf5282BufferDescriptor_t *
|
static mcf5282BufferDescriptor_t *
|
||||||
mcf5282_bd_allocate(unsigned int count)
|
mcf5282_bd_allocate(unsigned int count)
|
||||||
{
|
{
|
||||||
extern char __SRAMBASE[];
|
extern char __SRAMBASE[];
|
||||||
static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)__SRAMBASE;
|
static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)(__SRAMBASE+16);
|
||||||
mcf5282BufferDescriptor_t *p = bdp;
|
mcf5282BufferDescriptor_t *p = bdp;
|
||||||
|
|
||||||
bdp += count;
|
bdp += count;
|
||||||
|
|||||||
@@ -221,7 +221,10 @@ void bsp_start( void )
|
|||||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||||
Cpu_table.do_zero_of_workspace = TRUE;
|
Cpu_table.do_zero_of_workspace = TRUE;
|
||||||
Cpu_table.interrupt_stack_size = 4096;
|
Cpu_table.interrupt_stack_size = 4096;
|
||||||
|
{
|
||||||
|
extern void _BSP_Thread_Idle_body(void);
|
||||||
|
_CPU_Table.idle_task = _BSP_Thread_Idle_body;
|
||||||
|
}
|
||||||
Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
|
Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|||||||
Reference in New Issue
Block a user