dev/irq: Improve Doxgyen group assignments

Make the GIC interrupt controller support a subgroup of the generic interrupt
controller support.

bsps/shared/dev/irq/arm-gicv2-get-attributes.c

@@ -3,9 +3,10 @@
 /**
  * @file
  *
- * @ingroup RTEMSBSPsShared
+ * @ingroup DevIRQGIC
  *
- * @brief This source file contains the interrupt get attribute implementation.
+ * @brief This source file contains the implementation of
+ *   bsp_interrupt_get_attributes() for the GICv2.
  */
 
 /*

bsps/shared/dev/irq/arm-gicv2-zynqmp.c

@@ -3,9 +3,11 @@
 /**
  * @file
  *
- * @ingroup RTEMSBSPsShared
+ * @ingroup DevIRQGIC
  *
- * @brief This source file contains the interrupt get attribute implementation.
+ * @brief This source file contains the implementation of
+ *   bsp_interrupt_get_attributes() for the GICv2 of Xilinx Zynq UltraScale+
+ *   MPSoC and RFSoC devices.
  */
 
 /*

bsps/shared/dev/irq/arm-gicv2.c

@@ -3,9 +3,10 @@
 /**
  * @file
  *
- * @ingroup RTEMSBSPsARMShared
+ * @ingroup DevIRQGIC
  *
- * @brief This source file contains the implementation of ARM GICv2 support.
+ * @brief This source file contains the implementation of the generic GICv2
+ *   support.
  */
 
 /*

bsps/shared/dev/irq/arm-gicv3.c

@@ -1,6 +1,15 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
  *
+ * @ingroup DevIRQGIC
+ *
+ * @brief This source file contains the implementation of the generic GICv3
+ *   support.
+ */
+
+/*
  * Copyright (C) 2019 On-Line Applications Research Corporation (OAR)
  *
  * Redistribution and use in source and binary forms, with or without