bsps/aarch64: Simplify SMP support

Remove copy and paste from the arm SMP support.  The shared aarch64
implementation of rtems_cache_enable_data() does not enable a particular
cache, it just enables the C bit in the SCTLR_EL1.  This is already done
in aarch64_mmu_enable().  There is no need to wait for secondary
processors in _CPU_SMP_Start_processor().

bsps/shared/start/bspsmp-arm-psci.c

@@ -84,9 +84,5 @@ bool _CPU_SMP_Start_processor( uint32_t cpu_index )
     REGISTER_PREFIX "3"
   );
 
-  if ( ret != 0 ) {
-    return false;
-  }
-
-  return _Per_CPU_State_wait_for_non_initial_state( cpu_index, 0 );
+  return ret == 0;
 }