From bbacebe20966a1bfdd18e1d5808a55d0d9e40021 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Wed, 13 Jul 2011 20:24:04 +0000 Subject: [PATCH] 2011-07-13 Sebastian Huber PR 1832/libcpu * at91rm9200/irq/irq.c: he bsp_interrupt_dispatch routine does not determine the correct interrupt source number. According to the datasheet, the reading of the interrupt vector register (AIC_IVR) notifies the hardware that the OS is taken care of the interrupt. Only after AIC_IVR have been read can the correct source number be read from the interrupt status register (AIC_ISR). --- c/src/lib/libcpu/arm/ChangeLog | 10 ++++++++++ c/src/lib/libcpu/arm/at91rm9200/irq/irq.c | 8 +++++++- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/c/src/lib/libcpu/arm/ChangeLog b/c/src/lib/libcpu/arm/ChangeLog index 26978f643d..22da65f790 100644 --- a/c/src/lib/libcpu/arm/ChangeLog +++ b/c/src/lib/libcpu/arm/ChangeLog @@ -1,3 +1,13 @@ +2011-07-13 Sebastian Huber + + PR 1832/libcpu + * at91rm9200/irq/irq.c: he bsp_interrupt_dispatch routine does not + determine the correct interrupt source number. According to the + datasheet, the reading of the interrupt vector register (AIC_IVR) + notifies the hardware that the OS is taken care of the interrupt. + Only after AIC_IVR have been read can the correct source number be + read from the interrupt status register (AIC_ISR). + 2011-06-07 Sebastian Huber * shared/include/cache_.h: Moved content of "cache.h" to "cache_.h". diff --git a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c index a2b34d4525..12a0df6f6f 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c +++ b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c @@ -21,7 +21,7 @@ void bsp_interrupt_dispatch(void) { - rtems_vector_number vector = AIC_CTL_REG(AIC_ISR); + rtems_vector_number vector = AIC_CTL_REG(AIC_IVR); bsp_interrupt_handler_dispatch(vector); @@ -44,6 +44,12 @@ rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) rtems_status_code bsp_interrupt_facility_initialize(void) { + unsigned long i = 0; + + for (i = 0; i < 32; ++i) { + AIC_SVR_REG(i<<2) = i; + } + /* disable all interrupts */ AIC_CTL_REG(AIC_IDCR) = 0xffffffff;