forked from Imagelibrary/rtems
Cosmetics.
This commit is contained in:
@@ -11,7 +11,7 @@ RTEMS_BSP=bare
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RTEMS_CPU_MODEL=$(BARE_CPU_MODEL)
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CPU_CFLAGS=$(BARE_CPU_CFLAGS)
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CPU_CFLAGS =$(BARE_CPU_CFLAGS)
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include $(RTEMS_ROOT)/make/custom/default.cfg
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@@ -7,7 +7,7 @@
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include $(RTEMS_ROOT)/make/custom/default.cfg
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RTEMS_CPU_MODEL=c40
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CPU_CFLAGS=-mcpu=40 #-msmall
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CPU_CFLAGS = -mcpu=40 #-msmall
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# This is the actual bsp directory used during the build process.
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RTEMS_BSP_FAMILY=c4xsim
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@@ -16,7 +16,7 @@ RTEMS_BSP_FAMILY=csb350
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# and (hopefully) optimize for it.
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#
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# gcc 3.1 and newer
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CPU_CFLAGS=-mips32 -G0 -msoft-float
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CPU_CFLAGS = -mips32 -G0 -msoft-float
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2 -g
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@@ -15,7 +15,7 @@ RTEMS_BSP_FAMILY=eZKit533
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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#
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CPU_CFLAGS=
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CPU_CFLAGS =
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# optimize flag: typically -O2
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# gcc-4.2.0 segfaults on -OX > -O0
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@@ -21,7 +21,7 @@ RTEMS_BSP_FAMILY=gen68360
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# You must use versions of gcc and gas that support the -mcpu32 option.
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#
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ifeq ($(RTEMS_GEN68360_COMPANION_MODE),yes)
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CPU_CFLAGS= -m68040
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CPU_CFLAGS = -m68040
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else
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CPU_CFLAGS = -mcpu32
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endif
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@@ -15,7 +15,7 @@ RTEMS_BSP_FAMILY=genmongoosev
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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#
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CPU_CFLAGS=-mips1 -G0
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CPU_CFLAGS = -mips1 -G0
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2 -g
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@@ -20,7 +20,7 @@ RTEMS_BSP_FAMILY=gensh1
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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#
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CPU_CFLAGS=-m1
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CPU_CFLAGS = -m1
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2
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@@ -20,7 +20,7 @@ RTEMS_BSP_FAMILY=gensh2
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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#
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CPU_CFLAGS= -m2
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CPU_CFLAGS = -m2
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2
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@@ -23,11 +23,11 @@ RTEMS_BSP_FAMILY=gensh4
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#
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# Seems to be good without initialisation FPSCR.
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# Also works with SH4_FPSCR_DN bit set.
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#CPU_CFLAGS= -m4-single-only -mfmovd -ml
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#CPU_CFLAGS= -m4-single -ml
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#CPU_CFLAGS = -m4-single-only -mfmovd -ml
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#CPU_CFLAGS = -m4-single -ml
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#
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# It works with SH4_FPSCR_PR bit set
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CPU_CFLAGS= -m4 -ml
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CPU_CFLAGS = -m4 -ml
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2
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@@ -15,7 +15,7 @@ RTEMS_BSP_FAMILY=h8sim
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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#
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CPU_CFLAGS=-mh -mint32
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CPU_CFLAGS = -mh -mint32
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2
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@@ -16,9 +16,9 @@ RTEMS_BSP_FAMILY=jmr3904
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# and (hopefully) optimize for it.
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#
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# gcc 2.95.x and 3.0
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#CPU_CFLAGS=-m3900 -G0
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#CPU_CFLAGS = -m3900 -G0
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# gcc 3.1 and newer
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CPU_CFLAGS=-march=r3900 -Wa,-xgot -G0
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CPU_CFLAGS = -march=r3900 -Wa,-xgot -G0
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2
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@@ -13,7 +13,7 @@ RTEMS_CPU_MODEL=m68030
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RTEMS_BSP_FAMILY=mvme147
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# default flags
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CPU_CFLAGS=
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CPU_CFLAGS =
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O4 -fomit-frame-pointer
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@@ -18,7 +18,7 @@ RTEMS_BSP_FAMILY = nios2_iss
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# "-Gx" tells gcc to put objects of up to x bytes into sections sdata/sbss
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# where they could be addressed using the global pointer gp. -G0 effectively
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# disables the use of gp.
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CPU_CFLAGS=-mno-hw-mul -mno-hw-div
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CPU_CFLAGS = -mno-hw-mul -mno-hw-div
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#######
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@@ -8,9 +8,9 @@ RTEMS_CPU_MODEL=i486dx
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# gcc 2.95.x and 3.0
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#CPU_CFLAGS = -m486
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# gcc 3.1 and newer
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# CPU_CFLAGS=-mcpu=i486
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# CPU_CFLAGS = -mcpu=i486
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# gcc 4.0 and newer
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CPU_CFLAGS=-mtune=i486
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CPU_CFLAGS = -mtune=i486
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include $(RTEMS_ROOT)/make/custom/pc386.cfg
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@@ -8,9 +8,9 @@ RTEMS_CPU_MODEL=pentium
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# gcc 2.95.x and 3.0
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#CPU_CFLAGS = -mpentium
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# gcc 3.1 and newer
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# CPU_CFLAGS=-mcpu=pentium
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# CPU_CFLAGS = -mcpu=pentium
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# gcc 4.0 and newer
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CPU_CFLAGS=-mtune=pentium
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CPU_CFLAGS = -mtune=pentium
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include $(RTEMS_ROOT)/make/custom/pc386.cfg
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@@ -8,9 +8,9 @@ RTEMS_CPU_MODEL=pentiumpro
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# gcc 2.95.x and 3.0
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#CPU_CFLAGS = -mpentiumpro
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# gcc 3.1 and newer
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# CPU_CFLAGS=-mcpu=pentiumpro
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# CPU_CFLAGS = -mcpu=pentiumpro
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# gcc 4.0 and newer
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CPU_CFLAGS=-mtune=pentiumpro
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CPU_CFLAGS = -mtune=pentiumpro
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include $(RTEMS_ROOT)/make/custom/pc386.cfg
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@@ -15,7 +15,7 @@ RTEMS_BSP_FAMILY=shsim
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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#
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CPU_CFLAGS=-m1
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CPU_CFLAGS = -m1
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2 -g
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@@ -23,10 +23,10 @@ RTEMS_BSP_FAMILY=simsh4
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#
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# Seems to be good without initialisation FPSCR.
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# Also works with SH4_FPSCR_DN bit set.
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#CPU_CFLAGS= -m4-single-only -ml
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#CPU_CFLAGS = -m4-single-only -ml
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#
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# It works with SH4_FPSCR_PR bit set
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CPU_CFLAGS= -m4 -ml
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CPU_CFLAGS = -m4 -ml
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# optimize flag: typically -O2
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@@ -17,7 +17,7 @@ RTEMS_CPU_MODEL=sh7032
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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#
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CPU_CFLAGS=-m1
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CPU_CFLAGS = -m1
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2
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@@ -17,7 +17,7 @@ RTEMS_CPU_MODEL=sh7045
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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#
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CPU_CFLAGS=-m2
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CPU_CFLAGS = -m2
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2
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