forked from Imagelibrary/rtems
Changed name of W, X, and Y macros for fields in the Clock
Synthesizer Control Register to remove use of single letter names.
This commit is contained in:
@@ -108,15 +108,15 @@
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#define SYNCR SIM_VOLATILE_USHORT_POINTER(0x04 + SIM_CRB)
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/* Clock Synthesizer Control Register */
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#define W 0x8000 /* Frequency Control (VCO) */
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#define X 0x4000 /* Frequency Control Bit (Prescale) */
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#define Y 0x3f00 /* Frequency Control Counter */
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#define EDIV 0x0080 /* ECLK Divide Rate */
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#define SLIMP 0x0010 /* Limp Mode Status */
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#define SLOCK 0x0008 /* Synthesizer Lock */
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#define RSTEN 0x0004 /* Reset Enable */
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#define STSIM 0x0002 /* Stop Mode SIM Clock */
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#define STEXT 0x0001 /* Stop Mode External Clock */
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#define VCO 0x8000 /* Frequency Control (VCO) */
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#define PRESCALE 0x4000 /* Frequency Control Bit (Prescale) */
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#define COUNTER 0x3f00 /* Frequency Control Counter */
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#define EDIV 0x0080 /* ECLK Divide Rate */
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#define SLIMP 0x0010 /* Limp Mode Status */
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#define SLOCK 0x0008 /* Synthesizer Lock */
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#define RSTEN 0x0004 /* Reset Enable */
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#define STSIM 0x0002 /* Stop Mode SIM Clock */
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#define STEXT 0x0001 /* Stop Mode External Clock */
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@@ -108,15 +108,15 @@
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#define SYNCR SIM_VOLATILE_USHORT_POINTER(0x04 + SIM_CRB)
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/* Clock Synthesizer Control Register */
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#define W 0x8000 /* Frequency Control (VCO) */
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#define X 0x4000 /* Frequency Control Bit (Prescale) */
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#define Y 0x3f00 /* Frequency Control Counter */
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#define EDIV 0x0080 /* ECLK Divide Rate */
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#define SLIMP 0x0010 /* Limp Mode Status */
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#define SLOCK 0x0008 /* Synthesizer Lock */
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#define RSTEN 0x0004 /* Reset Enable */
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#define STSIM 0x0002 /* Stop Mode SIM Clock */
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#define STEXT 0x0001 /* Stop Mode External Clock */
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#define VCO 0x8000 /* Frequency Control (VCO) */
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#define PRESCALE 0x4000 /* Frequency Control Bit (Prescale) */
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#define COUNTER 0x3f00 /* Frequency Control Counter */
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#define EDIV 0x0080 /* ECLK Divide Rate */
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#define SLIMP 0x0010 /* Limp Mode Status */
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#define SLOCK 0x0008 /* Synthesizer Lock */
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#define RSTEN 0x0004 /* Reset Enable */
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#define STSIM 0x0002 /* Stop Mode SIM Clock */
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#define STEXT 0x0001 /* Stop Mode External Clock */
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@@ -108,15 +108,15 @@
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#define SYNCR SIM_VOLATILE_USHORT_POINTER(0x04 + SIM_CRB)
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/* Clock Synthesizer Control Register */
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#define W 0x8000 /* Frequency Control (VCO) */
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#define X 0x4000 /* Frequency Control Bit (Prescale) */
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#define Y 0x3f00 /* Frequency Control Counter */
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#define EDIV 0x0080 /* ECLK Divide Rate */
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#define SLIMP 0x0010 /* Limp Mode Status */
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#define SLOCK 0x0008 /* Synthesizer Lock */
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#define RSTEN 0x0004 /* Reset Enable */
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#define STSIM 0x0002 /* Stop Mode SIM Clock */
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#define STEXT 0x0001 /* Stop Mode External Clock */
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#define VCO 0x8000 /* Frequency Control (VCO) */
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#define PRESCALE 0x4000 /* Frequency Control Bit (Prescale) */
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#define COUNTER 0x3f00 /* Frequency Control Counter */
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#define EDIV 0x0080 /* ECLK Divide Rate */
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#define SLIMP 0x0010 /* Limp Mode Status */
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#define SLOCK 0x0008 /* Synthesizer Lock */
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#define RSTEN 0x0004 /* Reset Enable */
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#define STSIM 0x0002 /* Stop Mode SIM Clock */
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#define STEXT 0x0001 /* Stop Mode External Clock */
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