Patch from Jiri Gaisler <jgais@ws.estec.esa.nl>:

+ interrupt masking correction
  + FPU rev.B workaround
  + minor erc32 related fixes
This commit is contained in:
Joel Sherrill
1999-07-09 17:08:48 +00:00
parent cc17eba0cb
commit b73e57bffe
19 changed files with 285 additions and 66 deletions

View File

@@ -150,7 +150,8 @@ SYM(CLOCK_SPEED):
* installed before.
*/
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 80 - 82
TRAP( 0x80, SYM(syscall) ); ! 80 syscall SW trap
SOFT_TRAP; SOFT_TRAP; ! 81 - 82
TRAP( 0x83, SYM(window_flush_trap_handler) ); ! 83 flush windows SW trap
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 84 - 87
@@ -212,20 +213,44 @@ SYM(hard_reset):
ld [%g3], %g2
set 0xfe080000, %g1
andcc %g1, %g2, %g0
bne 1f
set 0x00101000, %g1 ! 2M ROM, 4M RAM
! set the Memory Configuration
st %g1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
set SYM(RAM_END), %sp ! End of work-space area
st %sp, [%g6]
bne 2f
/* Set the correct memory size in MEC memory config register */
set SYM(PROM_SIZE), %l0
set 0, %l1
srl %l0, 18, %l0
1:
tst %l0
srl %l0, 1, %l0
bne,a 1b
inc %l1
sll %l1, 8, %l1
set SYM(RAM_SIZE), %l0
srl %l0, 19, %l0
1:
tst %l0
srl %l0, 1, %l0
bne,a 1b
inc %l1
sll %l1, 10, %l1
! set the Memory Configuration
st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker
set SYM(RAM_SIZE), %l2
add %l1, %l2, %sp
st %sp, [%g6]
set SYM(CLOCK_SPEED), %g6 ! Use 14 MHz in simulator
set 14, %g1
st %g1, [%g6]
/* Common initialisation */
1:
2:
set WIM_INIT, %g1 ! Initialize WIM
mov %g1, %wim
@@ -298,6 +323,7 @@ zerobss:
PUBLIC(BSP_fatal_return)
SYM(BSP_fatal_return):
mov 1, %g1
ta 0 ! Halt if _main returns ...
nop

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@@ -150,7 +150,8 @@ SYM(CLOCK_SPEED):
* installed before.
*/
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 80 - 82
TRAP( 0x80, SYM(syscall) ); ! 80 syscall SW trap
SOFT_TRAP; SOFT_TRAP; ! 81 - 82
TRAP( 0x83, SYM(window_flush_trap_handler) ); ! 83 flush windows SW trap
SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 84 - 87
@@ -212,20 +213,44 @@ SYM(hard_reset):
ld [%g3], %g2
set 0xfe080000, %g1
andcc %g1, %g2, %g0
bne 1f
set 0x00101000, %g1 ! 2M ROM, 4M RAM
! set the Memory Configuration
st %g1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
set SYM(RAM_END), %sp ! End of work-space area
st %sp, [%g6]
bne 2f
/* Set the correct memory size in MEC memory config register */
set SYM(PROM_SIZE), %l0
set 0, %l1
srl %l0, 18, %l0
1:
tst %l0
srl %l0, 1, %l0
bne,a 1b
inc %l1
sll %l1, 8, %l1
set SYM(RAM_SIZE), %l0
srl %l0, 19, %l0
1:
tst %l0
srl %l0, 1, %l0
bne,a 1b
inc %l1
sll %l1, 10, %l1
! set the Memory Configuration
st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker
set SYM(RAM_SIZE), %l2
add %l1, %l2, %sp
st %sp, [%g6]
set SYM(CLOCK_SPEED), %g6 ! Use 14 MHz in simulator
set 14, %g1
st %g1, [%g6]
/* Common initialisation */
1:
2:
set WIM_INIT, %g1 ! Initialize WIM
mov %g1, %wim
@@ -298,6 +323,7 @@ zerobss:
PUBLIC(BSP_fatal_return)
SYM(BSP_fatal_return):
mov 1, %g1
ta 0 ! Halt if _main returns ...
nop

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@@ -30,8 +30,9 @@ void bsp_cleanup( void )
{
/*
* "halt" by trapping to the simulator command line.
* set %g1 to 1 to detect clean exit.
*/
asm volatile( "ta 0" );
asm volatile( "mov 1, %g1; ta 0" );
}

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@@ -36,28 +36,36 @@ __DYNAMIC = 0;
*
* _CLOCK_SPEED in Mhz (used to program the counter/timers)
*
* _PROM_SIZE size of PROM (permissible values are 4K, 8K, 16K
* 32K, 64K, 128K, 256K, and 512K)
* _PROM_SIZE size of PROM (permissible values are 128K, 256K,
* 512K, 1M, 2M, 4M, 8M and 16M)
* _RAM_SIZE size of RAM (permissible values are 256K, 512K,
* 1MB, 2Mb, 4Mb, 8Mb, 16Mb, and 32Mb)
* 1M, 2M, 4M, 8M, 16M, and 32M)
*
* MAKE SURE THESE MATCH THE MEMORY DESCRIPTION SECTION!!!
*/
/*
_CLOCK_SPEED = 10;
*/
/* Default values, can be overridden */
_PROM_SIZE = 512K;
_RAM_SIZE = 2M;
_PROM_SIZE = 2M;
_RAM_SIZE = 4M;
_RAM_START = 0x02000000;
_RAM_END = _RAM_START + _RAM_SIZE;
RAM_END = _RAM_END;
_PROM_START = 0x00000000;
_PROM_END = _PROM_START + _PROM_SIZE;
/*
* Alternate names without leading _.
*/
PROM_START = _PROM_START;
PROM_SIZE = _PROM_SIZE;
PROM_END = _PROM_END;
RAM_START = _RAM_START;
RAM_SIZE = _RAM_SIZE;
RAM_END = _RAM_END;
/*
* Base address of the on-CPU peripherals
*/
@@ -65,10 +73,12 @@ _PROM_END = _PROM_START + _PROM_SIZE;
_ERC32_MEC = 0x01f80000;
ERC32_MEC = 0x01f80000;
/* these are the maximum values */
MEMORY
{
rom : ORIGIN = 0x00000000, LENGTH = 512K
ram : ORIGIN = 0x02000000, LENGTH = 2M
rom : ORIGIN = 0x00000000, LENGTH = 16
ram : ORIGIN = 0x02000000, LENGTH = 32M
}
/*

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@@ -148,7 +148,7 @@ rtems_isr bsp_spurious_handler(
* What else can we do but stop ...
*/
asm volatile( "ta 0x0" );
asm volatile( "mov 1, %g1; ta 0x0" );
}
/*
@@ -177,8 +177,9 @@ void bsp_spurious_initialize()
* paramaters to the program.
*/
if (( trap == 5 || trap == 6 || trap == 0x83 ) ||
(( trap >= 0x70 ) && ( trap <= 0x80 )))
if (( trap == 5 || trap == 6 ) ||
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
continue;
set_vector( bsp_spurious_handler, SPARC_SYNCHRONOUS_TRAP( trap ), 1 );

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@@ -17,7 +17,7 @@ VPATH = @srcdir@
BSP_PIECES=startup console clock timer gnatsupp
# pieces to pick up out of libcpu/sparc
CPU_PIECES=reg_win
CPU_PIECES=reg_win syscall
GENERIC_PIECES=
# bummer; have to use $foreach since % pattern subst rules only replace 1x

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@@ -18,7 +18,7 @@ VPATH = @srcdir@
include $(RTEMS_ROOT)/make/custom/${RTEMS_BSP}.cfg
include $(RTEMS_ROOT)/make/directory.cfg
SUB_DIRS=reg_win
SUB_DIRS=reg_win syscall
Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
cd $(top_builddir) \

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@@ -345,7 +345,7 @@ extern ERC32_Register_Map ERC32_MEC;
do { \
unsigned32 _level; \
\
sparc_disable_interrupts( _level ); \
_level = sparc_disable_interrupts(); \
ERC32_MEC.Test_Control = ERC32_MEC.Test_Control | 0x80000; \
ERC32_MEC.Interrupt_Force = (1 << (_source)); \
sparc_enable_interrupts( _level ); \
@@ -361,7 +361,7 @@ extern ERC32_Register_Map ERC32_MEC;
do { \
unsigned32 _level; \
\
sparc_disable_interrupts( _level ); \
_level = sparc_disable_interrupts(); \
ERC32_MEC.Interrupt_Mask |= (1 << (_source)); \
sparc_enable_interrupts( _level ); \
} while (0)
@@ -370,7 +370,7 @@ extern ERC32_Register_Map ERC32_MEC;
do { \
unsigned32 _level; \
\
sparc_disable_interrupts( _level ); \
_level = sparc_disable_interrupts(); \
ERC32_MEC.Interrupt_Mask &= ~(1 << (_source)); \
sparc_enable_interrupts( _level ); \
} while (0)
@@ -380,7 +380,7 @@ extern ERC32_Register_Map ERC32_MEC;
unsigned32 _level; \
unsigned32 _mask = 1 << (_source); \
\
sparc_disable_interrupts( _level ); \
_level = sparc_disable_interrupts(); \
(_previous) = ERC32_MEC.Interrupt_Mask; \
ERC32_MEC.Interrupt_Mask = _previous | _mask; \
sparc_enable_interrupts( _level ); \
@@ -392,7 +392,7 @@ extern ERC32_Register_Map ERC32_MEC;
unsigned32 _level; \
unsigned32 _mask = 1 << (_source); \
\
sparc_disable_interrupts( _level ); \
_level = sparc_disable_interrupts(); \
ERC32_MEC.Interrupt_Mask = \
(ERC32_MEC.Interrupt_Mask & ~_mask) | (_previous); \
sparc_enable_interrupts( _level ); \
@@ -464,7 +464,7 @@ extern unsigned32 _ERC32_MEC_Timer_Control_Mirror;
unsigned32 __value; \
\
__value = ((_value) & 0x0f); \
sparc_disable_interrupts( _level ); \
_level = sparc_disable_interrupts(); \
_control = _ERC32_MEC_Timer_Control_Mirror; \
_control &= ERC32_MEC_TIMER_COUNTER_DEFINED_MASK << 8; \
_ERC32_MEC_Timer_Control_Mirror = _control | _value; \
@@ -493,7 +493,7 @@ extern unsigned32 _ERC32_MEC_Timer_Control_Mirror;
unsigned32 __value; \
\
__value = ((_value) & 0x0f) << 8; \
sparc_disable_interrupts( _level ); \
_level = sparc_disable_interrupts(); \
_control = _ERC32_MEC_Timer_Control_Mirror; \
_control &= ERC32_MEC_TIMER_COUNTER_DEFINED_MASK; \
_ERC32_MEC_Timer_Control_Mirror = _control | __value; \