forked from Imagelibrary/rtems
sparc: Move CPU counter implementation
Enable a BSP-specific CPU counter implementation. Update #4954.
This commit is contained in:
Sebastian Huber
177
bsps/sparc/shared/start/sparc-counter-asm.S
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177
bsps/sparc/shared/start/sparc-counter-asm.S
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/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2016, 2023 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <rtems/asm.h>
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/*
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* All functions except _SPARC_Counter_read_clock() in this module are
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* sometimes called with traps disabled.
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*/
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.section ".text"
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.align 4
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/*
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* This is a workaround for:
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* https://gcc.gnu.org/bugzilla//show_bug.cgi?id=69027
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*/
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PUBLIC(_CPU_Counter_read)
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SYM(_CPU_Counter_read):
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sethi %hi(_SPARC_Counter + 4), %o1
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ld [%o1 + %lo(_SPARC_Counter + 4)], %o1
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or %o7, %g0, %g1
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call %o1, 0
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or %g1, %g0, %o7
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#if defined(RTEMS_PROFILING)
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/*
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* This is a workaround for:
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* https://gcc.gnu.org/bugzilla//show_bug.cgi?id=69027
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*/
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PUBLIC(_SPARC_Counter_read_ISR_disabled)
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SYM(_SPARC_Counter_read_ISR_disabled):
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sethi %hi(_SPARC_Counter), %o1
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ld [%o1 + %lo(_SPARC_Counter)], %o1
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or %o7, %g0, %g1
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call %o1, 0
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or %g1, %g0, %o7
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#endif
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PUBLIC(_SPARC_Counter_read_default)
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SYM(_SPARC_Counter_read_default):
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sethi %hi(_SPARC_Counter + 12), %o1
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ld [%o1 + %lo(_SPARC_Counter + 12)], %o0
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add %o0, 1, %o0
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st %o0, [%o1 + %lo(_SPARC_Counter + 12)]
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jmp %o7 + 8
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nop
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PUBLIC(_SPARC_Counter_read_up)
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PUBLIC(_SPARC_Get_timecount_up)
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SYM(_SPARC_Counter_read_up):
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SYM(_SPARC_Get_timecount_up):
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sethi %hi(_SPARC_Counter + 8), %o0
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ld [%o0 + %lo(_SPARC_Counter + 8)], %o0
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jmp %o7 + 8
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ld [%o0], %o0
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PUBLIC(_SPARC_Counter_read_down)
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PUBLIC(_SPARC_Get_timecount_down)
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SYM(_SPARC_Counter_read_down):
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SYM(_SPARC_Get_timecount_down):
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sethi %hi(_SPARC_Counter + 8), %o0
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ld [%o0 + %lo(_SPARC_Counter + 8)], %o0
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ld [%o0], %o0
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jmp %o7 + 8
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xnor %g0, %o0, %o0
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/*
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* For the corresponding C code is something like this:
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*
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* CPU_Counter_ticks _SPARC_Counter_read_clock_isr_disabled( void )
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* {
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* const SPARC_Counter *ctr;
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* CPU_Counter_ticks ticks;
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* CPU_Counter_ticks accumulated;
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*
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* ctr = &_SPARC_Counter;
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* ticks = *ctr->counter_register;
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* accumulated = ctr->accumulated;
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*
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* if ( ( *ctr->pending_register & ctr->pending_mask ) != 0 ) {
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* ticks = *ctr->counter_register;
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* accumulated += ctr->interval;
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* }
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*
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* return accumulated - ticks;
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* }
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*/
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PUBLIC(_SPARC_Counter_read_clock_isr_disabled)
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SYM(_SPARC_Counter_read_clock_isr_disabled):
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sethi %hi(_SPARC_Counter), %o5
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or %o5, %lo(_SPARC_Counter), %o5
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ld [%o5 + 8], %o3
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ld [%o5 + 12], %o4
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ld [%o5 + 16], %o2
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ld [%o3], %o0
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ld [%o4], %o1
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btst %o1, %o2
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bne .Lpending_isr_disabled
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ld [%o5 + 20], %o4
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jmp %o7 + 8
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sub %o4, %o0, %o0
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.Lpending_isr_disabled:
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ld [%o5 + 24], %o5
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ld [%o3], %o0
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add %o4, %o5, %o4
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jmp %o7 + 8
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sub %o4, %o0, %o0
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/*
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* For the corresponding C code see
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* _SPARC_Counter_read_clock_isr_disabled() above.
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*/
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PUBLIC(_SPARC_Counter_read_clock)
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PUBLIC(_SPARC_Get_timecount_clock)
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SYM(_SPARC_Counter_read_clock):
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SYM(_SPARC_Get_timecount_clock):
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sethi %hi(_SPARC_Counter), %o5
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or %o5, %lo(_SPARC_Counter), %o5
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ta SPARC_SWTRAP_IRQDIS
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ld [%o5 + 8], %o3
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ld [%o5 + 12], %o4
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ld [%o5 + 16], %o2
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ld [%o3], %o0
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ld [%o4], %o1
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btst %o1, %o2
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bne .Lpending
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ld [%o5 + 20], %o4
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ta SPARC_SWTRAP_IRQEN
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#ifdef __FIX_LEON3FT_TN0018
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/* A nop is added to work around the GRLIB-TN-0018 errata */
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nop
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#endif
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jmp %o7 + 8
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sub %o4, %o0, %o0
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.Lpending:
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ld [%o5 + 24], %o5
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ld [%o3], %o0
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ta SPARC_SWTRAP_IRQEN
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add %o4, %o5, %o4
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jmp %o7 + 8
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sub %o4, %o0, %o0
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PUBLIC(_SPARC_Counter_read_asr23)
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PUBLIC(_SPARC_Get_timecount_asr23)
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SYM(_SPARC_Counter_read_asr23):
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SYM(_SPARC_Get_timecount_asr23):
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jmp %o7 + 8
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mov %asr23, %o0
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