RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

bsp/qoriq: Simplify initialization

Browse Source 
Do not flush/invalidate the caches. Instead enable the cache during the
low-level initialization and perform an explicit cache flush for the
read-only and fast-text sections.

Update #3082.
Update #3085.
This commit is contained in:
Sebastian Huber
2017-07-27 15:16:36 +02:00
parent 3fd019739f
commit b615e9b3ee
2 changed files with 7 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
c/src/lib/libbsp/powerpc/qoriq/configure.ac
View File

@@ -136,22 +136,6 @@ RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[qoriq_t*],[1])
RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[*],[])
RTEMS_BSPOPTS_HELP([QORIQ_HAS_HYPERVISOR_MODE],[defined if the processor core has a hypervisor mode])
RTEMS_BSPOPTS_SET([QORIQ_HAS_WRITE_BACK_L1_CACHE],[qoriq_t*],[])
RTEMS_BSPOPTS_SET([QORIQ_HAS_WRITE_BACK_L1_CACHE],[*],[1])
RTEMS_BSPOPTS_HELP([QORIQ_HAS_WRITE_BACK_L1_CACHE],[defined if the L1 cache supports write-back])
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_1_L2CSR0],[qoriq_t*],[0xfec20000])
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_1_L2CSR0],[*],[])
RTEMS_BSPOPTS_HELP([QORIQ_CLUSTER_1_L2CSR0],[address of Cluster 1 L2CSR0 register])
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_2_L2CSR0],[qoriq_t4240*],[0xfec60000])
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_2_L2CSR0],[*],[])
RTEMS_BSPOPTS_HELP([QORIQ_CLUSTER_2_L2CSR0],[address of Cluster 2 L2CSR0 register])
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_3_L2CSR0],[qoriq_t4240*],[0xfeca0000])
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_3_L2CSR0],[*],[])
RTEMS_BSPOPTS_HELP([QORIQ_CLUSTER_3_L2CSR0],[address of Cluster 3 L2CSR0 register])
RTEMS_BSPOPTS_SET([QORIQ_CLOCK_TIMER],[qoriq_core_1],[4])
RTEMS_BSPOPTS_SET([QORIQ_CLOCK_TIMER],[*],[0])
RTEMS_BSPOPTS_HELP([QORIQ_CLOCK_TIMER],[global timer used for system clock, 0..3 maps to A0..A3, and 4..7 maps to B0..B3])

39
c/src/lib/libbsp/powerpc/qoriq/start/start.S
View File

@@ -53,37 +53,6 @@ _start:
bl .Linitearly
bl bsp_fdt_copy
#ifdef QORIQ_HAS_WRITE_BACK_L1_CACHE
/*
* See PowerPC e500 Core Family Reference Manual, 11.5, L1 Data Cache
* Flushing.
*/
LWI r3, 12 * 128
mtctr r3
LWI r4, bsp_section_bss_begin
1:
dcbz r0, r4
addi r4, r4, 32
bdnz 1b
#endif
bl qoriq_l1cache_invalidate
#ifdef QORIQ_CLUSTER_1_L2CSR0
LWI r3, QORIQ_CLUSTER_1_L2CSR0
bl qoriq_l2cache_flush_invalidate
#endif
#ifdef QORIQ_CLUSTER_2_L2CSR0
LWI r3, QORIQ_CLUSTER_2_L2CSR0
bl qoriq_l2cache_flush_invalidate
#endif
#ifdef QORIQ_CLUSTER_3_L2CSR0
LWI r3, QORIQ_CLUSTER_3_L2CSR0
bl qoriq_l2cache_flush_invalidate
#endif
/* Get start stack */
LWI START_STACK, start_stack_end
@@ -94,12 +63,18 @@ _start:
LWI r4, bsp_section_fast_text_load_begin
LWI r5, bsp_section_fast_text_size
bl .Lcopy
LWI r3, bsp_section_fast_text_begin
LWI r4, bsp_section_fast_text_size
bl rtems_cache_flush_multiple_data_lines
/* Copy read-only data */
LWI r3, bsp_section_rodata_begin
LWI r4, bsp_section_rodata_load_begin
LWI r5, bsp_section_rodata_size
bl .Lcopy
LWI r3, bsp_section_rodata_begin
LWI r4, bsp_section_rodata_size
bl rtems_cache_flush_multiple_data_lines
/* Copy fast data */
LWI r3, bsp_section_fast_data_begin
@@ -206,7 +181,7 @@ _start:
/* Add TS1 entry for the first 4GiB of RAM */
li r3, SCRATCH_TLB
li r4, FSL_EIS_MAS1_TS
li r5, FSL_EIS_MAS2_I
li r5, FSL_EIS_MAS2_M
li r6, FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW | FSL_EIS_MAS3_SX
li r7, 0
li r8, 0