forked from Imagelibrary/rtems
2010-12-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* new-exceptions/bspsupport/ppc_exc.S: Comment. * new-exceptions/bspsupport/ppc_exc_address.c: Fixed address calculation for e200z1 core.
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@@ -1,3 +1,9 @@
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2010-12-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
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* new-exceptions/bspsupport/ppc_exc.S: Comment.
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* new-exceptions/bspsupport/ppc_exc_address.c: Fixed address
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calculation for e200z1 core.
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2010-11-30 Joel Sherrill <joel.sherrilL@OARcorp.com>
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2010-11-30 Joel Sherrill <joel.sherrilL@OARcorp.com>
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* mpc55xx/edma/edma.c: Use rtems_chain_first() and do not directly
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* mpc55xx/edma/edma.c: Use rtems_chain_first() and do not directly
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@@ -74,6 +74,12 @@ ppc_exc_tgpr_clr_prolog_size = . - ppc_exc_tgpr_clr_prolog
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/**
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/**
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* @brief Use vector offsets with 16 byte boundaries.
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* @brief Use vector offsets with 16 byte boundaries.
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*
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*
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* This prologue is intended for cores with IVPR/IVOR registers. The e200z1
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* core has hard wired values for the IVOR, thus all values are calculated to
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* match its constraints. The link register will point to the next prologue.
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* This is all right for the vector number calculation due the IVOR offset
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* values.
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*
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* @see ppc_exc_min_prolog_auto();
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* @see ppc_exc_min_prolog_auto();
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*/
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*/
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.global ppc_exc_min_prolog_auto_packed
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.global ppc_exc_min_prolog_auto_packed
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@@ -70,7 +70,7 @@ void *ppc_exc_vector_address(unsigned vector)
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* XXX: this directly matches the vector offsets in a e200z1,
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* XXX: this directly matches the vector offsets in a e200z1,
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* which has hardwired IVORs (IVOR0=0,IVOR1=0x10,IVOR2=0x20...)
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* which has hardwired IVORs (IVOR0=0,IVOR1=0x10,IVOR2=0x20...)
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*/
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*/
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vector_offset >>= 4;
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vector_offset = (vector - 1) << 4;
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}
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}
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if (bsp_exceptions_in_RAM) {
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if (bsp_exceptions_in_RAM) {
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