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2010-12-22 Sebastian Huber <sebastian.huber@embedded-brains.de>

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* new-exceptions/bspsupport/ppc_exc.S: Comment.
	* new-exceptions/bspsupport/ppc_exc_address.c: Fixed address
	calculation for e200z1 core.
This commit is contained in:
Sebastian Huber
2010-12-22 14:13:03 +00:00
parent ffc3c64cf4
commit b5919529db
3 changed files with 13 additions and 1 deletions
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6
c/src/lib/libcpu/powerpc/ChangeLog
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@@ -1,3 +1,9 @@
2010-12-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* new-exceptions/bspsupport/ppc_exc.S: Comment.
* new-exceptions/bspsupport/ppc_exc_address.c: Fixed address
calculation for e200z1 core.
2010-11-30 Joel Sherrill <joel.sherrilL@OARcorp.com>
* mpc55xx/edma/edma.c: Use rtems_chain_first() and do not directly

6
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc.S
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@@ -74,6 +74,12 @@ ppc_exc_tgpr_clr_prolog_size = . - ppc_exc_tgpr_clr_prolog
/**
* @brief Use vector offsets with 16 byte boundaries.
*
* This prologue is intended for cores with IVPR/IVOR registers. The e200z1
* core has hard wired values for the IVOR, thus all values are calculated to
* match its constraints. The link register will point to the next prologue.
* This is all right for the vector number calculation due the IVOR offset
* values.
*
* @see ppc_exc_min_prolog_auto();
*/
.global ppc_exc_min_prolog_auto_packed

2
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c
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@@ -70,7 +70,7 @@ void *ppc_exc_vector_address(unsigned vector)
* XXX: this directly matches the vector offsets in a e200z1,
* which has hardwired IVORs (IVOR0=0,IVOR1=0x10,IVOR2=0x20...)
*/
vector_offset >>= 4;
vector_offset = (vector - 1) << 4;
}
if (bsp_exceptions_in_RAM) {