RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>

Browse Source 
* configure.ac, startup/bspstart.c: Use standard cache BSP options.
This commit is contained in:
Sebastian Huber
2011-06-07 13:38:54 +00:00
parent e5da43407e
commit b125b461d5
6 changed files with 20 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
c/src/lib/libbsp/powerpc/gen5200/ChangeLog
View File

@@ -1,3 +1,7 @@
2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
* configure.ac, startup/bspstart.c: Use standard cache BSP options.
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* include/tm27.h: * include/tm27.h:

12
c/src/lib/libbsp/powerpc/gen5200/configure.ac
View File

@@ -15,15 +15,11 @@ RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS RTEMS_PROG_CCAS
RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1]) RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1])
RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE], RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED
[If defined, the data cache will be enabled after address translation
is turned on.])
RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1]) RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1])
RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE], RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED
[If defined, the instruction cache will be enabled after address translation
is turned on.])
RTEMS_BSPOPTS_SET([BENCHMARK_IRQ_PROCESSING],[*],[0]) RTEMS_BSPOPTS_SET([BENCHMARK_IRQ_PROCESSING],[*],[0])
RTEMS_BSPOPTS_HELP([BENCHMARK_IRQ_PROCESSING], RTEMS_BSPOPTS_HELP([BENCHMARK_IRQ_PROCESSING],

4
c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
View File

@@ -149,10 +149,10 @@ void bsp_start(void)
/* /*
* Enable instruction and data caches. Do not force writethrough mode. * Enable instruction and data caches. Do not force writethrough mode.
*/ */
#if INSTRUCTION_CACHE_ENABLE #if BSP_INSTRUCTION_CACHE_ENABLED
rtems_cache_enable_instruction(); rtems_cache_enable_instruction();
#endif #endif
#if DATA_CACHE_ENABLE #if BSP_DATA_CACHE_ENABLED
rtems_cache_enable_data(); rtems_cache_enable_data();
#endif #endif

4
c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
View File

@@ -1,3 +1,7 @@
2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
* configure.ac, startup/bspstart.c: Use standard cache BSP options.
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* startup/cpuinit.c: * startup/cpuinit.c:

16
c/src/lib/libbsp/powerpc/gen83xx/configure.ac
View File

@@ -15,15 +15,11 @@ RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS RTEMS_PROG_CCAS
RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1]) RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1])
RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE], RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED
[If defined, the data cache will be enabled after address translation
is turned on.])
RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1]) RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1])
RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE], RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED
[If defined, the instruction cache will be enabled after address translation
is turned on.])
RTEMS_BSPOPTS_SET([MPC8313ERDB],[mpc8313erdb],[1]) RTEMS_BSPOPTS_SET([MPC8313ERDB],[mpc8313erdb],[1])
RTEMS_BSPOPTS_HELP([MPC8313ERDB], RTEMS_BSPOPTS_HELP([MPC8313ERDB],
@@ -58,10 +54,6 @@ RTEMS_BSPOPTS_HELP([BSP_USE_UART2],[If defined, enables UART2.])
RTEMS_BSPOPTS_SET([HAS_UBOOT],[mpc8313erdb],[1]) RTEMS_BSPOPTS_SET([HAS_UBOOT],[mpc8313erdb],[1])
RTEMS_BSPOPTS_HELP([HAS_UBOOT],[If defined, enables U-Boot support.]) RTEMS_BSPOPTS_HELP([HAS_UBOOT],[If defined, enables U-Boot support.])
RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[1])
RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE], [If defined, then the PowerPC specific
code in RTEMS will use data cache instructions to optimize the context switch code.])
RTEMS_BSPOPTS_SET([GEN83XX_ENABLE_INTERRUPT_NESTING],[*],[1]) RTEMS_BSPOPTS_SET([GEN83XX_ENABLE_INTERRUPT_NESTING],[*],[1])
RTEMS_BSPOPTS_HELP([GEN83XX_ENABLE_INTERRUPT_NESTING],[enable interrupt nesting]) RTEMS_BSPOPTS_HELP([GEN83XX_ENABLE_INTERRUPT_NESTING],[enable interrupt nesting])

4
c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
View File

@@ -96,11 +96,11 @@ void bsp_start( void)
* Enable instruction and data caches. Do not force writethrough mode. * Enable instruction and data caches. Do not force writethrough mode.
*/ */
#if INSTRUCTION_CACHE_ENABLE #if BSP_INSTRUCTION_CACHE_ENABLED
rtems_cache_enable_instruction(); rtems_cache_enable_instruction();
#endif #endif
#if DATA_CACHE_ENABLE #if BSP_DATA_CACHE_ENABLED
rtems_cache_enable_data(); rtems_cache_enable_data();
#endif #endif