2009-09-11 Till Straumann <strauman@slac.stanford.edu>

* Makefile.am, preinstall.am, irq/no_pic.c (REMOVED),
	irq/irq.h, irq/irq_init.c:
	use openpic from 'shared' area instead of no_pic.
	* inlude/psim.h:
	use openpic from 'shared' area instead of no_pic.
	Added 'extern' declaration for (linker-script defined) RamBase
	and RamSize symbols. Let CPP macros expand to these symbols
	instead of static constants.
	Added register definitions for OpenPIC in the register area.
	Added register definitions for ethernet controller in the register
	area.
	* startup/linkcmds: Increased RamSize to 16M. Increased 'RAM'
	memory region to 32M (there is really no disadvantage in making
	this large). Added comment explaining the inter-relation between
	RamSize, the size of the memory region, the device-tree property
	"oea-memory-size" and the DBAT setting.
	* tools/psim-shared: Try to determine RamSize from executable
	and set 'oea-memory-size' accordingly. May be overridden if 'RAM_SIZE'
	envvar is set.
	Added openpic to device-tree.
	Added ethernet controller to device-tree (commented because a PSIM
	patch is currently required to use this device).
	* startup/bspstart: Increase DBAT0 mapping to size of 32M.
This commit is contained in:
Till Straumann
2009-09-11 17:13:42 +00:00
parent 1b290ce7e5
commit b09423368b
11 changed files with 134 additions and 83 deletions

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@@ -1,3 +1,29 @@
2009-09-11 Till Straumann <strauman@slac.stanford.edu>
* Makefile.am, preinstall.am, irq/no_pic.c (REMOVED),
irq/irq.h, irq/irq_init.c:
use openpic from 'shared' area instead of no_pic.
* inlude/psim.h:
use openpic from 'shared' area instead of no_pic.
Added 'extern' declaration for (linker-script defined) RamBase
and RamSize symbols. Let CPP macros expand to these symbols
instead of static constants.
Added register definitions for OpenPIC in the register area.
Added register definitions for ethernet controller in the register
area.
* startup/linkcmds: Increased RamSize to 16M. Increased 'RAM'
memory region to 32M (there is really no disadvantage in making
this large). Added comment explaining the inter-relation between
RamSize, the size of the memory region, the device-tree property
"oea-memory-size" and the DBAT setting.
* tools/psim-shared: Try to determine RamSize from executable
and set 'oea-memory-size' accordingly. May be overridden if 'RAM_SIZE'
envvar is set.
Added openpic to device-tree.
Added ethernet controller to device-tree (commented because a PSIM
patch is currently required to use this device).
* startup/bspstart: Increase DBAT0 mapping to size of 32M.
2009-08-28 Joel Sherrill <joel.sherrill@OARcorp.com> 2009-08-28 Joel Sherrill <joel.sherrill@OARcorp.com>
* startup/bspstart.c: Spacing. * startup/bspstart.c: Spacing.

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@@ -50,8 +50,8 @@ libbsp_a_SOURCES += ../../shared/console-polled.c
libbsp_a_SOURCES += console/console-io.c console/consupp.S libbsp_a_SOURCES += console/console-io.c console/consupp.S
# irq # irq
include_bsp_HEADERS = irq/irq.h include_bsp_HEADERS = irq/irq.h ../shared/openpic/openpic.h
libbsp_a_SOURCES += irq/irq_init.c irq/no_pic.c libbsp_a_SOURCES += irq/irq_init.c ../shared/irq/openpic_i8259_irq.c ../shared/openpic/openpic.c
EXTRA_DIST = vectors/README EXTRA_DIST = vectors/README
# vectors # vectors

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@@ -69,6 +69,8 @@ extern uint32_t BSP_mem_size;
#endif /* ASM */ #endif /* ASM */
#define BSP_HAS_NO_VME
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@@ -11,8 +11,16 @@
/* /*
* RAM Information * RAM Information
*/ */
#define PSIM_RAM_BASE (void *)0x00000000
#define PSIM_RAM_SIZE 8388608 extern char RamBase[];
extern char RamSize[];
/*
* RamBase/RamSize is defined by the linker script;
* CPP symbols are AFAIK unused and deprecated.
*/
#define PSIM_RAM_SIZE ((unsigned long)RamSize)
#define PSIM_RAM_BASE ((void*)RamBase)
/* /*
* NVRAM/RTC Structure and Information * NVRAM/RTC Structure and Information
@@ -58,12 +66,21 @@ typedef struct {
/* 0x0c100010 - 0x0c10001b - System V IPC Semaphore */ /* 0x0c100010 - 0x0c10001b - System V IPC Semaphore */
psim_sysv_sem_t Semaphore; psim_sysv_sem_t Semaphore;
/* 0x0c10001C - 0x0c10FFFF - NVRAM/RTC */ /* 0x0c10001c - 0x0c10001f - NVRAM/RTC */
uint8_t gap2[65508]; uint8_t gap2[4];
/* 0x0c100020 - 0x0c10005F - Ethernet */
volatile uint8_t Ethtap[ 64 ];
/* 0x0c100060 - 0x0c10FFFF - NVRAM/RTC */
uint8_t gap3[65440];
/* 0x0c110000 - 0x0c12FFFF - System V IPC Shared Memory */ /* 0x0c110000 - 0x0c12FFFF - System V IPC Shared Memory */
uint8_t SharedMemory[ 128 * 1024 ]; uint8_t SharedMemory[ 128 * 1024 ];
/* 0x0c130000 - 0x0c170000 - OpenPIC IRQ Controller */
volatile uint8_t OpenPIC[ 256 * 1024 ];
} psim_registers_t; } psim_registers_t;
/* /*

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@@ -32,15 +32,24 @@
* Symblolic IRQ names and related definitions. * Symblolic IRQ names and related definitions.
*/ */
/*
* PCI IRQ handlers related definitions
* CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
*/
#define BSP_PCI_IRQ_NUMBER (16)
#define BSP_PCI_IRQ_LOWEST_OFFSET (0)
#define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1)
#define BSP_PROCESSOR_IRQ_NUMBER (1) #define BSP_PROCESSOR_IRQ_NUMBER (1)
#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (0) #define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET)
#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET+BSP_PROCESSOR_IRQ_NUMBER-1) #define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET+BSP_PROCESSOR_IRQ_NUMBER-1)
/* /*
* Summary * Summary
*/ */
#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) #define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
#define BSP_LOWEST_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) #define BSP_LOWEST_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET)
#define BSP_MAX_OFFSET (BSP_IRQ_NUMBER - 1) #define BSP_MAX_OFFSET (BSP_IRQ_NUMBER - 1)
/* /*

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@@ -19,8 +19,10 @@
#include <libcpu/spr.h> #include <libcpu/spr.h>
#include <bsp/irq.h> #include <bsp/irq.h>
#include <bsp.h> #include <bsp.h>
#include <psim.h>
#include <libcpu/raw_exception.h> #include <libcpu/raw_exception.h>
#include <rtems/bspIo.h> #include <rtems/bspIo.h>
#include <bsp/openpic.h>
static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER]; static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER];
static rtems_irq_global_settings initial_config; static rtems_irq_global_settings initial_config;
@@ -48,6 +50,8 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
/* /*
* First initialize the Interrupt management hardware * First initialize the Interrupt management hardware
*/ */
OpenPIC = (void*)PSIM.OpenPIC;
openpic_init(1,0,0,16,0,0);
/* /*
* Initialize Rtems management interrupt table * Initialize Rtems management interrupt table
@@ -68,6 +72,10 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
initial_config.irqBase = BSP_LOWEST_OFFSET; initial_config.irqBase = BSP_LOWEST_OFFSET;
initial_config.irqPrioTbl = irqPrioTable; initial_config.irqPrioTbl = irqPrioTable;
for (i = BSP_PCI_IRQ_LOWEST_OFFSET; i< BSP_PCI_IRQ_NUMBER; i++ ) {
irqPrioTable[i] = 8;
}
if (!BSP_rtems_irq_mngt_set(&initial_config)) { if (!BSP_rtems_irq_mngt_set(&initial_config)) {
/* /*
* put something here that will show the failure... * put something here that will show the failure...

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@@ -1,68 +0,0 @@
/*
*
* This file contains the implementation of the function described in irq.h
*
* Copyright (C) 1998, 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* Dummy support for just the decrementer interrupt but no PIC.
*
* T. Straumann, 2007/11/30
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/irq_supp.h>
#include <libcpu/raw_exception.h>
static rtems_irq_connect_data *rtems_hdl_tbl;
static rtems_irq_connect_data dflt_entry;
/*
* High level IRQ handler called from shared_raw_irq_code_entry
*/
int C_dispatch_irq_handler(
struct _BSP_Exception_frame *frame,
unsigned int excNum
)
{
register uint32_t l_orig;
if (excNum == ASM_DEC_VECTOR) {
l_orig = _ISR_Get_level();
/* re-enable all interrupts */
_ISR_Set_level(0);
bsp_irq_dispatch_list(rtems_hdl_tbl, BSP_DECREMENTER, dflt_entry.hdl);
_ISR_Set_level(l_orig);
return 0;
}
return -1; /* unhandled interrupt */
}
void
BSP_enable_irq_at_pic(const rtems_irq_number irq)
{
}
int
BSP_disable_irq_at_pic(const rtems_irq_number irq)
{
return 0;
}
int
BSP_setup_the_pic(rtems_irq_global_settings *config)
{
dflt_entry = config->defaultEntry;
rtems_hdl_tbl = config->irqHdlTbl;
return 1;
}

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@@ -77,6 +77,10 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/openpic.h: ../shared/openpic/openpic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/openpic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/openpic.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h

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@@ -18,6 +18,7 @@
#include <fcntl.h> #include <fcntl.h>
#include <bsp.h> #include <bsp.h>
#include <bsp/irq.h> #include <bsp/irq.h>
#include <psim.h>
#include <bsp/bootcard.h> #include <bsp/bootcard.h>
#include <rtems/bspIo.h> #include <rtems/bspIo.h>
#include <rtems/powerpc/powerpc.h> #include <rtems/powerpc/powerpc.h>
@@ -50,8 +51,7 @@ uint32_t bsp_clicks_per_usec;
/* /*
* Memory on this board. * Memory on this board.
*/ */
extern char RamSize[]; uint32_t BSP_mem_size = (uint32_t)RamSize;
uint32_t BSP_mem_size;
/* /*
* Time base divisior (how many tick for 1 second). * Time base divisior (how many tick for 1 second).
@@ -126,8 +126,8 @@ void bsp_start( void )
* Setup BATs and enable MMU * Setup BATs and enable MMU
*/ */
/* Memory */ /* Memory */
setdbat(0, 0x0<<24, 0x0<<24, 1<<24, _PAGE_RW); setdbat(0, 0x0<<24, 0x0<<24, 2<<24, _PAGE_RW);
setibat(0, 0x0<<24, 0x0<<24, 1<<24, 0); setibat(0, 0x0<<24, 0x0<<24, 2<<24, 0);
/* PCI */ /* PCI */
setdbat(1, 0x8<<24, 0x8<<24, 1<<24, IO_PAGE); setdbat(1, 0x8<<24, 0x8<<24, 1<<24, IO_PAGE);
setdbat(2, 0xc<<24, 0xc<<24, 1<<24, IO_PAGE); setdbat(2, 0xc<<24, 0xc<<24, 1<<24, IO_PAGE);

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@@ -17,11 +17,21 @@ ENTRY(_start)
PROVIDE (PSIM_INSTRUCTIONS_PER_MICROSECOND = 10000); PROVIDE (PSIM_INSTRUCTIONS_PER_MICROSECOND = 10000);
RamBase = DEFINED(RamBase) ? RamBase : 0x0; RamBase = DEFINED(RamBase) ? RamBase : 0x0;
RamSize = DEFINED(RamSize) ? RamSize : 8M; /*
* make sure device tree (property /openprom/options/oea-memory-size)
* provides at least 'RamSize'.
* Also, the BATs must at map at least 'RamSize' (currently, they
* map 32M -- see startup/bspstart.c).
* Furthermore, the RAM region must be large enough (there is no
* disadvantage in making that one very large as long as it doesn't
* overlap another memory area).
*
*/
RamSize = DEFINED(RamSize) ? RamSize : 16M;
MEMORY MEMORY
{ {
RAM : ORIGIN = 0, LENGTH = 8M RAM : ORIGIN = 0, LENGTH = 32M
PSIM_REGS : ORIGIN = 0x0c000000, LENGTH = 16M PSIM_REGS : ORIGIN = 0x0c000000, LENGTH = 16M
VECTORS : ORIGIN = 0xFFF00000, LENGTH = 0x20000 VECTORS : ORIGIN = 0xFFF00000, LENGTH = 0x20000
} }

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@@ -37,6 +37,13 @@ gen_device_tree()
fi fi
fi fi
if [ X${RAM_SIZE} = X ] ; then
if [ X${NM} = X ] ; then
NM=${rtemsTarget}-nm
fi
RAM_SIZE=`$NM ${1} | awk '/\<RamSize\>/{print "0x"$1}'`
fi
cat <<EOF cat <<EOF
# #
# Device Tree for PSIM # Device Tree for PSIM
@@ -45,7 +52,8 @@ cat <<EOF
# #
/#address-cells 1 /#address-cells 1
/openprom/init/register/pvr 0xfffe0000 /openprom/init/register/pvr 0xfffe0000
/openprom/options/oea-memory-size 8388608 # This must be >= than linkcmds defined RamSize!
/openprom/options/oea-memory-size $RAM_SIZE
##### EEPROM @ 0x0c000000 for 512K ##### EEPROM @ 0x0c000000 for 512K
/eeprom@0x0c000000/reg 0x0c000000 0x80000 /eeprom@0x0c000000/reg 0x0c000000 0x80000
/eeprom@0x0c000000/nr-sectors 8 /eeprom@0x0c000000/nr-sectors 8
@@ -60,6 +68,41 @@ cat <<EOF
##### NVRAM/RTC RTC Portion is 0x0c100000 for 12 ##### NVRAM/RTC RTC Portion is 0x0c100000 for 12
/nvram@0x0c080000/reg 0x0c080000 524300 /nvram@0x0c080000/reg 0x0c080000 524300
/nvram@0x0c080000/timezone -3600 /nvram@0x0c080000/timezone -3600
##### OPENPIC @ 0x0c130000 - 0x0c170000 (512K)
/opic@0x0c130000/reg 0x0c130000 0 0x0c130000 0x40000
/opic@0x0c130000/interrupt-ranges 0 0 0 16
/opic@0x0c130000/device_type open-pic
# interupt out -> CPU's interrupt pin
/opic@0x0c130000 > intr0 int /cpus/cpu@0
##### ETHTAP @ 0x0c100020 for 0x40
##
## NOTE 'ethtap' currently (200902) requires psim to
## be patched -- also, it is only supported on
## a linux host.
## the 'ethtap' device transfers data from/to the
## simulated network interface to/from a 'ethertap'
## interface on the linux host (consult tun/tap
## device documentation).
## A very useful tool is 'tunctl' which allows for
## configuring user-accessible, persistent 'tap'
## devices so that psim may be executed w/o special
## (root) privileges.
#
#/ethtap@0x0c100020/reg 0x0c100020 0x40
## route interrupt to open-pic
#/ethtap@0x0c100020 > 0 irq0 /opic@0x0c130000
## 'tun' device on host
#/ethtap@0x0c100020/tun-device "/dev/net/tun"
## name of 'tap' device to use
#/ethtap@0x0c100020/tap-ifname "tap0"
## ethernet address of simulated IF
#/ethtap@0x0c100020/hw-address "00:00:00:22:11:00"
## generate CRC and append to received packet before
## handing over to the simulation. This is mostly for
## debugging the rtems device driver. If unsure, leave 'false'.
#/ethtap@0x0c100020/enable-crc false
EOF EOF
if [ ${enable_sysv_devices} = yes ] ; then if [ ${enable_sysv_devices} = yes ] ; then