forked from Imagelibrary/rtems
bsp/stm32h7: Split start configuration
This allows applications to individually provide configuration structures. Update #4209.
This commit is contained in:
Sebastian Huber
45
bsps/arm/stm32h7/start/stm32h7-config-clk.c
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45
bsps/arm/stm32h7/start/stm32h7-config-clk.c
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@@ -0,0 +1,45 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stm32h7/hal.h>
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const RCC_ClkInitTypeDef stm32h7_config_clocks = {
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.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
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| RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1,
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.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK,
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.SYSCLKDivider = RCC_SYSCLK_DIV1,
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.AHBCLKDivider = RCC_HCLK_DIV2,
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.APB3CLKDivider = RCC_APB3_DIV2,
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.APB1CLKDivider = RCC_APB1_DIV2,
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.APB2CLKDivider = RCC_APB2_DIV2,
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.APB4CLKDivider = RCC_APB4_DIV2
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};
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34
bsps/arm/stm32h7/start/stm32h7-config-fls.c
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34
bsps/arm/stm32h7/start/stm32h7-config-fls.c
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@@ -0,0 +1,34 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stm32h7/hal.h>
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const uint32_t stm32h7_config_flash_latency = FLASH_LATENCY_4;
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52
bsps/arm/stm32h7/start/stm32h7-config-osc.c
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52
bsps/arm/stm32h7/start/stm32h7-config-osc.c
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@@ -0,0 +1,52 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stm32h7/hal.h>
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const RCC_OscInitTypeDef stm32h7_config_oscillator = {
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.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE
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| RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSI48,
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.HSEState = RCC_HSE_ON,
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.LSEState = RCC_LSE_ON,
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.HSIState = RCC_HSI_DIV1,
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.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT,
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.HSI48State = RCC_HSI48_ON,
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.PLL.PLLState = RCC_PLL_ON,
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.PLL.PLLSource = RCC_PLLSOURCE_HSE,
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.PLL.PLLM = 5,
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.PLL.PLLN = 192,
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.PLL.PLLP = 2,
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.PLL.PLLQ = 12,
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.PLL.PLLR = 2,
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.PLL.PLLRGE = RCC_PLL1VCIRANGE_2,
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.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE,
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.PLL.PLLFRACN = 0
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};
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@@ -31,44 +31,6 @@
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#include <stm32h7/hal.h>
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const uint32_t stm32h7_config_pwr_regulator_voltagescaling =
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PWR_REGULATOR_VOLTAGE_SCALE0;
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const RCC_OscInitTypeDef stm32h7_config_oscillator = {
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.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE
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| RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSI48,
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.HSEState = RCC_HSE_ON,
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.LSEState = RCC_LSE_ON,
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.HSIState = RCC_HSI_DIV1,
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.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT,
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.HSI48State = RCC_HSI48_ON,
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.PLL.PLLState = RCC_PLL_ON,
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.PLL.PLLSource = RCC_PLLSOURCE_HSE,
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.PLL.PLLM = 5,
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.PLL.PLLN = 192,
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.PLL.PLLP = 2,
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.PLL.PLLQ = 12,
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.PLL.PLLR = 2,
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.PLL.PLLRGE = RCC_PLL1VCIRANGE_2,
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.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE,
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.PLL.PLLFRACN = 0
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};
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const RCC_ClkInitTypeDef stm32h7_config_clocks = {
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.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
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| RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1,
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.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK,
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.SYSCLKDivider = RCC_SYSCLK_DIV1,
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.AHBCLKDivider = RCC_HCLK_DIV2,
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.APB3CLKDivider = RCC_APB3_DIV2,
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.APB1CLKDivider = RCC_APB1_DIV2,
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.APB2CLKDivider = RCC_APB2_DIV2,
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.APB4CLKDivider = RCC_APB4_DIV2
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};
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const uint32_t stm32h7_config_flash_latency = FLASH_LATENCY_4;
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const RCC_PeriphCLKInitTypeDef stm32h7_config_peripheral_clocks = {
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.PeriphClockSelection = RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_USART3
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| RCC_PERIPHCLK_FDCAN | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_I2C1
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35
bsps/arm/stm32h7/start/stm32h7-config-pwr.c
Normal file
35
bsps/arm/stm32h7/start/stm32h7-config-pwr.c
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@@ -0,0 +1,35 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
|
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stm32h7/hal.h>
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const uint32_t stm32h7_config_pwr_regulator_voltagescaling =
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PWR_REGULATOR_VOLTAGE_SCALE0;
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