forked from Imagelibrary/rtems
bsp/altera-cyclone-v: Use FDT for clock frequency
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@@ -43,6 +43,12 @@ extern "C" {
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#define BSP_ARM_A9MPCORE_GT_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000200 )
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#ifndef BSP_ARM_A9MPCORE_PERIPHCLK
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extern uint32_t altera_cyclone_v_a9mpcore_periphclk;
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#define BSP_ARM_A9MPCORE_PERIPHCLK altera_cyclone_v_a9mpcore_periphclk
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#define ALTERA_CYCLONE_V_NEED_A9MPCORE_PERIPHCLK
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#endif
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#define BSP_ARM_GIC_DIST_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00001000 )
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#define BSP_ARM_L2C_310_BASE 0xfffef000
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@@ -93,10 +93,17 @@ static void update_clocks(void)
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}
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#endif
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#ifdef ALTERA_CYCLONE_V_NEED_A9MPCORE_PERIPHCLK
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uint32_t altera_cyclone_v_a9mpcore_periphclk;
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#endif
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void bsp_start(void)
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{
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#ifdef BSP_FDT_IS_SUPPORTED
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update_clocks();
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#endif
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#ifdef ALTERA_CYCLONE_V_NEED_A9MPCORE_PERIPHCLK
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alt_clk_freq_get(ALT_CLK_MPU_PERIPH, &altera_cyclone_v_a9mpcore_periphclk);
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#endif
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bsp_interrupt_initialize();
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rtems_cache_coherent_add_area(
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