RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

2007-12-03 Till Straumann <strauman@slac.stanford.edu>

Browse Source 
* rtems/powerpc/registers.h: added definitions for MSR_CE,
	MSR_DE (bookE).
This commit is contained in:
Till Straumann
2007-12-07 21:24:33 +00:00
parent 7b2cb2234f
commit aeca15c87b
2 changed files with 7 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
cpukit/score/cpu/powerpc/ChangeLog
View File

@@ -1,3 +1,8 @@
2007-12-03 Till Straumann <strauman@slac.stanford.edu>
* rtems/powerpc/registers.h: added definitions for MSR_CE,
MSR_DE (bookE).
2007-12-06 Joel Sherrill <joel.sherrill@OARcorp.com>
* rtems/old-exceptions/cpu.h: Remove extra ifndef.

2
cpukit/score/cpu/powerpc/rtems/powerpc/registers.h
View File

@@ -26,6 +26,7 @@ extern "C" {
#define MSR_VE (1<<25) /* Alti-Vec enable (7400+) */
#define MSR_POW (1<<18) /* Enable Power Management */
#define MSR_TGPR (1<<17) /* TLB Update registers in use */
#define MSR_CE (1<<17) /* BookE critical interrupt */
#define MSR_ILE (1<<16) /* Interrupt Little-Endian enable */
#define MSR_EE (1<<15) /* External Interrupt enable */
#define MSR_PR (1<<14) /* Supervisor/User privilege */
@@ -34,6 +35,7 @@ extern "C" {
#define MSR_FE0 (1<<11) /* Floating Exception mode 0 */
#define MSR_SE (1<<10) /* Single Step */
#define MSR_BE (1<<9) /* Branch Trace */
#define MSR_DE (1<<9) /* BookE debug exception */
#define MSR_FE1 (1<<8) /* Floating Exception mode 1 */
#define MSR_IP (1<<6) /* Exception prefix 0x000/0xFFF */
#define MSR_IR (1<<5) /* Instruction MMU enable */