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2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>

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* new-exceptions/cpu_asm.S: Use BSP_DATA_CACHE_ENABLED instead of
	PPC_USE_DATA_CACHE.
This commit is contained in:
Sebastian Huber
2011-06-07 12:59:39 +00:00
parent 95fe2fd08a
commit ae2b1e056a
2 changed files with 14 additions and 9 deletions
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5
c/src/lib/libcpu/powerpc/ChangeLog
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@@ -1,3 +1,8 @@
2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
* new-exceptions/cpu_asm.S: Use BSP_DATA_CACHE_ENABLED instead of
PPC_USE_DATA_CACHE.
2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
* shared/src/cache_.h: Moved implementation from "cache.c" to here. * shared/src/cache_.h: Moved implementation from "cache.c" to here.

18
c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
View File

@@ -293,21 +293,21 @@ PROC (_CPU_Context_switch):
sync sync
isync isync
/* This assumes that all the registers are in the given order */ /* This assumes that all the registers are in the given order */
#if ( PPC_USE_DATA_CACHE ) #if ( BSP_DATA_CACHE_ENABLED )
#if PPC_CACHE_ALIGNMENT != 32 #if PPC_CACHE_ALIGNMENT != 32
#error "code assumes PPC_CACHE_ALIGNMENT == 32!" #error "code assumes PPC_CACHE_ALIGNMENT == 32!"
#endif #endif
li r5, PPC_CACHE_ALIGNMENT li r5, PPC_CACHE_ALIGNMENT
#endif #endif
addi r9,r3,-4 addi r9,r3,-4
#if ( PPC_USE_DATA_CACHE ) #if ( BSP_DATA_CACHE_ENABLED )
dcbz r5, r9 dcbz r5, r9
#endif #endif
stw r1, GP_1+4(r9) stw r1, GP_1+4(r9)
stw r2, GP_2+4(r9) stw r2, GP_2+4(r9)
#if (PPC_USE_MULTIPLE == 1) #if (PPC_USE_MULTIPLE == 1)
addi r9, r9, GP_18+4 addi r9, r9, GP_18+4
#if ( PPC_USE_DATA_CACHE ) #if ( BSP_DATA_CACHE_ENABLED )
dcbz r5, r9 dcbz r5, r9
#endif #endif
stmw r13, GP_13-GP_18(r9) stmw r13, GP_13-GP_18(r9)
@@ -318,7 +318,7 @@ PROC (_CPU_Context_switch):
stw r16, GP_16+4(r9) stw r16, GP_16+4(r9)
stw r17, GP_17+4(r9) stw r17, GP_17+4(r9)
stwu r18, GP_18+4(r9) stwu r18, GP_18+4(r9)
#if ( PPC_USE_DATA_CACHE ) #if ( BSP_DATA_CACHE_ENABLED )
dcbz r5, r9 dcbz r5, r9
#endif #endif
stw r19, GP_19-GP_18(r9) stw r19, GP_19-GP_18(r9)
@@ -335,7 +335,7 @@ PROC (_CPU_Context_switch):
stw r30, GP_30-GP_18(r9) stw r30, GP_30-GP_18(r9)
stw r31, GP_31-GP_18(r9) stw r31, GP_31-GP_18(r9)
#endif #endif
#if ( PPC_USE_DATA_CACHE ) #if ( BSP_DATA_CACHE_ENABLED )
dcbt r0, r4 dcbt r0, r4
#endif #endif
mfcr r6 mfcr r6
@@ -350,19 +350,19 @@ PROC (_CPU_Context_switch):
EXTERN_PROC(_CPU_Context_switch_altivec) EXTERN_PROC(_CPU_Context_switch_altivec)
bl _CPU_Context_switch_altivec bl _CPU_Context_switch_altivec
mr r4, r14 mr r4, r14
#if ( PPC_USE_DATA_CACHE ) #if ( BSP_DATA_CACHE_ENABLED )
li r5, PPC_CACHE_ALIGNMENT li r5, PPC_CACHE_ALIGNMENT
#endif #endif
#endif #endif
#if ( PPC_USE_DATA_CACHE ) #if ( BSP_DATA_CACHE_ENABLED )
dcbt r5, r4 dcbt r5, r4
#endif #endif
lwz r1, GP_1(r4) lwz r1, GP_1(r4)
lwz r2, GP_2(r4) lwz r2, GP_2(r4)
#if (PPC_USE_MULTIPLE == 1) #if (PPC_USE_MULTIPLE == 1)
addi r4, r4, GP_19 addi r4, r4, GP_19
#if ( PPC_USE_DATA_CACHE ) #if ( BSP_DATA_CACHE_ENABLED )
dcbt r5, r4 dcbt r5, r4
#endif #endif
lmw r13, GP_13-GP_19(r4) lmw r13, GP_13-GP_19(r4)
@@ -374,7 +374,7 @@ PROC (_CPU_Context_switch):
lwz r17, GP_17(r4) lwz r17, GP_17(r4)
lwz r18, GP_18(r4) lwz r18, GP_18(r4)
lwzu r19, GP_19(r4) lwzu r19, GP_19(r4)
#if ( PPC_USE_DATA_CACHE ) #if ( BSP_DATA_CACHE_ENABLED )
dcbt r5, r4 dcbt r5, r4
#endif #endif
lwz r20, GP_20-GP_19(r4) lwz r20, GP_20-GP_19(r4)