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bsp/qoriq: Invalidate L1 cache on boot processor

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This commit is contained in:
Sebastian Huber
2015-10-27 10:18:45 +01:00
parent 3abfe7ca2a
commit ac4f1718db
1 changed files with 20 additions and 0 deletions
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20
c/src/lib/libbsp/powerpc/qoriq/start/start.S
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@@ -60,6 +60,26 @@ _start:
bl bsp_fdt_copy bl bsp_fdt_copy
#endif /* U_BOOT_USE_FDT */ #endif /* U_BOOT_USE_FDT */
/* Invalidate L1 data cache */
mfspr r3, FSL_EIS_L1CSR0
ori r3, r3, FSL_EIS_L1CSR0_CFI
mtspr FSL_EIS_L1CSR0, r3
1:
mfspr r3, FSL_EIS_L1CSR0
andi. r3, r3, FSL_EIS_L1CSR0_CFI
bne 1b
isync
/* Invalidate L1 instruction cache */
mfspr r3, FSL_EIS_L1CSR1
ori r3, r3, FSL_EIS_L1CSR1_ICFI
mtspr FSL_EIS_L1CSR1, r3
1:
mfspr r3, FSL_EIS_L1CSR1
andi. r3, r3, FSL_EIS_L1CSR1_ICFI
bne 1b
isync
/* Get start stack */ /* Get start stack */
LWI START_STACK, start_stack_end LWI START_STACK, start_stack_end