forked from Imagelibrary/rtems
2001-01-03 Joel Sherrill <joel@OARcorp.com>
* rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
This commit is contained in:
@@ -1,3 +1,9 @@
|
||||
2001-01-03 Joel Sherrill <joel@OARcorp.com>
|
||||
|
||||
* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
|
||||
* cpu_asm.S: Modify to properly dereference _ISR_Vector_table
|
||||
now that it is dynamically allocated.
|
||||
|
||||
2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
|
||||
|
||||
* Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
|
||||
|
||||
@@ -128,10 +128,12 @@ __ISR_Handler:
|
||||
lda 1(r4),r4 # increment dispatch disable level
|
||||
movl g6,r14 # save g6-g7
|
||||
|
||||
stq g8, _ISR_reg_save # save g8-g11
|
||||
stl g12, _ISR_reg_save+16 # save g12-g13
|
||||
ld __ISR_Vector_table,g1 # g1 = base of vector table
|
||||
|
||||
ld __ISR_Vector_table[g0*4],g1 # g1 = Users handler
|
||||
stq g8, _ISR_reg_save # save g8-g11
|
||||
stl g12, _ISR_reg_save+16 # save g12-g13
|
||||
|
||||
ld (g1)[g0*4],g1 # g1 = Users handler
|
||||
addo 1,r5,r5 # increment ISR level
|
||||
|
||||
st r4,__Thread_Dispatch_disable_level
|
||||
|
||||
@@ -246,12 +246,14 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
|
||||
* ISR handler macros
|
||||
*
|
||||
* These macros perform the following functions:
|
||||
* + initialize the RTEMS vector table
|
||||
* + disable all maskable CPU interrupts
|
||||
* + restore previous interrupt level (enable)
|
||||
* + temporarily restore interrupts (flash)
|
||||
* + set a particular level
|
||||
*/
|
||||
|
||||
#define _CPU_Initialize_vectors()
|
||||
#define _CPU_ISR_Disable( _level ) i960_disable_interrupts( _level )
|
||||
#define _CPU_ISR_Enable( _level ) i960_enable_interrupts( _level )
|
||||
#define _CPU_ISR_Flash( _level ) i960_flash_interrupts( _level )
|
||||
|
||||
@@ -1,3 +1,9 @@
|
||||
2001-01-03 Joel Sherrill <joel@OARcorp.com>
|
||||
|
||||
* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
|
||||
* cpu_asm.S: Modify to properly dereference _ISR_Vector_table
|
||||
now that it is dynamically allocated.
|
||||
|
||||
2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
|
||||
|
||||
* Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
|
||||
|
||||
@@ -128,10 +128,12 @@ __ISR_Handler:
|
||||
lda 1(r4),r4 # increment dispatch disable level
|
||||
movl g6,r14 # save g6-g7
|
||||
|
||||
stq g8, _ISR_reg_save # save g8-g11
|
||||
stl g12, _ISR_reg_save+16 # save g12-g13
|
||||
ld __ISR_Vector_table,g1 # g1 = base of vector table
|
||||
|
||||
ld __ISR_Vector_table[g0*4],g1 # g1 = Users handler
|
||||
stq g8, _ISR_reg_save # save g8-g11
|
||||
stl g12, _ISR_reg_save+16 # save g12-g13
|
||||
|
||||
ld (g1)[g0*4],g1 # g1 = Users handler
|
||||
addo 1,r5,r5 # increment ISR level
|
||||
|
||||
st r4,__Thread_Dispatch_disable_level
|
||||
|
||||
@@ -246,12 +246,14 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high;
|
||||
* ISR handler macros
|
||||
*
|
||||
* These macros perform the following functions:
|
||||
* + initialize the RTEMS vector table
|
||||
* + disable all maskable CPU interrupts
|
||||
* + restore previous interrupt level (enable)
|
||||
* + temporarily restore interrupts (flash)
|
||||
* + set a particular level
|
||||
*/
|
||||
|
||||
#define _CPU_Initialize_vectors()
|
||||
#define _CPU_ISR_Disable( _level ) i960_disable_interrupts( _level )
|
||||
#define _CPU_ISR_Enable( _level ) i960_enable_interrupts( _level )
|
||||
#define _CPU_ISR_Flash( _level ) i960_flash_interrupts( _level )
|
||||
|
||||
Reference in New Issue
Block a user